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AgeCommit message (Expand)AuthorFilesLines
2021-03-24perf/x86/intel: Fix a crash caused by zero PEBS statusKan Liang1-1/+1
2020-12-02perf/x86: fix sysfs type mismatchesSami Tolvanen4-24/+12
2020-11-18perf/core: Fix bad use of igrab()Song Liu1-2/+2
2020-11-10perf/x86/amd/ibs: Fix raw sample data accumulationKim Phillips1-10/+16
2020-11-10perf/x86/amd/ibs: Don't include randomized bits in get_ibs_op_count()Kim Phillips1-4/+8
2020-11-10arch/x86/amd/ibs: Fix re-arming IBS FetchKim Phillips1-1/+14
2020-03-20perf/amd/uncore: Replace manual sampling check with CAP_NO_INTERRUPT flagKim Phillips1-7/+7
2020-02-28perf/x86/intel: Fix inaccurate period in context switch for auto-reloadKan Liang1-0/+2
2020-02-28perf/x86/amd: Add missing L2 misses event spec to AMD Family 17h's event mapKim Phillips1-0/+1
2020-01-12perf/x86/intel: Fix PT PMI handlingAlexander Shishkin1-2/+7
2019-11-12perf/x86/amd/ibs: Handle erratum #420 only on the affected CPU family (10h)Kim Phillips1-2/+4
2019-11-12perf/x86/amd/ibs: Fix reading of the IBS OpData register and thus precise RIP...Kim Phillips1-1/+1
2019-09-21perf/x86/amd/ibs: Fix sample bias for dispatched micro-opsKim Phillips1-3/+10
2019-09-21perf/x86/intel: Restrict period on NehalemJosh Hunt1-0/+6
2019-08-04perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_idSuravee Suthikulpanit1-19/+2
2019-08-04perf/x86/amd/uncore: Get correct number of cores sharing last level cacheJanakarajan Natarajan1-3/+16
2019-08-04perf/x86/amd/uncore: Rename 'L2' to 'LLC'Janakarajan Natarajan1-49/+49
2019-06-22perf/x86/intel/ds: Fix EVENT vs. UEVENT PEBS constraintsStephane Eranian1-14/+14
2019-06-22perf/x86/intel: Allow PEBS multi-entry in watermark modeStephane Eranian1-1/+1
2019-05-14x86/cpu: Sanitize FAM6_ATOM namingPeter Zijlstra3-12/+14
2019-05-10perf/x86/intel: Fix handling of wakeup_events for multi-entry PEBSStephane Eranian1-1/+1
2019-05-08perf/x86/amd: Update generic hardware cache events for Family 17hKim Phillips1-3/+108
2019-04-27perf/x86/amd: Add event map for AMD Family 17hKim Phillips1-9/+26
2019-03-19perf/x86: Fixup typo in stub functionsPeter Zijlstra1-2/+2
2019-03-14perf/x86/intel: Generalize dynamic constraint creationPeter Zijlstra (Intel)1-21/+30
2019-03-14perf/x86/intel: Make cpuc allocations consistentPeter Zijlstra (Intel)3-22/+31
2019-02-20perf/x86: Add check_period PMU callbackJiri Olsa3-2/+37
2019-02-12perf/x86/intel: Delay memory deallocation until x86_pmu_dead_cpu()Peter Zijlstra1-2/+8
2019-02-12perf/x86/intel/uncore: Add Node ID maskKan Liang1-1/+3
2018-12-05perf/x86/intel: Add generic branch tracing check to intel_pmu_has_bts()Jiri Olsa2-18/+12
2018-12-05perf/x86/intel: Move branch tracing setup to the Intel-specific source fileJiri Olsa2-21/+40
2018-12-01perf/x86/intel/uncore: Add more IMC PCI IDs for KabyLake and CoffeeLake CPUsKan Liang1-1/+114
2018-11-10perf/x86/intel/uncore: Fix PCI BDF address of M3UPI on SKXKan Liang1-6/+6
2018-10-10perf/x86/intel: Add support/quirk for the MISPREDICT bit on Knights Landing CPUsJacek Tomaka1-0/+4
2018-10-04perf/x86/intel/lbr: Fix incomplete LBR call stackKan Liang2-6/+27
2018-09-05perf/x86/amd/ibs: Don't access non-started eventThomas Gleixner1-1/+5
2018-08-03perf/x86/intel/uncore: Correct fixed counter index check for NHMKan Liang1-1/+1
2018-08-03perf/x86/intel/uncore: Correct fixed counter index check in generic codeKan Liang1-1/+1
2018-05-30perf/x86/intel: Fix event update for auto-reloadKan Liang2-13/+94
2018-05-30perf/x86/intel: Fix large period handling on Broadwell CPUsKan Liang2-2/+2
2018-05-30perf/x86/intel: Properly save/restore the PMU state in the NMI handlerKan Liang1-1/+9
2018-05-30perf/x86/intel: Fix linear IP of PEBS real_ip on Haswell and later CPUsStephane Eranian1-8/+17
2018-05-16perf/x86: Fix possible Spectre-v1 indexing for x86_pmu::event_map()Peter Zijlstra1-0/+3
2018-05-16perf/x86/msr: Fix possible Spectre-v1 indexing in the MSR driverPeter Zijlstra1-3/+6
2018-05-16perf/x86/cstate: Fix possible Spectre-v1 indexing for pkg_msrPeter Zijlstra1-0/+2
2018-05-16perf/x86: Fix possible Spectre-v1 indexing for hw_perf_event cache_*Peter Zijlstra1-1/+4
2018-03-28perf/x86/intel/uncore: Fix multi-domain PCI CHA enumeration bug on Skylake se...Kan Liang1-14/+17
2018-03-28perf/x86/intel: Don't accidentally clear high bits in bdw_limit_period()Dan Carpenter1-1/+1
2018-03-28perf/x86/intel/uncore: Fix Skylake UPI event formatKan Liang1-1/+1
2018-02-25perf/x86: Shut up false-positive -Wmaybe-uninitialized warningArnd Bergmann1-2/+2
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