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2020-08-18perf/x86/intel: Support TopDown metrics on Ice LakeKan Liang1-0/+118
2020-08-18perf/x86/intel: Generic support for hardware TopDown metricsKan Liang1-5/+119
2020-08-18perf/x86/intel: Use switch in intel_pmu_disable/enable_eventKan Liang1-8/+28
2020-08-18perf/x86/intel: Name the global status bit in NMI handlerKan Liang1-2/+2
2020-08-15perf/x86/intel/uncore: Add BW counters for GT, IA and IO breakdownVaibhav Shankar1-3/+49
2020-07-08perf/x86/intel/lbr: Support XSAVES for arch LBR readKan Liang1-1/+39
2020-07-08perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang1-5/+74
2020-07-08perf/x86: Remove task_ctx_sizeKan Liang1-1/+0
2020-07-08perf/x86/intel/lbr: Create kmem_cache for the LBR context dataKan Liang1-2/+19
2020-07-08perf/x86/intel/lbr: Support Architectural LBRKan Liang2-11/+243
2020-07-08perf/x86/intel/lbr: Factor out intel_pmu_store_lbrKan Liang1-26/+56
2020-07-08perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()Kan Liang1-16/+50
2020-07-08perf/x86/intel/lbr: Mark the {rd,wr}lbr_{to,from} wrappers __always_inlineKan Liang1-4/+4
2020-07-08perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang2-13/+13
2020-07-08perf/x86/intel/lbr: Support LBR_CTLKan Liang1-0/+43
2020-07-08perf/x86/intel/lbr: Use dynamic data structure for task_ctxKan Liang1-33/+26
2020-07-08perf/x86/intel/lbr: Factor out a new struct for generic optimizationKan Liang1-17/+21
2020-07-08perf/x86/intel/lbr: Add the function pointers for LBR save and restoreKan Liang2-30/+53
2020-07-08perf/x86/intel/lbr: Add a function pointer for LBR readKan Liang2-7/+8
2020-07-08perf/x86/intel/lbr: Add a function pointer for LBR resetKan Liang2-17/+10
2020-07-02Merge branch 'perf/vlbr'Peter Zijlstra2-44/+116
2020-07-02perf/x86: Keep LBR records unchanged in host context for guest usageLike Xu2-7/+30
2020-07-02perf/x86: Add constraint to create guest LBR event without hw counterLike Xu2-0/+22
2020-07-02perf/x86/lbr: Add interface to get LBR informationLike Xu1-0/+20
2020-07-02perf/x86/core: Refactor hw->idx checks and cleanupLike Xu1-39/+46
2020-06-15perf/x86/intel/uncore: Expose an Uncore unit to IIO PMON mappingRoman Sudarikov2-0/+200
2020-06-15perf/x86/intel/uncore: Wrap the max dies calculation into an accessorRoman Sudarikov2-6/+10
2020-06-15perf/x86/intel/uncore: Expose an Uncore unit to PMON mappingRoman Sudarikov2-0/+20
2020-06-15perf/x86/intel/uncore: Validate MMIO address before accessingKan Liang3-0/+21
2020-06-15perf/x86/intel/uncore: Record the size of mapped areaKan Liang3-4/+21
2020-06-15perf/x86/intel/uncore: Fix oops when counting IMC uncore events on some TGLKan Liang1-1/+2
2020-06-15perf/x86/intel/uncore: Add Comet Lake supportKan Liang2-0/+68
2020-05-28perf/x86/rapl: Move RAPL support to common x86 codeStephane Eranian2-804/+0
2020-05-28Merge tag 'v5.7-rc7' into perf/core, to pick up fixesIngo Molnar1-0/+1
2020-05-19perf/x86: Replace zero-length array with flexible-arrayGustavo A. R. Silva2-2/+2
2020-05-19perf/x86/intel: Add more available bits for OFFCORE_RESPONSE of Intel TremontKan Liang1-2/+2
2020-05-19perf/x86/rapl: Add Ice Lake RAPL supportKan Liang1-0/+2
2020-04-30perf/x86/intel/pt: Drop pointless NULL assignment.Paul Gortmaker1-2/+0
2020-04-22perf/x86/cstate: Add Jasper Lake CPU supportHarry Pan1-0/+1
2020-04-08perf/x86/intel/uncore: Add Ice Lake server uncore supportKan Liang3-0/+522
2020-03-25Merge branch 'x86/cpu' into perf/core, to resolve conflictIngo Molnar3-110/+98
2020-03-24x86/perf/events: Convert to new CPU match macrosThomas Gleixner3-108/+96
2020-03-20perf/x86/intel/uncore: Factor out __snr_uncore_mmio_init_boxKan Liang1-3/+9
2020-03-20perf/x86/intel/uncore: Add box_offsets for free-running countersKan Liang1-1/+4
2020-02-11perf/x86: Add Intel Tiger Lake uncore supportKan Liang3-0/+173
2020-02-11perf/x86/intel: Output LBR TOS information correctlyKan Liang1-3/+9
2020-02-11perf/core: Add new branch sample type for HW index of raw branch recordsKan Liang1-0/+3
2020-02-11perf/x86/intel: Avoid unnecessary PEBS_ENABLE MSR access in PMIKan Liang1-3/+22
2020-02-11perf/x86/intel: Fix inaccurate period in context switch for auto-reloadKan Liang1-0/+2
2020-02-11perf/x86/cstate: Add Tremont supportKan Liang1-9/+13
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