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path: root/arch/sh/drivers/pci/pci-sh7780.c
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2012-03-28SH: pci-sh7780: enable big-endian operation.Thomas Schwinge1-3/+12
If in big-endian mode, switch the PCI bus, too. Tested on both litte-endian and big-endian sh7785lcr. Signed-off-by: Thomas Schwinge <thomas@codesourcery.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: linux-sh@vger.kernel.org Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-02-24sh: Fix typo in pci-sh7780.cMasanari Iida1-1/+1
Correct spelling "erorr" to "error" in arch/sh/drivers/pci/pci-sh7780.c Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-10-28SH: irq: Remove IRQF_DISABLEDYong Zhang1-1/+1
Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-06-23sh: Fix typos in PCI initialization messageMatt Fleming1-1/+1
This typo seems to have been copy and pasted in the PCI initialization code. Replace 'intialization' with 'initialization'. Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-02-05sh: Fix an off-by-1 in SH7780 PCIC memory resource mapping.Paul Mundt1-5/+5
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-03sh: Fix up early PCI PERR/SERR IRQ handling.Paul Mundt1-1/+1
This adds support for handling early PERR/SERR triggering in between controller registration and the initial bus scan. Buggy cards end up asserting these as soon as the M66EN scan is undertaken, resulting in an early crash. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Improved multi-resource handling for SH7780 PCI.Paul Mundt1-22/+64
The SH7780 PCI controller supports 3 different ranges of PCI memory in addition to its PCI I/O window. In the case of 29-bit mode, only 2 memory windows are supported, while in 32-bit mode all 3 are visible. This attempts to make the resource handling completely dynamic and to permit platforms to map in as many apertures as they can handle. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Hook up ERR/PERR/SERR detection for SH7780 PCI host controllers.Paul Mundt1-28/+175
These were never handled before, so implement some common infrastructure to support them, then make use of that in the SH7780-specific code. In practice there is little here that can not be generalized for SH4 parts, which will be an incremental change as the 7780/7751 code is gradually unified. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Handle PCI controller resource conflicts.Paul Mundt1-1/+4
register_pci_controller() can fail, but presently is a void function. Change this over to an int so that we can bail early before continuing on with post-registration initialization (such as throwing the controller in to 66MHz mode in the case of the SH7780 host controller). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Enable PCI66 support for SH7780 host controller.Paul Mundt1-0/+29
This adds some helper glue for scanning the bus and determining if all of the devices are 66MHz capable or not before flipping on 66MHz mode. This isn't quite to spec, but it's fairly consistent with what other embedded controllers end up having to do. Scanning code cribbed from the MIPS txx9 PCI code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01sh: Fix up large system memory handling for SH7780 PCI.Paul Mundt1-6/+28
For systems that have more than 512MB we need to set up an additional mapping, this fixes up the rounding to the next power of two and splits out the mapping accordingly between the two local bus mapping windows. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-29sh: Kill off broken type 1 PCI config access checks.Paul Mundt1-4/+0
The host controllers only support type 1, so there's not much else to test for. Some of the older controllers also supported type 2 accesses, but we've never supported those, and likely never will. Beyond that, the P1SEG test is meaningless for 32-bit mode, so rather than refactoring it, just kill the type 1 test off completely. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-29sh: Reworked SH7780 PCI initialization.Paul Mundt1-66/+83
This consolidates the PCI initialization code for all of the pci-sh7780 users, and sets up the memory window dynamically as opposed to using hardcoded window positions. A number of bugs were fixed at the same time, including the PIO handling and master abort timeout settings being incorrect. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-05-26sh: pci-sh7780: Fix up for PCI_DISABLE_MWI changes.Paul Mundt1-6/+1
This fixes a build error where references to pci_cache_line_size are undefined, as this ceases to be exported when PCI_DISABLE_MWI is enabled, as is now the default. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: Kill off the now unused hose->io_base.Paul Mundt1-1/+0
Nothing is using this any more, so kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: Track io and mem_offset per-channel.Paul Mundt1-0/+2
This implements a per-hose offset for I/O and mem resources. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: New-style controller registration.Paul Mundt1-47/+40
This moves off of the board_pci_channels[] approach for bus registration and over to a cleaner register_pci_controller(), all derived from the MIPS code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Start unifying the SH7780 PCIC initialization.Paul Mundt1-19/+31
This starts moving out the common initialization bits from the various fixup paths in to the shared init path. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Kill off platform-specific multi-window mappings.Paul Mundt1-8/+16
Commit 68b42d1b548be1840aff7122fdebeb804daf0fa3 ("sh: sh7785lcr: Map whole PCI address space.") changed around the semantics of how various chip-selects are made accessible to PCI. Now that there is a single large mapping covering from CS0-CS6, there is no longer any need to do multi-window mapping. Subsequently, all of the differing implementations can be consolidated in to pci-sh7780. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Consolidate PCI I/O and mem window definitions for SH7780.Paul Mundt1-3/+22
This consolidates all of the PCI I/O and memory window definitions across the pci-sh7780 users in pci-sh7780 itself. No functional changes, in that every platform had exactly the same implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Set the I/O port base to the SH7780 I/O window default.Paul Mundt1-0/+2
Presently the I/O port base isn't being set anywhere, which allows things like generic_inl() to blow up. Fix this up to point at the PCI IO window. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Set pci_cache_line_size on SH7780 via the PCICLS register.Paul Mundt1-9/+12
The SH7780 PCIC contains a read-only cache line size register that we can derive pci_cache_line_size from. So, make sure that the software idea of the cache line size actually matches the host controller's idea. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Use the proper write size for class/sub-class code.Paul Mundt1-2/+4
Don't use pci_write_reg() for these, as it defaults to 32-bit. Rather than using the helper, use __raw_writeb() directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Rework SH7780 host controller detection.Paul Mundt1-18/+24
This reworks how the host controller is probed, and makes it a bit more verbose in the event a new type of controller is detected. Additionally, we also log the revision information. This now uses the proper access sizes for the vendor/device registers, rather than relying on a larger access that encapsulated both of them. Not all devices support 32-bit read cycles for these registers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Set class/sub-class code correctly for SH7780 PCIC.Paul Mundt1-4/+3
The SH7780 PCI host controller implements a configuration header that requires a fair bit of hand-holding to initialize properly. By default it appears as a pre-2.0 host controller given the zeroed out class code, so fix this up properly. Some boards that happened to be using the R7780RP version of the PCIC fixups had set this correctly, but this belongs in the standard initialization, and is by no means board specific. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Move se7780 INTC fixups out of pci-sh7780.c.Paul Mundt1-24/+0
These fixups belong in the board INTC setup code, not in the middle of pci-sh7780.c. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Kill off useless debugging printk() in pci-sh7780 init.Paul Mundt1-12/+0
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: pci: Kill off unused SH4_PCIC_NO_RESET code.Paul Mundt1-15/+0
Nothing ended up using this anymore, so just kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: add io_base member to pci_channelMagnus Damm1-2/+3
Store the io window base address in struct pci_channel and use that one instead of SH77xx_PCI_IO_BASE. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: add reg_base member to pci_channelMagnus Damm1-0/+2
Store the base address of the pci host controller registers in struct pci_channel and use the address in pci_read_reg() and pci_write_reg(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: avoid using PCIBIOS_MIN_xxxMagnus Damm1-6/+4
Replaces PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM with direct struct pci_channel access. This allows us to have more than one pci channel. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: add init member to pci_channel dataMagnus Damm1-5/+4
This patch adds an init callback to struct pci_channel and makes sure it is initialized properly. Code is added to call this init function from pcibios_init(). Return values are adjusted and a warning is is printed if init fails. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: pass along struct pci_channelMagnus Damm1-15/+16
These patches rework the pci code for the sh architecture. Currently each board implements some kind of ioport to address mapping. Some boards use generic_io_base others try passing addresses as io ports. This is the first set of patches that try to unify the pci code as much as possible to avoid duplicated code. This will in the end lead to fewer lines board specific code and more generic code. This patch makes sure a struct pci_channel pointer is passed along to various pci functions such as pci_read_reg(), pci_write_reg(), pci_fixup_pcic(), sh7751_pcic_init() and sh7780_pcic_init(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-04sh: sh7785lcr: Map whole PCI address space.Takashi Yoshii1-10/+6
PCI still doesn't work on sh7785lcr 29bit 256M map mode. On SH7785, PCI -> SHwy address translation is not base+offset but somewhat like base|offset (See HW Manual (rej09b0261) Fig. 13.11). So, you can't export CS2,3,4,5 by 256M at CS2 (results CS0,1,2,3 exported, I guess). There are two candidates. a) 128M@CS2 + 128M@CS4 b) 512M@CS0 Attached patch is B. It maps 512M Byte at 0 independently of memory size. It results CS0 to CS6 and perhaps some more being accessible from PCI. Tested on 7785lcr 29bit 128M map 7785lcr 29bit 256M map (NOT tested on 32bit) Signed-off-by: Takashi YOSHII <yoshii.takashi@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-10sh: pci-sh7780: fix pci memory address for fixed PMBYoshihiro Shimoda1-2/+2
Fix the problem that cannot work a PCI device when 32-bit physical address mode. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-12-22sh: pci-sh7780: fix pci memory address maskYoshihiro Shimoda1-7/+5
Fix the problem that cannot work a PCI device when system memory size is 256Mbyte in 29bit address mode. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-02-14sh: use ctrl_in/out for on chip pci accessMagnus Damm1-1/+1
This patch makes sure ctrl_inN/outN are used instead of inN/outN for on chip pci registers. Without this patch addresses may be adjusted using the value in generic_io_base. This patch makes it possible to set generic_io_base and have pci without reading and writing all over the place. Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: Katsuya MATSUBARA <matsu@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28sh: Add support for SH7763 CPU subtype.Yoshihiro Shimoda1-0/+1
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21sh: remove sh7780 interrupt controller hack from pci codeMagnus Damm1-13/+0
This patch removes the sh778x specific pci code that pokes in the interrupt controller and overwrites things. The new and improved IRL code manages this in plat_irq_setup() and plat_irq_setup_pins() instead. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07sh: SH7780 Solution Engine board support.Nobuhiro Iwamatsu1-8/+22
This adds support for the SH7780-based Solution Engine reference board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-07sh: Add SH7785 Highlander board support (R7785RP).Paul Mundt1-4/+13
This adds preliminary support for the SH7785-based Highlander board. Some of the Highlander support code is reordered so that most of it can be reused directly. This also plugs in missing SH7785 checks in the places that need it, as this is the first board to support the CPU. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: Drop CPU subtype IRQ headers.Paul Mundt1-0/+14
This drops the various IRQ headers that were floating around and primarily providing hardcoded IRQ definitions for the various CPU subtypes. This quickly got to be an unmaintainable mess, made even more evident by the subtle breakage introduced by the SH-2 and SH-2A changes. Now that subtypes are able to register IRQ maps directly, just rip all of the headers out. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-03sh: Kill off remaining config.h references.Paul Mundt1-2/+0
A few of these managed to sneak back in, get rid of them once and for all. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Consolidated SH7751/SH7780 PCI support.Paul Mundt1-236/+34
This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Add support for R7780RP and R7780MP boards.Paul Mundt1-0/+341
This adds support for the Renesas SH7780 development boards, R7780RP and R7780MP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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