Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-11-15 | Merge tag 'riscv-for-linus-4.15-arch-v9-premerge' of git://git.kernel.org/pub... | Linus Torvalds | 102 | -0/+9776 |
2017-09-27 | RISC-V: Build Infrastructure | Palmer Dabbelt | 9 | -0/+579 |
2017-09-27 | RISC-V: User-facing API | Palmer Dabbelt | 27 | -0/+1687 |
2017-09-27 | RISC-V: Paging and MMU | Palmer Dabbelt | 8 | -0/+1192 |
2017-09-27 | RISC-V: Device, timer, IRQs, and the SBI | Palmer Dabbelt | 9 | -0/+566 |
2017-09-27 | RISC-V: Task implementation | Palmer Dabbelt | 9 | -0/+1243 |
2017-09-27 | RISC-V: ELF and module implementation | Palmer Dabbelt | 4 | -0/+187 |
2017-09-27 | RISC-V: Generic library routines and assembly | Palmer Dabbelt | 11 | -0/+1389 |
2017-09-27 | RISC-V: Atomic and Locking Code | Palmer Dabbelt | 10 | -0/+1423 |
2017-09-27 | RISC-V: Init and Halt Code | Palmer Dabbelt | 15 | -0/+1524 |