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path: root/arch/riscv/include/asm/atomic.h
AgeCommit message (Expand)AuthorFilesLines
2018-07-25locking/atomics: Rework ordering barriersMark Rutland1-12/+5
2018-06-21atomics/treewide: Make unconditional inc/dec ops optionalMark Rutland1-76/+0
2018-06-21atomics/treewide: Make test ops optionalMark Rutland1-46/+0
2018-06-21atomics/riscv: Define atomic64_fetch_add_unless()Mark Rutland1-6/+2
2018-06-21atomics/treewide: Make atomic_fetch_add_unless() optionalMark Rutland1-0/+1
2018-06-21atomics/treewide: Make atomic64_inc_not_zero() optionalMark Rutland1-7/+0
2018-06-21atomics/treewide: Remove redundant atomic_inc_not_zero() definitionsMark Rutland1-9/+0
2018-06-21atomics/treewide: Rename __atomic_add_unless() => atomic_fetch_add_unless()Mark Rutland1-2/+2
2018-04-03riscv/atomic: Strengthen implementations with fencesAndrea Parri1-149/+268
2017-11-29RISC-V: Comment on why {,cmp}xchg is ordered how it isPalmer Dabbelt1-2/+7
2017-11-29RISC-V: Remove unused arguments from ATOMIC_OPPalmer Dabbelt1-47/+47
2017-09-27RISC-V: Atomic and Locking CodePalmer Dabbelt1-0/+375