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2013-08-24powerpc/85xx: Add support for 85xx cpu type detectionHaijun.Zhang1-0/+92
Add this file to help detect cpu type in runtime. These macros will be more favorable for driver to apply errata and workaround to specified cpu type. Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-21powerpc/e500: Set -mcpu flag for 32-bit e500Scott Wood1-0/+8
Unlike 64-bit, we don't currently support multiplatform between e500 and non-e500, so the -mcpu is not configurable at this time. -msoft-float is specified when testing for -mcpu=8540 because otherwise some older toolchains will fail with "error: E500 and FPRs not supported". Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-21powerpc/booke64: Use appropriate -mcpuScott Wood2-0/+22
By default use -mcpu=powerpc64 rather than -mtune=power7 Add options for e5500/e6500, with fallbacks for older compilers. Hide the POWER cpu options in booke configs. Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-21powerpc/85xx: Remove -Wa,-me500Scott Wood1-1/+0
This caused lwsync to be converted to sync on 64-bit (on 32-bit lwsync is generated at runtime, and so wasn't affected). Not using lwsync caused a significant slowdown on certain workloads. Setting this flag for any e500-enabled build is also not friendly to multiplatform kernels. Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-21powerpc: Convert some mftb/mftbu into mfsprScott Wood7-19/+29
Some CPUs (such as e500v1/v2) don't implement mftb and will take a trap. mfspr should work on everything that has a timebase, and is the preferred instruction according to ISA v2.06. Currently we get away with mftb on 85xx because the assembler converts it to mfspr due to -Wa,-me500. However, that flag has other effects that are undesireable for certain targets (e.g. lwsync is converted to sync), and is hostile to multiplatform kernels. Thus we would like to stop setting it for all e500-family builds. mftb/mftbu instances which are in 85xx code or common code are converted. Instances which will never run on 85xx are left alone. Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-21powerpc/fsl-booke: Work around erratum A-006958Scott Wood4-4/+32
Erratum A-006598 says that 64-bit mftb is not atomic -- it's subject to a similar race condition as doing mftbu/mftbl on 32-bit. The lower half of timebase is updated before the upper half; thus, we can share the workaround for a similar bug on Cell. This workaround involves looping if the lower half of timebase is zero, thus avoiding the need for a scratch register (other than CR0). This workaround must be avoided when the timebase is frozen, such as during the timebase sync code. This deals with kernel and vdso accesses, but other userspace accesses will of course need to be fixed elsewhere. Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-16powerpc/wsp: Fix early debug buildBenjamin Herrenschmidt1-37/+1
When reworking udbg_16550.c I forgot to remove the old and now useless code for the CONFIG_PPC_EARLY_DEBUG_WSP case, which doesn't build as a result. I also missed a cast. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make rwlocks endian safeAnton Blanchard4-0/+21
Our ppc64 spinlocks and rwlocks use a trick where a lock token and the paca index are placed in the lock with a single store. Since we are using two u16s they need adjusting for little endian. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Fix little endian coredumpsAnton Blanchard1-2/+6
We need to set ELF_DATA correctly on LE coredumps. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc/pseries: Fix endian issues in H_GET_TERM_CHAR/H_PUT_TERM_CHARAnton Blanchard1-4/+5
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Little endian SMP IPI demuxAnton Blanchard1-9/+10
Add little endian support for demuxing SMP IPIs Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Emulate instructions in little endian modeAnton Blanchard1-1/+1
Alistair noticed we got a SIGILL on userspace mfpvr instructions. Remove the little endian check in the emulation code, it is probably there to protect against the old pseudo little endian implementations but doesn't make sense for real little endian. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Fix little endian lppaca, slb_shadow and dtl_entryAnton Blanchard15-32/+65
The lppaca, slb_shadow and dtl_entry hypervisor structures are big endian, so we have to byte swap them in little endian builds. LE KVM hosts will also need to be fixed but for now add an #error to remind us. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Add endian annotations to lppaca, slb_shadow and dtl_entryAnton Blanchard1-25/+25
Add endian annotation to various hypervisor structures which are defined as big endian. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make NUMA device node code endian safeAlistair Popple1-48/+52
The device tree is big endian so make sure we byteswap on little endian. We assume any pHyp calls also return big endian results in memory. Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Little endian fixes for legacy_serial.cAlistair Popple1-3/+3
Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make PCI device node device tree accesses endian safeAnton Blanchard1-9/+11
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make OF PCI device tree accesses endian safeAnton Blanchard2-13/+16
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make device tree accesses in VIO subsystem endian safeAnton Blanchard1-14/+17
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make prom_init.c endian safeBenjamin Herrenschmidt1-106/+147
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make device tree accesses in cache info code endian safeAnton Blanchard1-6/+6
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: of_parse_dma_window should take a __be32 *dma_windowAnton Blanchard5-17/+17
We pass dma_window to of_parse_dma_window as a void * and then run through hoops to cast it back to a u32 array. In the process we lose endian annotation. Simplify it by just passing a __be32 * down. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Fix some endian issues in xics codeAnton Blanchard1-5/+5
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Add some endian annotations to time and xics codeAnton Blanchard2-2/+2
Fix a couple of sparse warnings. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: More little endian fixes for setup-common.cAlistair Popple1-2/+5
Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make logical to real cpu mapping code endian safeAnton Blanchard1-3/+3
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make RTAS calls endian safeAnton Blanchard2-23/+23
RTAS expects arguments in the call buffer to be big endian so we need to byteswap on little endian builds Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make cache info device tree accesses endian safeAnton Blanchard1-5/+5
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make RTAS device tree accesses endian safeAnton Blanchard1-14/+14
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: More little endian fixes for prom.cAlistair Popple1-2/+2
Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make prom.c device tree accesses endian safeIan Munsie1-29/+31
On PowerPC the device tree is always big endian, but the CPU could be either, so add be32_to_cpu where appropriate and change the types of device tree data to __be32 etc to allow sparse to locate endian issues. Signed-off-by: Ian Munsie <imunsie@au1.ibm.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Avoid link stack corruption for MMU on exceptionsMichael Neuling2-19/+20
When we have MMU on exceptions (POWER8) and a relocatable kernel, we need to branch from the initial exception vectors at 0x0 to up high where the kernel might be located. Currently we do this using the link register. Unfortunately this corrupts the link stack and instead we should use the count register. We did this for the syscall entry path in: 6a40480 powerpc: Avoid link stack corruption in MMU on syscall entry path but I stupidly forgot to do the same for other exceptions. This patch changes the initial exception vectors to use the count register instead of the link register when we need to branch up to the relocated kernel. I have a dodgy userspace test which loops calling a function that reads the PVR (mfpvr in userspace will be emulated by the kernel via the program check exception). On POWER8 and with CONFIG_RELOCATABLE=y, I get a ~10% performance improvement with my userspace test with this patch. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make chip-id information available to userspaceVasant Hegde3-0/+17
So far "/sys/devices/system/cpu/cpuX/topology/physical_package_id" was always default (-1) on ppc64 architecture. Now, some systems have an ibm,chip-id property in the cpu nodes in the device tree. On these systems, we now use this information to display physical_package_id. Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc/eeh: powerpc/eeh: Fix undefined variableMike Qiu1-14/+8
changes for V4: - changes the type of frozen_pe_no from %d to %llu in pr_devel() 'pe_no' hasn't been defined, it should be an typo error, it should be 'frozen_pe_no'. Also '__func__' has missed in IODA_EEH_DBG(), For safety reasons, use pr_devel() directly, instead of use IODA_EEH_DBG() Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14Revert "powerpc/e500: Update compilation flags with core specific options"Benjamin Herrenschmidt1-16/+2
This reverts commit c8db32c8669f7de05b820ee4934926405af52188. The commit breaks the build of all my 64-bit embedded configs. It looks like gcc-4.7.3 doesn't know about e5500. Additionally it incorrectly does -mcpu=e5500 on a config that has both e5500 and A2 support enabled. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> ---
2013-08-14powerpc: Use ibm, chip-id property to compute cpu_core_mask if availablePaul Mackerras1-3/+45
Some systems have an ibm,chip-id property in the cpu nodes in the device tree. On these systems, we now use that to compute the cpu_core_mask (i.e. the set of core siblings) rather than looking at cache properties. Signed-off-by: Paul Mackerras <paulus@samba.org> Tested-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Pull out cpu_core_mask updates into a separate functionPaul Mackerras1-28/+28
This factors out the details of updating cpu_core_mask into a separate function, to make it easier to change how the mask is calculated later. This makes no functional change. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Fix denormalized exception handlerPaul Mackerras1-5/+6
The denormalized exception handler (denorm_exception_hv) has a couple of bugs. If the CONFIG_PPC_DENORMALISATION option is not selected, or the HSRR1_DENORM bit is not set in HSRR1, we don't test whether the interrupt occurred within a KVM guest. On the other hand, if the HSRR1_DENORM bit is set and CONFIG_PPC_DENORMALISATION is enabled, we corrupt the CFAR and PPR. To correct these problems, this replaces the open-coded version of EXCEPTION_PROLOG_1 that is there currently, and that is missing the saving of PPR and CFAR values to the PACA, with an instance of EXCEPTION_PROLOG_1. This adds an explicit KVMTEST after testing whether the exception is one we can handle, and adds code to restore the CFAR on exit. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Ignore zImage.epaprMark Brown1-0/+1
This is another file we can generate so add it to the list. Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc/math-emu: Fix load/store indexed emulationJames Yang1-10/+5
Load/store indexed instructions where the index register RA=R0, such as "lfdx f1,0,r3", are not illegal. Load/store indexed with update instructions where the index register RA=R0, such as "lfdux f1,0,r3", are invalid, and, to be consistent with existing math-emu behavior for other invalid instruction forms, will signal as illegal. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Remove the empty giveup_fpu() function on 32bit kernelKevin Hao6-33/+4
Instead of implementing an empty giveup_fpu() function for each 32bit processor type, replace them with an unique empty inline function. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Make flush_fp_to_thread() nop when CONFIG_PPC_FPU is disabledKevin Hao3-3/+9
In the current kernel, the function flush_fp_to_thread() is not dependent on CONFIG_PPC_FPU. So most invocations of this function is not wrapped by CONFIG_PPC_FPU. Even through we don't really save the FPRs to the thread struct if CONFIG_PPC_FPU is not enabled, but there does have some runtime overhead such as the check for tsk->thread.regs and preempt disable and enable. It really make no sense to do that. So make it a nop when CONFIG_PPC_FPU is disabled. Also remove the wrapped #ifdef CONFIG_PPC_FPU when invoking this function. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Remove the redundant flush_fp_to_thread() in setup_sigcontext()Kevin Hao1-2/+0
In commit c6e6771b(powerpc: Introduce VSX thread_struct and CONFIG_VSX) we add a invocation of flush_fp_to_thread() before copying the FPR or VSR to users. But we already invoke the flush_fp_to_thread() in this function. So remove one of them. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc/mpc85xx: Only emulate the unimplemented FP instructions on corenet64Kevin Hao1-0/+1
We have split the math emulation into two parts. This makes it possible to just emulate the unimplemented floating point instructions on these boards. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: remove the unused function disable_kernel_fp()Kevin Hao2-14/+0
The only using of function disable_kernel_fp() was already dropped in the commit 5daf9071 (powerpc: merge align.c). Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: split She math emulation into two partsKevin Hao3-18/+46
For some SoC (such as the FSL BookE) even though there does have a hardware FPU, but not all floating point instructions are implemented. Unfortunately some versions of gcc do use these unimplemented instructions. Then we have to enable the math emulation to workaround this issue. It seems a little redundant to have the support to emulate all the floating point instructions in this case. So split the math emulation into two parts. One is for the SoC which doesn't have FPU at all and the other for the SoC which does have the hardware FPU and only need some special floating point instructions to be emulated. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc: Introduce function emulate_math()Kevin Hao1-45/+34
There are two invocations of do_mathemu() in traps.c. And the codes in these two places are almost the same. Introduce a locale function to eliminate the duplication. With this change we can also make sure that in program_check_exception() the PPC_WARN_EMULATED is invoked for the correctly emulated math instructions. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc/math-emu: Move the flush FPU state function into do_mathemuKevin Hao2-9/+9
By doing this we can make sure that the FPU state is only flushed to the thread struct when it is really needed. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc/85xx: Enable the math emulation for the corenet64_smp_defconfigKevin Hao1-0/+1
I got the following error on my t4240qds board. ntpd[2713]: unhandled signal 4 at 0fd5b448 nip 0fd5b448 lr 0fd5b424 code 30001 The root cause is that the float point instruction 'fsqrt' is used. But this instruction is not implemented on e6500 core. Even this does seem a gcc bug, I would like to enable the math emulation in the kernel to workaround this kind of issue. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-08-14powerpc/8xx: Remove last traces of 8XX_MINIMAL_FPEMUPaul Bolle3-203/+0
The Kconfig symbol 8XX_MINIMAL_FPEMU was removed in commit 968219fa33 ("powerpc/8xx: Remove 8xx specific "minimal FPU emulation""). But that commit didn't remove all code depending on that symbol. Do so now. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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