summaryrefslogtreecommitdiff
path: root/arch/powerpc/include/asm/cputable.h
AgeCommit message (Expand)AuthorFilesLines
2015-03-16powerpc/book3s: Fix flush_tlb cpu_spec hook to take a generic argument.Mahesh Salgaonkar1-1/+7
2015-01-23powerpc: Remove unused CPU_FTR_IABRMichael Ellerman1-1/+1
2014-11-10powerpc: Remove unused CPU_FTRS_A2Michael Ellerman1-6/+2
2014-11-10powerpc: Remove CPU_FTR_HVMODE from CPU_FTRS_ALWAYSMichael Ellerman1-1/+1
2014-08-13powerpc: Add POWER8 features to CPU_FTRS_POSSIBLE/ALWAYSMichael Ellerman1-2/+4
2014-08-05Merge remote-tracking branch 'scott/next' into nextBenjamin Herrenschmidt1-1/+1
2014-07-30powerpc/e6500: Add support for hardware threadsAndy Fleming1-1/+1
2014-07-28powerpc: Remove CLASSIC_PPCMichael Ellerman1-5/+2
2014-07-28powerpc: Remove CONFIG_POWER4Michael Ellerman1-1/+1
2014-07-28powerpc: Remove CONFIG_POWER3Michael Ellerman1-2/+1
2014-07-28powerpc: Remove MMU_FTR_SLBMichael Ellerman1-2/+1
2014-07-28powerpc: Drop support for pre-POWER4 cpusMichael Ellerman1-12/+6
2014-07-22powerpc: Disable doorbells on Power8 DD1.xJoel Stanley1-0/+1
2014-03-24powerpc: Add a cpu feature CPU_FTR_PMAO_BUGMichael Ellerman1-2/+4
2013-12-05powerpc/book3s: Add flush_tlb operation in cpu_spec.Mahesh Salgaonkar1-0/+5
2013-12-05powerpc/book3s: Introduce a early machine check hook in cpu_spec.Mahesh Salgaonkar1-0/+7
2013-08-21powerpc/fsl-booke: Work around erratum A-006958Scott Wood1-2/+7
2013-06-10powerpc/hw_breakpoints: Add DABRX cpu feature to fix 32-bit regressionMichael Neuling1-7/+10
2013-05-06powerpc/cputable: Reserve bits in HWCAP2 for new featuresNishanth Aravamudan1-0/+2
2013-05-02powerpc: Replace CPU_FTR_BCTAR with CPU_FTR_ARCH_207SMichael Ellerman1-4/+4
2013-04-30Merge remote-tracking branch 'kumar/next' into nextBenjamin Herrenschmidt1-1/+1
2013-04-26powerpc: Add HWCAP2 aux entryMichael Neuling1-0/+1
2013-03-13powerpc/85xx: Add AltiVec support for e6500Kumar Gala1-1/+1
2013-02-15powerpc: Add transactional memory to POWER8 cpu featuresMichael Neuling1-1/+2
2013-02-15powerpc: Add new CPU feature bit for transactional memoryMichael Neuling1-0/+7
2013-02-08powerpc: Add support for context switching the TAR registerIan Munsie1-1/+1
2013-01-10powerpc: Add DAWR CPU feature bit definitionMichael Neuling1-1/+2
2013-01-10powerpc: Repack 64bit CPU features to remove holesMichael Neuling1-24/+26
2013-01-10powerpc: Remove extra zeros from 32 bit CPU features definitionsMichael Neuling1-31/+31
2013-01-10powerpc: Enable PPR save/restoreHaren Myneni1-2/+4
2013-01-10powerpc: Hook up doorbells on serverIan Munsie1-1/+2
2012-11-15powerpc: POWER8 cputable entryMichael Neuling1-2/+10
2012-10-09UAPI: (Scripted) Disintegrate arch/powerpc/include/asmDavid Howells1-34/+1
2012-08-24powerpc: Remove unnecessary ifdefsMichael Neuling1-2/+0
2012-04-12KVM: PPC: add CPU_FTR_EMB_HV to CPU tableScott Wood1-1/+1
2012-04-08KVM: PPC: e500mc supportScott Wood1-2/+4
2012-04-08powerpc/e500: split CPU_FTRS_ALWAYS/CPU_FTRS_POSSIBLEScott Wood1-4/+8
2012-04-08powerpc/booke: Set CPU_FTR_DEBUG_LVL_EXC on 32-bitScott Wood1-2/+3
2012-03-15powerpc: Add initial e6500 cpu supportKumar Gala1-4/+8
2011-12-19powerpc: POWER7 optimised copy_to_user/copy_from_user using VMXAnton Blanchard1-1/+2
2011-11-25powerpc/book3e: Add ICSWX/ACOP support to Book3e cores like A2Jimi Xenidis1-1/+1
2011-07-12powerpc, KVM: Split HVMODE_206 cpu feature bit into separate HV and architect...Paul Mackerras1-6/+8
2011-05-19powerpc/fsl-booke64: Add support for Debug Level exception handlerKumar Gala1-1/+3
2011-05-04powerpc: Save Come-From Address Register (CFAR) in exception framePaul Mackerras1-2/+3
2011-05-04powerpc: Add Initiate Coprocessor Store Word (icswx) supportTseng-Hui (Frank) Lin1-1/+3
2011-04-27powerpc: Free up some CPU feature bits by moving out MMU-related featuresMatt Evans1-23/+14
2011-04-27powerpc: Add A2 cpu supportBenjamin Herrenschmidt1-2/+6
2011-04-20powerpc: Define CPU feature for Architected 2.06 HV modeBenjamin Herrenschmidt1-1/+2
2011-04-12powerpc/e500mc: Remove CPU_FTR_MAYBE_CAN_NAP/CPU_FTR_MAYBE_CAN_DOZEScott Wood1-2/+1
2011-04-12powerpc/book3e: Fix CPU feature handling on 64-bit e5500Kumar Gala1-0/+13