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2011-10-07powerpc/85xx: Rename p2040_rdb.c to p2041_rdb.cMingkai Hu2-41/+36
There's only p2041rdb board for official release, but the p2041 silicon on the board can be converted to p2040 silicon without XAUI and L2 cache function, then the board becomes p2040rdb board. so we use the file name p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also consistent with the board name under U-Boot. During the rename we make few other minor changes to the device tree: * Move USB phy setting into p2041si.dtsi as its SoC not board defined * Convert PCI clock-frequency to decimal to be more readable Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-07powerpc/85xx: Rename PowerPC core nodes to match other e500mc based .dtsKumar Gala1-8/+8
The P4080 silicon device tree was using PowerPC,4080 while the other e500mc based SoCs used PowerPC,e500mc. Use the core name to be consistent going forward. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-07powerpc/mpc8349emitx: mark localbus as compatible with simple-busDmitry Eremin-Solenikov1-1/+2
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-07powerpc/85xx: sbc8560 - declare that localbus is compatbile with simple-busDmitry Eremin-Solenikov1-1/+1
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-07powerpc/85xx: ksi8560 - declare that localbus is compatbile with simple-busDmitry Eremin-Solenikov1-1/+1
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-23powerpc/5200: dts: digsy_mtc.dts: enable both MSCAN nodesAnatolij Gustschin1-8/+0
We use both MSCAN controllers on this board, so do not disable them in the device tree. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-23powerpc/5200: dts: digsy_mtc.dts: add timer0 and timer1 gpio propertiesAnatolij Gustschin1-0/+7
timer0 and timer1 pins are used as simple GPIO on this board. Add gpio-controller and #gpio-cells properties to timer nodes so that we can control gpio lines using available MPC52xx GPT driver. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-23powerpc/5200: dts: digsy_mtc.dts: update to add can, pci, serial and spiAnatolij Gustschin1-3/+47
Add new nodes to describe more hardware the board is equipped with: - two can nodes for SJA1000 on localbus - pci node to support Coral-PA graphics controller - serial node for SC28L92 DUART on localbus - spi node for MSP430 device Also correct i2c eeprom node name. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-23powerpc/5200: mpc5200b.dtsi: add spi node address- and size-cells propertiesAnatolij Gustschin1-0/+2
Both, #address-cells and #size-cells properties are required for spi bus node, so add them. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-09-20powerpc: Add skeleton PowerNV platformBenjamin Herrenschmidt1-0/+1
This adds a skeletton for the new Power "Non Virtualized" platform which will be used by machines supporting running without an hypervisor, for example in order to run KVM. These machines will be using a new firmware called OPAL for which the support will be provided by later patches. The PowerNV platform is intended to be also usable under the BML environment used internally for early CPU bringup which is why the code also supports using RTAS instead of OPAL in various places. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-09-20Merge remote-tracking branch 'origin/master' into nextBenjamin Herrenschmidt1-1/+1
(Merge in order to get the PCIe mps/mrss code fixes)
2011-09-20powerpc: Fix build dependencies for epapr.c which needs libfdt.hMatthew McClintock1-1/+1
Currently, the build can (very rarely) fail to build because libfdt.h has not been created or is in the process of being copied. Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-08-31powerpc/p1023rds: Fix the error of bank-width of nor flashChunhe Lan1-1/+1
In the p1023rds, a physical bus of nor flash is 16 bits width. The bank-width is width (in bytes) of the bus width. So, the value of bank-width of nor flash is not one, and it should be two. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-08-11powerpc/40x: Remove obsolete HCU4 boardJosh Boyer1-168/+0
The HCU4 board is unmaintained. Remove it. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2011-08-11powerpc/44x: Add NOR flash device to Yosemite dtsStefan Roese1-0/+36
Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
2011-07-22Merge remote-tracking branch 'jwb/next' into nextBenjamin Herrenschmidt2-3/+24
2011-07-12powerpc/44x: Use correct phy-address dt nodes on taishan.dtsStefan Roese1-2/+2
Taishan (440GX) has the first PHY (EMAC2) mapped at PHY address 1 and the 2nd PHY (EMAC3) at PHY address 3. Use "phy-address" to correctly describe this instead of "phy-map". Signed-off-by: Stefan Roese <sr@denx.de> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2011-07-12powerpc/44x: boot wrapper: allow kernel to load into non-zero addressDave Kleikamp1-1/+22
For AMP, different kernel instances load into separate memory regions. Read the start of memory from the device tree and limit the memory to what's specified in the device tree. Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2011-07-08powerpc/p1022ds: Remove fixed-link property from ethernet nodes.Felix Radensky1-2/+0
On P1022DS both ethernet controllers are connected to RGMII PHYs accessible via MDIO bus. Remove fixed-link property from ethernet nodes as they only required when fixed link PHYs without MDIO bus are used. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-08powerpc/85xx: Add p2040 RDB board supportMingkai Hu2-0/+789
P2040RDB Specification: ----------------------- 2Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) 128 Mbyte NOR flash single-chip memory 256 Kbit M24256 I2C EEPROM 16 Mbyte SPI memory SD connector to interface with the SD memory card dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) dTSEC5: connected to the Vitesse RGMII PHY (VSC8641) I2C1: Real time clock, Temperature sensor I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors UART: supports two UARTs up to 115200 bps for console USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces PCIe: - Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 - Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2 Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-07powerpc/85xx: Add P5020 SoC device tree include stubKumar Gala2-570/+653
Split out common (non-board specific) parts of the SoC related device tree into a stub so multiple board dts files can include it and we can reduce duplication and maintenance effort. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-07powerpc/85xx: Add P3041 SoC device tree include stubKumar Gala2-578/+661
Split out common (non-board specific) parts of the SoC related device tree into a stub so multiple board dts files can include it and we can reduce duplication and maintenance effort. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-30Merge remote branch 'origin/master' into nextBenjamin Herrenschmidt3-7/+6
2011-06-29Merge remote branch 'jwb/next' into nextBenjamin Herrenschmidt3-1/+24
2011-06-28powerpc/4xx: Update Canyonlands and Glacier boards DTS to add HW RNG supportMike Williams2-1/+12
This will allow the new HW RNG driver to bind on these boards Signed-off-by: Mike Williams <mike@mikebwilliams.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2011-06-28ppc4xx: Add crypto and RNG entries to Sequoia DTSJosh Boyer1-0/+12
The Sequoia board has a Security function IP block on it that contains a TRNG. Add the crypto and rng portions of that IP block to the DTS. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2011-06-27powerpc/85xx: Add P1010RDB board supportPrabhakar Kushwaha2-0/+656
P1010RDB Overview ----------------- 1Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 32Mbyte SLC NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory I2C Board 128x8 bit memory SD/MMC connector to interface with the SD memory card 2 SATA interface 1 internal SATA connect to 2.5. 160G SATA2 HDD 1 eSATA connector to rear panel USB 2.0 x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface. x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet eTSEC1: Connected to RGMII PHY VSC8641XKO eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY VSC8221 eCAN Two DB-9 female connectors for Field bus interface UART DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-27powerpc/85xx: Add P4080 SoC device tree include stubKumar Gala2-587/+662
Split out common (non-board specific) parts of the SoC related device tree into a stub so multiple board dts files can include it and we can reduce duplication and maintenance effort. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-27powerpc/85xx: specify interrupt for pq3-localbus devicesDmitry Eremin-Solenikov8-0/+16
fsl-lbc driver requires an interrupt to bind to localbus device. Populate 85xx boards' dts trees with lbc interrupt info. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-27powerpc/85xx: tqm8540 - add description for onboard flashDmitry Eremin-Solenikov1-0/+40
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-27powerpc/85xx: Update device tree to add nand info for p3041dsLei Xu1-0/+39
Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-27powerpc/85xx: Update device tree to add nand info for p5020dsLei Xu1-0/+39
Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-23powerpc/85xx: Add basic P1023RDS board supportRoy Zang1-0/+546
The P1023 processor is an e500v2 based SoC that utilizes the DPAA networking architecture. This adds basic board support for non-DPAA functionality (device tree, board file, etc). Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-23powerpc/85xx: Updates to P4080DS device treeKumar Gala1-107/+222
* Added BSD dual-license * Moved mpic-parent to root so we dont need to duplicate everywhere * Added next level cache from L2 to CPC * Moved to 4-cell MPIC interrupt properties * Added 3 MSI banks * Added numerous missing nodes: soc-sram-error, guts, pins, clockgen, rcpm, sfp, serdes, etc. * Reworked PCIe interrupts to be at virtual bridge level Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-23powerpc/85xx: Add P3041DS device treeKumar Gala1-0/+752
Add basic device tree for P3041DS board. This device tree excludes support for DPAA and RapidIO nodes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-23powerpc/85xx: Add P5020DS device treeKumar Gala1-0/+745
Add basic device tree for P5020DS board. This device tree excludes support for DPAA and RapidIO nodes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-22powerpc/p1022ds: fix audio-related properties in the device treeTimur Tabi1-3/+6
On the Freescale P1022DS reference board, the SSI audio controller is connected in "asynchronous" mode to the codec's clocks, so the device tree needs an "fsl,ssi-asynchronous" property. Also remove the clock-frequency property from the wm8776 node, because the clock is enabled only if U-Boot enables it, and U-Boot will set the property if the clock is enabled. A future version of the P1022DS audio driver will configure the clock itself, but for now, the driver should not be told that the clock is running when it isn't. Also fix the FIFO depth to 15, instead of 16. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-06-09dtc/powerpc: remove obsolete .gitignore entriesWolfram Sang2-4/+0
dtc was moved and .gitignores have been added to the new location. So, we can delete the old, forgotten ones. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-05-26powerpc/4xx: Adding PCIe MSI supportRupjyoti Sarmah4-0/+84
This patch adds MSI support for 440SPe, 460Ex, 460Sx and 405Ex. Signed-off-by: Rupjyoti Sarmah <rsarmah@apm.com> Signed-off-by: Tirumala R Marri <tmarri@apm.com> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-05-24ptp: Added a clock that uses the eTSEC found on the MPC85xx.Richard Cochran4-0/+52
The eTSEC includes a PTP clock with quite a few features. This patch adds support for the basic clock adjustment functions, plus two external time stamps, one alarm, and the PPS callback. Signed-off-by: Richard Cochran <richard.cochran@omicron.at> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: John Stultz <john.stultz@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org>
2011-05-21Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds1-1/+85
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (45 commits) crypto: caam - add support for sha512 variants of existing AEAD algorithms crypto: caam - remove unused authkeylen from caam_ctx crypto: caam - fix decryption shared vs. non-shared key setting crypto: caam - platform_bus_type migration crypto: aesni-intel - fix aesni build on i386 crypto: aesni-intel - Merge with fpu.ko crypto: mv_cesa - make count_sgs() null-pointer proof crypto: mv_cesa - copy remaining bytes to SRAM only when needed crypto: mv_cesa - move digest state initialisation to a better place crypto: mv_cesa - fill inner/outer IV fields only in HMAC case crypto: mv_cesa - refactor copy_src_to_buf() crypto: mv_cesa - no need to save digest state after the last chunk crypto: mv_cesa - print a warning when registration of AES algos fail crypto: mv_cesa - drop this call to mv_hash_final from mv_hash_finup crypto: mv_cesa - the descriptor pointer register needs to be set just once crypto: mv_cesa - use ablkcipher_request_cast instead of the manual container_of crypto: caam - fix printk recursion for long error texts crypto: caam - remove unused keylen from session context hwrng: amd - enable AMD hw rnd driver for Maple PPC boards hwrng: amd - manage resource allocation ...
2011-05-20Merge remote branch 'kumar/next' into nextBenjamin Herrenschmidt10-1293/+1412
2011-05-19powerpc/85xx: Create dts of each core in CAMP mode for P1020RDBPrabhakar Kushwaha3-1/+362
Create the dts files for each core and splits the devices between the two cores for P1020RDB. Core0 has core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb, eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi. Core1 has l2, eth0, crypto. MPIC is shared between two cores but each core will protect its interrupts from other core by using "protected-sources" of mpic. Fix compatible property for global-util node of P1020si.dtsi. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19powerpc/85xx: Fix PCIe IDSEL for Px020RDBPrabhakar Kushwaha4-0/+48
PCIe device in legacy mode can trigger interrupts using the wires #INTA, #INTB ,#INTC and #INTD. PCI devices are obligated to use #INTx for interrupts under legacy mode. Each PCI slot or device is typically wired to different inputs on the interrupt controller. So, Define interrupt-map and interrupt-map-mask properties for device tree to of map each PCI interrupt signal to the inputs of the interrupt controller. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19powerpc/85xx: P2020 DTS: re-organize dts filesPrabhakar Kushwaha5-933/+564
Creates P2020si.dtsi, containing information for P2020 SoC. Modifies dts files for P2020 based systems to use dtsi file. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19powerpc/85xx: P1020 DTS : re-organize dts filesPrabhakar Kushwaha2-313/+380
Creates P1020si.dtsi, containing information for the P1020 SoC. Modifies dts files for P1020 based systems to use dtsi file Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Grant Likely <grant.likelY@secretlab.ca> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19powerpc/p1022ds: fix broken mpic timer nodeScott Wood1-47/+59
There is no hardware interrupt 0xf7. But now we can express the timer interrupt using 4-cell interrupts. This requires converting all of the other interrupt specifiers in the tree as well. Also add the second timer group, and fix the reg property to only describe the timer registers. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-05-19powerpc: Use the deterministic mode of arMichal Marek1-1/+1
Signed-off-by: Michal Marek <mmarek@suse.cz> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-05-19powerpc: Call gzip with -nMichal Marek1-3/+3
The timestamps recorded in the .gz files add no value. Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Michal Marek <mmarek@suse.cz> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2011-04-20powerpc/boot: Add an ePAPR compliant boot wrapperDavid Gibson3-1/+73
This is a first cut at making bootwrapper code which will produce a zImage compliant with the requirements set down by ePAPR. This is a very simple bootwrapper, taking the device tree blob supplied by the ePAPR boot program and passing it on to the kernel. It builds on the earlier patch to build a relocatable ET_DYN zImage to meet the other ePAPR image requirements. For good measure we have some paranoid checks which will generate warnings if some of the ePAPR entry condition guarantees are not met. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>