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path: root/arch/powerpc/boot/dts/mpc8560ads.dts
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2009-05-19powerpc/fsl: Removed reg property from 85xx/86xx soc nodeKumar Gala1-1/+0
Between the addition of the ecm/mcm law nodes and the fact that the get_immrbase() has been using the range property of the SoC to determine the base address of CCSR space we no longer need the reg property at the soc node level. It has been ill specified and varied between device trees to cover either the {e,m}cm-law node, some odd subset of CCSR space or all of CCSR space. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/85xx: Add new LAW & ECM device tree nodes for all 85xx systemsKumar Gala1-0/+13
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/fsl: Remove cell-index from PCI nodesKumar Gala1-1/+0
The cell-index property isn't used on PCI nodes and is ill defined. Remove it for now and if someone comes up with a good reason and consistent definition for it we can add it back Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-24powerpc/85xx: Move gianfar mdio nodes under the ethernet nodesAnton Vorontsov1-48/+54
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep. Suggested-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-12-17gianfar: Convert gianfar to an of_platform_driverAndy Fleming1-0/+18
Does the same for the accompanying MDIO driver, and then modifies the TBI configuration method. The old way used fields in einfo, which no longer exists. The new way is to create an MDIO device-tree node for each instance of gianfar, and create a tbi-handle property to associate ethernet controllers with the TBI PHYs they are connected to. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-07-30powerpc/fsl: proliferate simple-bus compatibility to soc nodesKim Phillips1-0/+1
add simple-bus compatible property to soc nodes for 83xx/85xx platforms that were missing them. Add same to platform probe code. This fixes SoC device drivers (such as talitos) to succeed in matching devices present in the soc node. also update mpc836x_rdk dts to new SEC bindings (overlooked in commit 3fd4473: powerpc/fsl: update crypto node definition and device tree instances). Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-28powerpc: Add dma nodes to 83xx, 85xx and 86xx boardsKumar Gala1-0/+41
Added DMA nodes for the elo/elo-plus DMA engines. Renamed the interrupt controller alias in mpc832x_rdb.dts to ipic so that its the same as all the other boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02[POWERPC] 85xx: Add next-level-cache propertyKumar Gala1-1/+1
Added next-level-cache to the L1 and a reference to the new L2 label. This is per the ePAPR 0.94 spec. Since we are't really dependent on this today we aren't supporting the "legacy" l2-cache phandle that is specified in the PPC v2.1 OF Binding spec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-02[POWERPC] Cleanup mpic nodes in .dtsKumar Gala1-0/+1
Removed clock-frequency, big-endian, and built-in props as they aren't specified anywhere. Also added compatible = "chrp,open-pic" in the places it was missing. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-17[POWERPC] 85xx: Convert dts to v1 syntaxKumar Gala1-104/+105
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-12[POWERPC] FSL: Added aliases node to device treesKumar Gala1-3/+14
Added aliases nodes for kurobox, 83xx, 85xx, and 86xx platforms. This included added labels and cell-index properties for serial and pci nodes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-12[POWERPC] FSL: enet device tree cleanupsKumar Gala1-33/+9
* Removed address fields in ethernet nodes * Removed #address-cells, #size-cells from gianfar nodes * Added cell-index to gianfar and ucc ethernet nodes * Added enet[0..3] labels * Renamed compatible node for gianfar mdio to "fsl,gianfar-mdio" * Removed device_type = "mdio" The matching for gianfar mdio still supports the old "mdio"/"gianfar" combo but it is now considered deprecated. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-11[POWERPC] 85xx: Convert mpc8560ads to the new CPM binding.Scott Wood1-38/+44
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14[POWERPC] Move PCI nodes to be sibilings with SOC nodesKumar Gala1-90/+90
Updated the device trees to have the PCI nodes be at the same level as the SOC node. This is to make it so that the SOC nodes children address space is just on chip registers and not other bus memory as well. Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge that exists in the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14[POWERPC] DTS cleanupKumar Gala1-5/+0
Removed the following cruft from .dts files: * 32-bit in cpu node -- doesn't exist in any spec and not used by kernel * removed built-in (chrp legacy) * Removed #interrupt-cells in places they don't need to be set * Fixed ranges on lite5200* * Removed clock-frequency from i8259 pic node, not sure where this came from * Removed big-endian from i8259 pic nodes, this was just bogus Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Update PCI nodes in the 83xx/85xx boards device treeRoy Zang1-1/+1
Updated the 83xx & 85xx device tree PCI related compartible property. Used the following compatible properties: PCI "fsl,mpc8349-pci" PCI "fsl,mpc8540-pci" PCI-X: "fsl,mpc8540-pcix" PCIe: "fsl,mpc8548-pcie" Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-03[POWERPC] Fix up interrupt senses for MPC85xx boardsKumar Gala1-2/+2
The PHY is active-low on the MPC85xx CDS and the 8560 ADS just had the wrong sense for the internal PCI and CPM interrupts. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-03[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chipsKumar Gala1-58/+58
Make the interrupt numbers match the OpenPIC spec intead of the Freescale docs which distinguish between internal and external interrupts. Now we can use the interrupt number directly to find the register offset associated with it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-03[POWERPC] Fix MAC address entries for 83xx, 85xx, and 86xx device treesTimur Tabi1-4/+28
For the 83xx, 85xx, and 86xx device trees, add a "local-mac-address" property to every Ethernet node that didn't have one. Add a comment indicating that the "address" and/or "mac-address" properties are deprecated in DTS files and will be removed at a later time. Change all MAC address properties to have a zero MAC address value. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-05-17[POWERPC] 85xx: Add device nodes for error reporting devices used by EDACDave Jiang1-1/+17
Adding memory-controller and l2-cache-controller entries to be used by EDAC as of_devices for MPC8540 ADS, MPC8548 CDS, and MPC8560 ADS. Also fixed up the size of the PCI node on MPC8560 ADS. Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-09[POWERPC] Remove unused, undocumented #cpus property from cpus nodeStuart Yoder1-1/+0
The #cpus property is unused and undocumented and is therefore being removed. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-18[POWERPC] 85xx: Cleaned up platform dts filesKumar Gala1-85/+72
* Fixed up top level compatible property for all boards * Removed explicit linux,phandle usage. Use references and labels now * Fixed phy-phandles for TSEC3/4 in mpc8548cds.dts Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-16[POWERPC] Delete boot-cpu property from all DTS filesTimur Tabi1-1/+0
The 'linux,boot-cpu' property is obsolete, so remove it from all of the DTS files and from booting-without-of.txt. The boot CPU is actually defined in the device tree header, and U-Boot sets that field. The device tree compiler also complains if the property exists. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Acked-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-07[POWERPC] cpm2: CPM2 interrupt controller fixVitaly Bordug1-5/+5
This contains important fixes for the CPM2 PIC code. Eliminated CPM_IRQ_OFFSET, pulling the respective interrupt numbers from the interrupt mapping. Updated devicetree files to reflect that. Changed direct IC-related IO accesses to the IO accessors. Fixed all the sense values to keep coherency with ipic. In the current code, CPM2 stuff will have no IRQs and hence could be hardly usable. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-09-21POWERPC: Bring the fs_no calculation to the relevant SoC enumerationVitaly Bordug1-4/+4
The fs_no mean used to be fs_enet driver driven, hence it was an enumeration across all the possible fs_enet "users" in the SoC. Now, with QE on the pipeline, and to make DTS descriptions more clear, fs_no features relevant SoC part number, with additional field to describe the SoC type. Another reason for that is now not only fs_enet is going to utilize those stuff. There might be UART, HLDC, and even USB, so to prevent confusion and be ready for upcoming OF_device transfer, fs_enet and cpm_uart drivers were updated in that concern, as well as the relevant DTS. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21POWERPC: Add support for the mpc8560 eval boardVitaly Bordug1-0/+302
This makes the 8560 evaluation board fully supported under arch/powerpc, as the first board with CPM2 SoC peripherals. The brand new devicetree nodes are introduced (intending to be a subset of the QuiccEngine-equipped models, with dts sources placed into the kernel according to the new convention. Assuming all the preceding stuff applied (PAL+fs_enet related+ CPM_UART update), the both TSEC eth ,FCC Eths, and both SCC UARTs are working. The relevant drivers are still capable to drive users in ppc, which was verified with 8272ADS (SCC uart+FCC eth). This is also verified on mpc8540 and actually make it work (PCI stuff working as well) Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
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