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2018-01-23MIPS: Watch: Avoid duplication of bits in mips_read_watch_registersMatt Redfearn1-8/+6
Currently the bits to be masked when watchhi is read is defined inline for each register. To avoid this, define the bits once and mask each register with that value. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Acked-by: David Daney <david.daney@cavium.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18158/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-23MIPS: Watch: Avoid duplication of bits in mips_install_watch_registers.Matt Redfearn1-10/+7
Currently the bits to be set in the watchhi register in addition to that requested by the user is defined inline for each register. To avoid this, define the bits once and or that in for each register. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Acked-by: David Daney <david.daney@cavium.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18157/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-23signal: Don't use structure initializers for struct siginfoEric W. Biederman1-9/+20
The siginfo structure has all manners of holes with the result that a structure initializer is not guaranteed to initialize all of the bits. As we have to copy the structure to userspace don't even try to use a structure initializer. Instead use clear_siginfo followed by initializing selected fields. This gives a guarantee that uninitialized kernel memory is not copied to userspace. Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-01-22MIPS: MSA: Update helpers to use new asm macrosJames Hogan1-44/+19
Update MSA control register access helpers to use the new helpers for parsing register names and creating custom assembly macro instructions. This allows the move via $at to be dropped (saving a total of about 20 bytes of kernel code). Note, this does not alter the equivalent code in .S files, which still uses the $at trick. Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17776/
2018-01-22MIPS: XPA: Standardise readx/writex accessorsJames Hogan1-10/+10
Now that we are using assembler macros to implement XPA instructions on toolchains which don't support them, pass Cop0 register names to the __{readx,writex}_32bit_c0_register macros in $n format rather than register numbers. Also pass a register select which may be useful in future (for example for MemoryMapID field of WatchHi registers on I6500). This is to make them consistent with the normal Cop0 register access macros which they were originally based on. Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17777/
2018-01-22MIPS: XPA: Allow use of $0 (zero) to MTHC0James Hogan1-2/+2
Tweak __writex_32bit_c0_register() to allow the compiler to use $0 (the zero register) as an input to the mthc0 instruction. Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17774/
2018-01-22MIPS: XPA: Use XPA instructions in assemblyJames Hogan2-10/+22
Utilise XPA instructions MFHC0 & MTHC0 in inline assembly instead of directly encoding them with the _ASM_INSN* macros, and transparently implement these instructions as assembler macros if the toolchain doesn't support them natively, using the recently introduced assembler macro helpers. The old direct encodings were restricted to using the register $at, so this allows the extra register moves to go away (saving a grand total of 24 bytes). Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17775/
2018-01-22MIPS: VZ: Pass GC0 register names in $n formatJames Hogan1-188/+188
Now that we are using assembler macros to implement VZ instructions on toolchains which don't support them, pass VZ guest Cop0 register names to the __{read,write}_{32bit,ulong,64bit}_gc0_register macros in $n format rather than register numbers. This is to make them consistent with the normal root Cop0 register access macros which they were originally based on. Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17773/
2018-01-22MIPS: VZ: Update helpers to use new asm macrosJames Hogan1-127/+37
Update VZ guest register & guest TLB access helpers to use the new assembly macros for parsing register names and creating custom assembly macro instructions, which has a number of advantages: - Better code can be generated on toolchains which don't support VZ, more closely matching those which do, since there is no need to bounce values via the $at register. Some differences still remain due to the inability to safely fill branch delay slots and R6 compact branch forbidden slots with explicitly encoded instructions, resulting in some extra NOPs added by the assembler. - Some code duplication between toolchains which do and don't support VZ instructions is removed, since the helpers are only implemented once. When the toolchain doesn't implement the instruction an assembly macro implements it instead. - Instruction encodings are kept together in the source. On a generic kernel with KVM VZ support enabled this change saves about 2.5KiB of kernel code when TOOLCHAIN_SUPPORTS_VIRT=n, bringing it down to about 0.5KiB more than when TOOLCHAIN_SUPPORTS_VIRT=y on r6, and just 68 bytes more on r2. Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17772/
2018-01-22MIPS: Add helpers for assembler macro instructionsJames Hogan1-0/+83
Implement a parse_r assembler macro in asm/mipsregs.h to parse a register in $n form, and a few C macros for defining assembler macro instructions. These can be used to more transparently support older binutils versions which don't support for example the msa, virt, xpa, or crc instructions. In particular they overcome the difficulty of turning a register name in $n form into an instruction encoding suitable for giving to .word / .hword, which is particularly problematic when needed from inline assembly where the compiler is responsible for register allocation. Traditionally this had required the use of $at and an extra MOV instruction, but for CRC instructions with multiple GP register operands that approach becomes more difficult. Three assembler macro creation helpers are added: - _ASM_MACRO_0(OP, ENC) This is to define an assembler macro for an instruction which has no operands, for example the VZ TLBGR instruction. - _ASM_MACRO_2R(OP, R1, R2, ENC) This is to define an assembler macro for an instruction which has 2 register operands, for example the CFCMSA instruction. - _ASM_MACRO_3R(OP, R1, R2, R3, ENC) This is to define an assembler macro for an instruction which has 3 register operands, for example the crc32 instructions. - _ASM_MACRO_2R_1S(OP, R1, R2, SEL3, ENC) This is to define an assembler macro for a Cop0 move instruction, with 2 register operands and an optional register select operand which defaults to 0, for example the VZ MFGC0 instruction. Suggested-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Marcin Nowakowski <marcin.nowakowski@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17770/
2018-01-22MIPS: ranchu: Add Ranchu as a new generic-based boardMiodrag Dinic4-0/+133
Provide amendments to the MIPS generic platform framework so that the new generic-based board Ranchu can be chosen to be built. The Ranchu board is intended to be used by Android emulator. The name "Ranchu" originates from Android development community. "Goldfish" and "Ranchu" are terms used for two generations of virtual boards used by Android emulator. The name "Ranchu" is a newer one among the two, and this patch deals with Ranchu. However, for historical reasons, some devices/drivers still contain the name "Goldfish". MIPS Ranchu machine includes a number of Goldfish devices. The support for Virtio devices is also included. Ranchu board supports up to 16 Virtio devices which can be attached using Virtio MMIO Bus. This is summarized in the following picture: ABUS ||----MIPS CPU || | IRQs ||----Goldfish PIC------------(32)-------- || | | | | | | | | | ||----Goldfish TTY------ | | | | | | | | || | | | | | | | | ||----Goldfish RTC-------- | | | | | | | || | | | | | | | ||----Goldfish FB----------- | | | | | | || | | | | | | ||----Goldfish Events--------- | | | | | || | | | | | ||----Goldfish Audio------------ | | | | || | | | | ||----Goldfish Battery------------ | | | || | | | ||----Android PIPE------------------ | | || | | ||----Virtio MMIO Bus | | || | | | | | || | | (virtio-block)--------- | || (16) | | || | (virtio-net)------------------ Device Tree is created on the QEMU side based on the information about devices IO map and IRQ numbers. Kernel will load this DTB using UHI boot protocol DTB handover mode. Signed-off-by: Miodrag Dinic <miodrag.dinic@mips.com> Signed-off-by: Goran Ferenc <goran.ferenc@mips.com> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18138/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-20bpf: get rid of pure_initcall dependency to enable jitsDaniel Borkmann2-4/+0
Having a pure_initcall() callback just to permanently enable BPF JITs under CONFIG_BPF_JIT_ALWAYS_ON is unnecessary and could leave a small race window in future where JIT is still disabled on boot. Since we know about the setting at compilation time anyway, just initialize it properly there. Also consolidate all the individual bpf_jit_enable variables into a single one and move them under one location. Moreover, don't allow for setting unspecified garbage values on them. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2018-01-19MIPS: Use proper kernel-doc Return keywordMathieu Malaterre1-1/+1
For reference: * https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html#function-documentation Fix non-fatal warning: arch/mips/kernel/branch.c:418: warning: Excess function parameter 'returns' description in '__compute_return_epc_for_insn' Signed-off-by: Mathieu Malaterre <malat@debian.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Maciej W. Rozycki <macro@mips.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Paul Burton <paul.burton@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18031/ [jhogan@kernel.org: Expand subject slightly] Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: Loongson64: Drop 32-bit support for Loongson 2E/2F devicesJiaxun Yang1-2/+0
The 32-bit support was broken at runtime, it doesn't boot anymore, witch is hard to debug because even early printk isn't working, also there are some build warnings. Some newer bootloader may not support 32-bit ELF. So we decide to drop 32-bit support. Make loongson64 a pure 64-bit arch. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Huacai Chen <chenhc@lemote.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18174/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: ingenic: Initial GCW Zero supportPaul Cercueil4-0/+94
The GCW Zero (http://www.gcw-zero.com) is a retro-gaming focused handheld game console, successfully kickstarted in ~2012, running Linux. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Mathieu Malaterre <malat@debian.org> Acked-by: Philippe Ombredanne <pombredanne@nexb.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18490/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: JZ4770: Work around config2 misreporting associativityMaarten ter Huurne1-0/+9
According to config2, the associativity would be 5-ways, but the documentation states 4-ways, which also matches the documented L2 cache size of 256 kB. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18488/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: ingenic: Initial JZ4770 supportPaul Cercueil3-1/+219
Provide just enough bits (clocks, clocksource, uart) to allow a kernel to boot on the JZ4770 SoC to a initramfs userspace. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18487/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: ingenic: Detect machtype from SoC compatible stringPaul Cercueil2-4/+19
Previously, the mips_machtype variable was always initialized to MACH_INGENIC_JZ4740 even if running on different SoCs. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18486/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: platform: add machtype IDs for more Ingenic SoCsPaul Cercueil1-0/+2
Add a machtype ID for the JZ4780 SoC, which was missing, and one for the newly supported JZ4770 SoC. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18485/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: ingenic: Use common cmdline handling codePaul Burton1-22/+2
jz4740_init_cmdline appends all arguments from argv (in fw_arg1) to arcs_cmdline, up to argc (in fw_arg0). The common code in fw_init_cmdline will do the exact same thing when run on a system where fw_arg0 isn't a pointer to kseg0 (it'll also set _fw_envp but we don't use it). Remove the custom implementation & use the generic code. Signed-off-by: Paul Burton <paul.burton@mips.com> Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18484/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: Setup boot_command_line before plat_mem_setupPaul Burton1-19/+20
Platforms using DT will typically call __dt_setup_arch from plat_mem_setup. This in turn calls early_init_dt_scan. When CONFIG_CMDLINE is set, this leads to its value being copied into boot_command_line by early_init_dt_scan_chosen. If this happens before the code setting up boot_command_line in arch_mem_init runs, that code will go on to append CONFIG_CMDLINE (via builtin_cmdline) to boot_command_line again, duplicating it. For some command line parameters (eg. earlycon) this can be a problem. Set up boot_command_line before early_init_dt_scan_chosen gets called such that it will not write CONFIG_CMDLINE in this scenario & the arguments aren't duplicated. Signed-off-by: Paul Burton <paul.burton@mips.com> Acked-by: Mathieu Malaterre <malat@debian.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18483/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: ftrace: Remove pointer comparison to 0 in prepare_ftrace_returnMathieu Malaterre1-1/+1
Replace pointer comparison to 0 with NULL in prepare_ftrace_return to improve code readability. Identified with coccinelle script 'badzero.cocci'. Signed-off-by: Mathieu Malaterre <malat@debian.org> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18494/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: Fix typo BIG_ENDIAN to CPU_BIG_ENDIANCorentin Labbe1-6/+6
MIPS_GENERIC selects some options conditional on BIG_ENDIAN which does not exist. Replace BIG_ENDIAN with CPU_BIG_ENDIAN which is the correct kconfig name. Note that BMIPS_GENERIC does the same which confirms that this patch is needed. Fixes: eed0eabd12ef0 ("MIPS: generic: Introduce generic DT-based board support") Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.9+ Patchwork: https://patchwork.linux-mips.org/patch/18495/ [jhogan@kernel.org: Clean up commit message] Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-19MIPS: Fix clean of vmlinuz.{32,ecoff,bin,srec}James Hogan1-1/+5
Make doesn't expand shell style "vmlinuz.{32,ecoff,bin,srec}" to the 4 separate files, so none of these files get cleaned up by make clean. List the files separately instead. Fixes: ec3352925b74 ("MIPS: Remove all generated vmlinuz* files on "make clean"") Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18491/
2018-01-19MIPS: Fix vmlinuz build when ZBOOT is selectedDaniel Sabogal1-1/+1
vmlinuz is not built by default for platforms using COMPRESSION_FNAME (e.g. Malta) due to an erroneous check on ZBOOT Signed-off-by: Daniel Sabogal <dsabogalcc@gmail.com> Reviewed-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18466/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-18MIPS: Fix undefined reference to physical_memsizeJames Hogan1-1/+10
Since commit d41e6858ba58 ("MIPS: Kconfig: Set default MIPS system type as generic") switched the default platform to the "generic" platform, allmodconfig has been failing with the following linker error (among other errors): arch/mips/kernel/vpe-mt.o In function `vpe_run': (.text+0x59c): undefined reference to `physical_memsize' The Lantiq platform already worked around the same issue in commit 9050d50e2244 ("MIPS: lantiq: Set physical_memsize") by declaring physical_memsize with the initial value of 0 (on the assumption that the actual memory size will be hard-coded in the loaded VPE firmware), and the Malta platform already provided physical_memsize. Since all other platforms will fail to link with the VPE loader enabled, only allow Lantiq and Malta platforms to enable it, by way of a SYS_SUPPORTS_VPE_LOADER which is selected by those two platforms and which MIPS_VPE_LOADER depends on. SYS_SUPPORTS_MULTITHREADING is now a dependency of SYS_SUPPORTS_VPE_LOADER so that Kconfig emits a warning if SYS_SUPPORTS_VPE_LOADER is selected without SYS_SUPPORTS_MULTITHREADING. Fixes: d41e6858ba58 ("MIPS: Kconfig: Set default MIPS system type as generic") Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: John Crispin <john@phrozen.org> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Paul Burton <paul.burton@mips.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: linux-mips@linux-mips.org Tested-by: Guenter Roeck <linux@roeck-us.net> Patchwork: https://patchwork.linux-mips.org/patch/18453/
2018-01-16signal: Unify and correct copy_siginfo_to_user32Eric W. Biederman2-59/+0
Among the existing architecture specific versions of copy_siginfo_to_user32 there are several different implementation problems. Some architectures fail to handle all of the cases in in the siginfo union. Some architectures perform a blind copy of the siginfo union when the si_code is negative. A blind copy suggests the data is expected to be in 32bit siginfo format, which means that receiving such a signal via signalfd won't work, or that the data is in 64bit siginfo and the code is copying nonsense to userspace. Create a single instance of copy_siginfo_to_user32 that all of the architectures can share, and teach it to handle all of the cases in the siginfo union correctly, with the assumption that siginfo is stored internally to the kernel is 64bit siginfo format. A special case is made for x86 x32 format. This is needed as presence of both x32 and ia32 on x86_64 results in two different 32bit signal formats. By allowing this small special case there winds up being exactly one code base that needs to be maintained between all of the architectures. Vastly increasing the testing base and the chances of finding bugs. As the x86 copy of copy_siginfo_to_user32 the call of the x86 signal_compat_build_tests were moved into sigaction_compat_abi, so that they will keep running. Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-01-16signal: Unify and correct copy_siginfo_from_user32Eric W. Biederman1-10/+0
The function copy_siginfo_from_user32 is used for two things, in ptrace since the dawn of siginfo for arbirarily modifying a signal that user space sees, and in sigqueueinfo to send a signal with arbirary siginfo data. Create a single copy of copy_siginfo_from_user32 that all architectures share, and teach it to handle all of the cases in the siginfo union. In the generic version of copy_siginfo_from_user32 ensure that all of the fields in siginfo are initialized so that the siginfo structure can be safely copied to userspace if necessary. When copying the embedded sigval union copy the si_int member. That ensures the 32bit values passes through the kernel unchanged. Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2018-01-16signal: unify compat_siginfo_tAl Viro1-71/+0
--EWB Added #ifdef CONFIG_X86_X32_ABI to arch/x86/kernel/signal_compat.c Changed #ifdef CONFIG_X86_X32 to #ifdef CONFIG_X86_X32_ABI in linux/compat.h CONFIG_X86_X32 is set when the user requests X32 support. CONFIG_X86_X32_ABI is set when the user requests X32 support and the tool-chain has X32 allowing X32 support to be built. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2018-01-15mips: use swiotlb_{alloc,free}Christoph Hellwig4-42/+7
These already include the GFP_DMA/GFP_DMA32 usage, and will use CMA memory if enabled, thus avoiding the GFP_NORETRY hack. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Christian König <christian.koenig@amd.com>
2018-01-15mips/netlogic: remove swiotlb supportChristoph Hellwig4-103/+0
nlm_swiotlb_dma_ops is unused code, so the whole swiotlb support is dead. If it gets resurrected at some point it should use the generic swiotlb_dma_ops instead. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Christian König <christian.koenig@amd.com>
2018-01-15dma-mapping: clear harmful GFP_* flags in common codeChristoph Hellwig4-12/+0
Lift the code from x86 so that we behave consistently. In the future we should probably warn if any of these is set. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> [m68k]
2018-01-12signal/mips: switch mips to generic siginfoAl Viro1-85/+1
... having taught the latter that si_errno and si_code might be swapped. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
2018-01-12Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller3-25/+136
BPF alignment tests got a conflict because the registers are output as Rn_w instead of just Rn in net-next, and in net a fixup for a testcase prohibits logical operations on pointers before using them. Also, we should attempt to patch BPF call args if JIT always on is enabled. Instead, if we fail to JIT the subprogs we should pass an error back up and fail immediately. Signed-off-by: David S. Miller <davem@davemloft.net>
2018-01-11MIPS: Implement __multi3 for GCC7 MIPS64r6 buildsJames Hogan3-1/+73
GCC7 is a bit too eager to generate suboptimal __multi3 calls (128bit multiply with 128bit result) for MIPS64r6 builds, even in code which doesn't explicitly use 128bit types, such as the following: unsigned long func(unsigned long a, unsigned long b) { return a > (~0UL) / b; } Which GCC rearanges to: return (unsigned __int128)a * (unsigned __int128)b > 0xffffffffffffffff; Therefore implement __multi3, but only for MIPS64r6 with GCC7 as under normal circumstances we wouldn't expect any calls to __multi3 to be generated from kernel code. Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: James Hogan <jhogan@kernel.org> Tested-by: Waldemar Brodkorb <wbx@openadk.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maciej W. Rozycki <macro@mips.com> Cc: Matthew Fortune <matthew.fortune@mips.com> Cc: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17890/
2018-01-10MIPS: mm: Fix duplicate "const" on insn_table_MMJames Hogan1-1/+1
Fix the following gcc 7.x build error on microMIPS builds: arch/mips/mm/uasm-micromips.c:43:26: error: duplicate ‘const’ declaration specifier [-Werror=duplicate-decl-specifier] static const struct insn const insn_table_MM[insn_invalid] = { ^~~~~ The same issue has already been fixed in uasm-mips by commit 00e06297b351 ("MIPS: mm: remove duplicate "const" qualifier on insn_table"). Signed-off-by: James Hogan <jhogan@kernel.org> Fixes: ce807d5f67ed ("MIPS: Optimize uasm insn lookup.") Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17889/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10MIPS: CM: Drop WARN_ON(vp != 0)James Hogan1-1/+0
Since commit 68923cdc2eb3 ("MIPS: CM: Add cluster & block args to mips_cm_lock_other()"), mips_smp_send_ipi_mask() has used mips_cm_lock_other_cpu() with each CPU number, rather than mips_cm_lock_other() with the first VPE in each core. Prior to r6, multicore multithreaded systems such as dual-core dual-thread interAptivs with CPU Idle enabled (e.g. MIPS Creator Ci40) results in mips_cm_lock_other() repeatedly hitting WARN_ON(vp != 0). There doesn't appear to be anything fundamentally wrong about passing a non-zero VP/VPE number, even if it is a core's region that is locked into the other region before r6, so remove that particular WARN_ON(). Fixes: 68923cdc2eb3 ("MIPS: CM: Add cluster & block args to mips_cm_lock_other()") Signed-off-by: James Hogan <jhogan@kernel.org> Reviewed-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # 4.14+ Patchwork: https://patchwork.linux-mips.org/patch/17883/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10MIPS: ralink: Fix platform_get_irq's error checkingArvind Yadav1-2/+2
The platform_get_irq() function returns negative if an error occurs. zero or positive number on success. platform_get_irq() error checking for zero is not correct. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Cc: john@phrozen.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17783/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10MIPS: Fix CPS SMP NS16550 UART defaultsJames Hogan1-4/+10
The MIPS_CPS_NS16550_BASE and MIPS_CPS_NS16550_SHIFT options have no defaults for non-Malta platforms which select SYS_SUPPORTS_MIPS_CPS (i.e. the pistachio and generic platforms). This is problematic for automated allyesconfig and allmodconfig builds based on these platforms, since make silentoldconfig tries to ask the user for values, and especially since v4.15 where the default platform was switched to generic. Default these options to 0 and arrange for MIPS_CPS_NS16550 to be no when using that default base address, so that the option only has an effect when the default is provided (i.e. Malta) or when a value is provided by the user. Fixes: 609cf6f2291a ("MIPS: CPS: Early debug using an ns16550-compatible UART") Signed-off-by: James Hogan <jhogan@kernel.org> Reviewed-by: Paul Burton <paul.burton@mips.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17749/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10MIPS: BCM47XX Avoid compile error with MIPS allnoconfigMatt Redfearn1-0/+1
Currently MIPS allnoconfig with CONFIG_BCM47XX=y fails to compile due to neither BCM47XX_BCMA nor BCM47XX_SSB being selected. This leads the enumeration in arch/mips/include/asm/mach-bcm47xx/bcm47xx.h to be empty, and compilation fails: In file included from arch/mips/bcm47xx/irq.c:32:0: ./arch/mips/include/asm/mach-bcm47xx/bcm47xx.h:34:1: error: expected identifier before '}' token }; ^ make[2]: *** [scripts/Makefile.build:314: arch/mips/bcm47xx/irq.o] Error 1 Fix this by ensuring that BCM47XX_SSB is selected if BCM47XX_BCMA is not. This allows us to select either system or both, but not neither. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: James Hogan <james.hogan@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17703/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10dma-mapping: move dma_mark_clean to dma-direct.hChristoph Hellwig1-2/+0
And unlike the other helpers we don't require a <asm/dma-direct.h> as this helper is a special case for ia64 only, and this keeps it as simple as possible. Signed-off-by: Christoph Hellwig <hch@lst.de>
2018-01-10dma-mapping: move swiotlb arch helpers to a new headerChristoph Hellwig6-20/+19
phys_to_dma, dma_to_phys and dma_capable are helpers published by architecture code for use of swiotlb and xen-swiotlb only. Drivers are not supposed to use these directly, but use the DMA API instead. Move these to a new asm/dma-direct.h helper, included by a linux/dma-direct.h wrapper that provides the default linear mapping unless the architecture wants to override it. In the MIPS case the existing dma-coherent.h is reused for now as untangling it will take a bit of work. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Robin Murphy <robin.murphy@arm.com>
2018-01-10MIPS: RB532: Avoid undefined mac_pton without GENERIC_NET_UTILSMatt Redfearn1-0/+4
Currently MIPS allnoconfig with CONFIG_MIKROTIK_RB532=y fails to link due to missing support for mac_pton(): LD vmlinux arch/mips/rb532/devices.o: In function `setup_kmac': devices.c:(.init.text+0xc): undefined reference to `mac_pton' Rather than adding dependencies to the platform to force inclusion of GENERIC_NET_UTILS which is selected by CONFIG_NET, just exclude the setup of the MAC address if CONFIG_NET is not selected in the kernel config. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: James Hogan <james.hogan@mips.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17702/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10MIPS: RB532: Avoid undefined early_serial_setup() without SERIAL_8250_CONSOLEMatt Redfearn1-1/+3
Currently MIPS allnoconfig with CONFIG_MIKROTIK_RB532=y fails to link due to missing support for early_serial_setup(): LD vmlinux arch/mips/rb532/serial.o: In function `setup_serial_port': serial.c:(.init.text+0x14): undefined reference to `early_serial_setup' Rather than adding dependencies to the platform to force inclusion of SERIAL_8250_CONSOLE together with it's dependencies like TTY, HAS_IOMEM, etc, just exclude arch/mips/rb532/serial.c from the build when it's dependency is not selected in the kernel config. Reported-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: James Hogan <james.hogan@mips.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17701/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10MIPS: ath25: Avoid undefined early_serial_setup() without SERIAL_8250_CONSOLEMatt Redfearn1-0/+2
Currently MIPS allnoconfig with CONFIG_ATH25=y fails to link due to missing support for early_serial_setup(): LD vmlinux arch/mips/ath25/devices.o: In function ath25_serial_setup': devices.c:(.init.text+0x68): undefined reference to 'early_serial_setup' Rather than adding dependencies to the platform to force inclusion of SERIAL_8250_CONSOLE together with it's dependencies like TTY, HAS_IOMEM, etc, just make ath25_serial_setup() a no-op when the dependency is not selected in the kernel config. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: James Hogan <james.hogan@mips.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Philippe Ombredanne <pombredanne@nexb.com> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17700/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10mips: fix an off-by-one in dma_capableChristoph Hellwig1-1/+1
This makes it match the generic version. Reported-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
2018-01-10MIPS: AR7: ensure the port type's FCR value is usedJonas Gorski1-1/+1
Since commit aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers"), the port's default FCR value isn't used in serial8250_do_set_termios anymore, but copied over once in serial8250_config_port and then modified as needed. Unfortunately, serial8250_config_port will never be called if the port is shared between kernel and userspace, and the port's flag doesn't have UPF_BOOT_AUTOCONF, which would trigger a serial8250_config_port as well. This causes garbled output from userspace: [ 5.220000] random: procd urandom read with 49 bits of entropy available ers [kee Fix this by forcing it to be configured on boot, resulting in the expected output: [ 5.250000] random: procd urandom read with 50 bits of entropy available Press the [f] key and hit [enter] to enter failsafe mode Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level Fixes: aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers") Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Yoshihiro YUNOMAE <yoshihiro.yunomae.ez@hitachi.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Nicolas Schichan <nschichan@freebox.fr> Cc: linux-mips@linux-mips.org Cc: linux-serial@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17544/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2018-01-10Construct init thread stack in the linker script rather than by unionDavid Howells1-3/+0
Construct the init thread stack in the linker script rather than doing it by means of a union so that ia64's init_task.c can be got rid of. The following symbols are then made available from INIT_TASK_DATA() linker script macro: init_thread_union init_stack INIT_TASK_DATA() also expands the region to THREAD_SIZE to accommodate the size of the init stack. init_thread_union is given its own section so that it can be placed into the stack space in the right order. I'm assuming that the ia64 ordering is correct and that the task_struct is first and the thread_info second. Signed-off-by: David Howells <dhowells@redhat.com> Tested-by: Tony Luck <tony.luck@intel.com> Tested-by: Will Deacon <will.deacon@arm.com> (arm64) Tested-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Thomas Gleixner <tglx@linutronix.de>
2018-01-10MIPS: mm: remove mips_dma_mapping_errorFelix Fietkau1-6/+0
dma_mapping_error() already checks if ops->mapping_error is a null pointer Signed-off-by: Felix Fietkau <nbd@nbd.name> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17881/ Signed-off-by: James Hogan <jhogan@kernel.org>
2018-01-10MIPS: mipsregs.h: Make read_c0_prid use const accessorJames Hogan1-1/+1
Make read_c0_prid() use the new constant accessor macros so that it can potentially be optimised or removed by the compiler. This is particularly important under virtualisation, where even with hardware assisted virtualisation (VZ), access to the PRid register may need to be emulated by the hypervisor. In particular this helps eliminate the read of the PRid register in the rather frequently called add_interrupt_randomness() (which calls into arch/mips/include/asm/timex.h) when the prid is unused but the read can't be removed due to the inline asm being marked __volatile__. Reported-by: Yann LeDu <Yann.LeDu@imgtec.com> Signed-off-by: James Hogan <jhogan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Maciej W. Rozycki <macro@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17923/