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AgeCommit message (Expand)AuthorFilesLines
2005-10-29Let r4600 PRID detection match only legacy CPUs, cleanups.Thiemo Seufer2-7/+10
2005-10-29Handle mtc0 - tlb write hazard for VR5432.Ralf Baechle1-0/+1
2005-10-29Avoid SMP cacheflushes. This is a minor optimization of startup butRalf Baechle4-29/+13
2005-10-29Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.Pete Popov1-0/+1
2005-10-29More AP / SP bits for the 34K, the Malta bits and things. Still wantsRalf Baechle2-5/+3
2005-10-29Mark a few variables __read_mostly.Ralf Baechle1-1/+7
2005-10-29MIPS R2 instruction hazard handling.Ralf Baechle1-0/+1
2005-10-29Detect the 34K.Ralf Baechle1-0/+1
2005-10-29Define kmap_atomic_pfn() for MIPS.Ralf Baechle1-0/+19
2005-10-29Date: Fri Jul 8 20:10:17 2005 +0000Ralf Baechle1-1/+1
2005-10-29Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle4-6/+6
2005-10-29Avoid tlbw* hazards for the R4600/R4700/R5000.Maciej W. Rozycki1-1/+6
2005-10-29Inline ioremap() calls for constant addresses that map to KSEG1.Maciej W. Rozycki1-12/+3
2005-10-29Fix the diagnostic dump for the XTLB refill handler.Maciej W. Rozycki1-1/+8
2005-10-29Fix a diagnostic message.Maciej W. Rozycki1-1/+1
2005-10-29Use macros for the RM7k cp0.config bits instead of magic numbers.Maciej W. Rozycki1-9/+9
2005-10-29Optimize R3k TLB Load/Store/Modified handlers, by schedulingMaciej W. Rozycki1-40/+30
2005-10-29Fill R3k load delay slots properly.Maciej W. Rozycki1-0/+3
2005-10-29Only dump instructions actually emitted.Maciej W. Rozycki1-7/+7
2005-10-29Handle _PAGE_DIRTY correctly for CONFIG_64BIT_PHYS_ADDR on 32bit CPUs.Thiemo Seufer1-23/+29
2005-10-29Better interface to run uncached cache setup code.Thiemo Seufer2-25/+10
2005-10-29Arrested for multiple offences of header file inclusion.Ralf Baechle1-1/+1
2005-10-29Fix race conditions for read_c0_entryhi. Remove broken ASID masks inThiemo Seufer2-45/+63
2005-10-29Remove useless casts. Fix formatting.Maciej W. Rozycki1-12/+19
2005-10-29Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMPThiemo Seufer1-29/+21
2005-10-29R4300 delay slot.Ralf Baechle1-0/+1
2005-10-29Reformat; cosmetic cleanups.Ralf Baechle1-1/+2
2005-10-29Export shm_align_mask and flush_data_cache_page.Ralf Baechle1-0/+2
2005-10-29Gcc 4.0 fixes.Ralf Baechle1-1/+1
2005-10-29Sparseify MIPS.Ralf Baechle3-9/+11
2005-10-29Base Au1200 2.6 support.Pete Popov2-0/+5
2005-10-29Fix initialization. Unbreak the wait-for-completion loops. Code cleanup.Thiemo Seufer1-22/+24
2005-10-29Switch SiByte drivers back to __raw_*() functions.Maciej W. Rozycki1-14/+14
2005-10-29Handle addresses beyond VMALLOC_END correctly.Thiemo Seufer1-1/+2
2005-10-29Use intermediate variable.Thiemo Seufer1-3/+3
2005-10-29Moves a test which determines if we actually need to perform aRalf Baechle1-7/+7
2005-10-29Update MIPS to use the 4-level pagetable code thereby getting rid ofRalf Baechle9-25/+52
2005-10-2925Kf is also physically indexed.Ralf Baechle1-0/+1
2005-10-2920Kc and SB1 don't suffer from aliases.Ralf Baechle1-0/+2
2005-10-29Delete duplicate copy of fixrange_init.Ralf Baechle2-33/+3
2005-10-29Move missplaced code line to the right place.Ralf Baechle1-3/+2
2005-10-29Use hardware mechanism to deal with cache aliases in the 24K.Ralf Baechle1-2/+10
2005-10-29Remove old wrong bits of cache code.Ralf Baechle1-3/+0
2005-10-29Formatting fixes.Maciej W. Rozycki1-9/+10
2005-10-28[PATCH] gfp_t: dma-mapping (mips)Al Viro4-8/+8
2005-09-05[PATCH] mips: fix build warningsYoichi Yuasa1-1/+1
2005-09-05[PATCH] mips: nuke trailing whitespaceRalf Baechle5-27/+27
2005-09-05[PATCH] mips: clean up 32/64-bit configurationRalf Baechle5-27/+27
2005-06-26[PATCH] mips: add MIPS-specific support for flatmem/discontigmemYoichi Yuasa2-3/+3
2005-06-22[PATCH] mm: remove PG_highmemBadari Pulavarty1-1/+0
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