Age | Commit message (Expand) | Author | Files | Lines |
2008-09-06 | [MIPS] Fix WARNING: at kernel/smp.c:290 | Thomas Bogendoerfer | 1 | -3/+3 |
2008-06-05 | [MIPS] R4700: Fix build_tlb_probe_entry | Thomas Bogendoerfer | 1 | -1/+2 |
2008-04-01 | [MIPS] Add missing 4KEC TLB refill handler | Thomas Bogendoerfer | 1 | -0/+1 |
2008-03-12 | [MIPS] Fix loads of section missmatches | Ralf Baechle | 1 | -35/+35 |
2008-02-01 | [MIPS] Split the micro-assembler from tlbex.c. | Thiemo Seufer | 1 | -959/+341 |
2008-01-29 | [MIPS] Alchemy: Au1210/Au1250 CPU support | Manuel Lauss | 1 | -0/+2 |
2008-01-29 | [MIPS] tlbex.c: cleanup debug code | Franck Bui-Huu | 1 | -57/+26 |
2008-01-29 | [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align | Franck Bui-Huu | 1 | -6/+3 |
2008-01-29 | [MIPS] tlbex.c: cleanup include files | Franck Bui-Huu | 1 | -6/+0 |
2008-01-29 | [MIPS] tlbex.c: Cleanup __init usages. | Franck Bui-Huu | 1 | -49/+49 |
2008-01-29 | [MIPS] R4000/R4400 daddiu erratum workaround | Maciej W. Rozycki | 1 | -12/+30 |
2008-01-29 | [MIPS] tlbex: Cleanup handling of R2 hazards in TLB handlers. | Ralf Baechle | 1 | -8/+6 |
2007-10-13 | [MIPS] Revert "[MIPS] tlbex.c: Cleanup __init usage." | Ralf Baechle | 1 | -48/+48 |
2007-10-12 | [MIPS] tlbex.c: Cleanup __init usage. | Franck Bui-Huu | 1 | -48/+48 |
2007-10-12 | [MIPS] checkfiles: Fix "need space after that ','" errors. | Ralf Baechle | 1 | -47/+47 |
2007-10-12 | [MIPS] Allow hardwiring of the CPU type to a single type for optimization. | Ralf Baechle | 1 | -5/+5 |
2007-10-12 | [MIPS] tlbex: Size optimize code by declaring a few functions inline. | Ralf Baechle | 1 | -4/+4 |
2007-10-12 | [MIPS] Add support for BCM47XX CPUs. | Aurelien Jarno | 1 | -0/+2 |
2007-09-14 | [MIPS] Workaround for 4Kc machine check exception | Maciej W. Rozycki | 1 | -1/+25 |
2007-09-11 | [MIPS] TLB: Fix instruction bitmasks | Thiemo Seufer | 1 | -2/+2 |
2007-07-10 | [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 | Fuxin Zhang | 1 | -3/+5 |
2007-05-11 | [MIPS] tlbex: use __maybe_unused | David Rientjes | 1 | -18/+18 |
2006-11-30 | [MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n | Atsushi Nemoto | 1 | -0/+55 |
2006-11-01 | [MIPS] 16K & 64K page size fixes | Ralf Baechle | 1 | -3/+10 |
2006-10-04 | Attack of "the the"s in arch | Matt LaPlante | 1 | -1/+1 |
2006-07-14 | [MIPS] Print out TLB handler assembly for debugging. | Thiemo Seufer | 1 | -88/+71 |
2006-06-30 | Remove obsolete #include <linux/config.h> | Jörn Engel | 1 | -1/+0 |
2006-06-01 | [MIPS] Treat R14000 like R10000. | Kumba | 1 | -0/+1 |
2006-06-01 | [MIPS] Fix detection and handling of the 74K processor. | Chris Dearman | 1 | -0/+1 |
2006-04-19 | [MIPS] MT: Improved multithreading support. | Ralf Baechle | 1 | -20/+63 |
2006-04-19 | [MIPS] Fix vectored interrupt support in TLB exception handler generator. | Ralf Baechle | 1 | -2/+2 |
2006-03-21 | [MIPS] Remove CONFIG_BUILD_ELF64. | Ralf Baechle | 1 | -13/+0 |
2006-03-09 | [MIPS] Scatter a bunch of __init over tlbex.c. | Ralf Baechle | 1 | -17/+17 |
2005-10-29 | Add support for SB1A CPU. | Andrew Isaacson | 1 | -0/+1 |
2005-10-29 | R4600 v2.0 needs a nop before tlbp. | Thiemo Seufer | 1 | -0/+2 |
2005-10-29 | Handle mtc0 - tlb write hazard for VR5432. | Ralf Baechle | 1 | -0/+1 |
2005-10-29 | Avoid SMP cacheflushes. This is a minor optimization of startup but | Ralf Baechle | 1 | -20/+10 |
2005-10-29 | Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it. | Pete Popov | 1 | -0/+1 |
2005-10-29 | Detect the 34K. | Ralf Baechle | 1 | -0/+1 |
2005-10-29 | Date: Fri Jul 8 20:10:17 2005 +0000 | Ralf Baechle | 1 | -1/+1 |
2005-10-29 | Avoid tlbw* hazards for the R4600/R4700/R5000. | Maciej W. Rozycki | 1 | -1/+6 |
2005-10-29 | Fix the diagnostic dump for the XTLB refill handler. | Maciej W. Rozycki | 1 | -1/+8 |
2005-10-29 | Fix a diagnostic message. | Maciej W. Rozycki | 1 | -1/+1 |
2005-10-29 | Optimize R3k TLB Load/Store/Modified handlers, by scheduling | Maciej W. Rozycki | 1 | -40/+30 |
2005-10-29 | Fill R3k load delay slots properly. | Maciej W. Rozycki | 1 | -0/+3 |
2005-10-29 | Only dump instructions actually emitted. | Maciej W. Rozycki | 1 | -7/+7 |
2005-10-29 | Handle _PAGE_DIRTY correctly for CONFIG_64BIT_PHYS_ADDR on 32bit CPUs. | Thiemo Seufer | 1 | -23/+29 |
2005-10-29 | Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMP | Thiemo Seufer | 1 | -29/+21 |
2005-10-29 | R4300 delay slot. | Ralf Baechle | 1 | -0/+1 |
2005-10-29 | Base Au1200 2.6 support. | Pete Popov | 1 | -0/+1 |