summaryrefslogtreecommitdiff
path: root/arch/mips/jz4740
AgeCommit message (Expand)AuthorFilesLines
2015-06-21MIPS: ingenic: Initial JZ4780 supportPaul Burton4-2/+18
2015-06-21MIPS: JZ4740: use Ingenic SoC UART driverPaul Burton6-117/+1
2015-06-21MIPS: JZ4740: only detect RAM size if not specified in DTPaul Burton2-1/+9
2015-06-21MIPS: JZ4740: remove clock.hPaul Burton2-27/+0
2015-06-21MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cguPaul Burton3-97/+1
2015-06-21MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cguPaul Burton1-13/+0
2015-06-21MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cguPaul Burton1-16/+0
2015-06-21MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton6-967/+4
2015-06-21MIPS: JZ4740: replace use of jz4740_clock_bdataPaul Burton3-4/+29
2015-06-21MIPS: JZ4740: Call jz4740_clock_init earlierPaul Burton2-2/+3
2015-06-21MIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers/irqchipPaul Burton4-204/+2
2015-06-21MIPS: JZ4740: support newer SoC interrupt controllersPaul Burton1-0/+9
2015-06-21MIPS: JZ4740: Avoid JZ4740-specific namingPaul Burton3-16/+16
2015-06-21MIPS: JZ4740: read intc base address from DTPaul Burton1-3/+6
2015-06-21MIPS: JZ4740: support >32 interruptsPaul Burton1-25/+46
2015-06-21MIPS: JZ4740: Remove jz_intc_base globalPaul Burton1-8/+31
2015-06-21MIPS: JZ4740: drop intc debugfs codePaul Burton1-42/+0
2015-06-21MIPS: JZ4740: register an irq_domain for the interrupt controllerPaul Burton1-0/+6
2015-06-21MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DTPaul Burton1-1/+6
2015-06-21MIPS: JZ4740: probe interrupt controller via DTPaul Burton2-3/+7
2015-06-21MIPS: JZ4740: Move arch_init_irq out of arch/mips/jz4740/irq.cPaul Burton2-4/+9
2015-06-21MIPS: JZ4740: use generic plat_irq_dispatchPaul Burton1-12/+0
2015-06-21MIPS: JZ4740: probe CPU interrupt controller via DTPaul Burton1-2/+2
2015-06-21MIPS: JZ4740: require & include DTPaul Burton1-0/+19
2015-06-21MIPS: JZ4740: introduce CONFIG_MACH_INGENICPaul Burton2-5/+10
2015-04-01MIPS: jz4740: Implement read_sched_clockDeng-Cheng Zhu1-0/+8
2015-03-31MIPS: Allow platforms to specify the decompressor load addressAndrew Bresticker1-0/+1
2015-02-18Merge tag 'for-linus-20150216' of git://git.infradead.org/linux-mtdLinus Torvalds1-1/+10
2015-02-02mtd: nand: jz4740: Convert to GPIO descriptor APILars-Peter Clausen1-1/+10
2015-01-13MIPS: JZ4740: Fixup #include's (sparse)Brian Norris1-0/+3
2014-11-25MIPS: Replace use of phys_t with phys_addr_t.Ralf Baechle1-1/+1
2014-08-09Merge tag 'gpio-v3.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/lin...Linus Torvalds1-0/+1
2014-08-02Merge branch '3.16-fixes' into mips-for-linux-nextRalf Baechle1-1/+1
2014-08-02MIPS: jz4740: remove unnecessary null test before debugfs_removeFabian Frederick1-2/+1
2014-08-01MIPS: Jz4740: Rename usb_nop_xceiv to usb_phy_genericApelete Seketeli1-1/+1
2014-07-28gpio: split gpiod board registration into machine headerLinus Walleij1-0/+1
2014-04-23ASoC: qi_lb60: Use GPIO descriptor APILars-Peter Clausen1-0/+11
2014-01-25mips: delete non-required instances of include <linux/init.h>Paul Gortmaker1-1/+0
2014-01-25MIPS: jz4740: update platform data for JZ4740 usb device controllerApelete Seketeli2-16/+25
2013-07-05MIPS: jz4740: Correct clock gate bit for DMA controllerMaarten ter Huurne1-1/+1
2013-07-05MIPS: jz4740: Remove custom DMA APILars-Peter Clausen2-308/+1
2013-07-05MIPS: jz4740: Register jz4740 DMA deviceLars-Peter Clausen2-0/+22
2013-07-05MIPS: jz4740: Acquire and enable DMA controller clockMaarten ter Huurne1-2/+22
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle14-23/+23
2012-10-17MIPS: JZ4740: Forward declare struct uart_port in header.Ralf Baechle1-0/+2
2012-10-17MIPS: JZ4740: Fix '#include guard' in serial.hAntony Pavlov1-0/+1
2012-10-05pwm: Add Ingenic JZ4740 supportThierry Reding5-181/+8
2012-10-05MIPS: JZ4740: Export timer APIThierry Reding3-139/+3
2012-07-23MIPS: JZ4740: reset: Initialize hibernate wakeup counters.Maarten ter Huurne1-5/+44
2012-07-23MIPS: JZ4740: qi_lb60: Look for NAND chip in bank 1.Maarten ter Huurne1-0/+1