Age | Commit message (Expand) | Author | Files | Lines |
2014-08-02 | MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFT | Dan Carpenter | 1 | -1/+0 |
2014-08-02 | MIPS: define MAAR register accessors & bits | Paul Burton | 1 | -0/+12 |
2014-08-02 | MIPS: kernel: cpu-probe: Detect unique RI/XI exceptions | Leonid Yegoshin | 1 | -0/+1 |
2014-08-02 | MIPS: asm: Add register definitions for Hardware Table Walker | Markos Chandras | 1 | -0/+44 |
2014-05-30 | MIPS: Add function get_ebase_cpunum | David Daney | 1 | -0/+9 |
2014-05-24 | MIPS: MT: Remove SMTC support | Ralf Baechle | 1 | -132/+1 |
2014-05-23 | MIPS: Disable MIPS16/microMIPS crap for platforms not supporting these ASEs. | Ralf Baechle | 1 | -1/+8 |
2014-03-27 | MIPS: Add MSA register definitions & access | Paul Burton | 1 | -0/+1 |
2014-03-07 | MIPS: Add CP0 CMGCRBase definitions & accessor | Paul Burton | 1 | -0/+6 |
2014-03-07 | MIPS: Define Config1 cache field shifts & sizes | Paul Burton | 1 | -0/+12 |
2014-03-07 | MIPS: mm: c-r4k: Detect instruction cache aliases | Markos Chandras | 1 | -0/+3 |
2014-01-23 | MIPS: include linux/types.h | Qais Yousef | 1 | -0/+1 |
2014-01-22 | MIPS: Add support for FTLBs | Leonid Yegoshin | 1 | -0/+2 |
2014-01-22 | MIPS: Add function for flushing the TLB using the TLBINV instruction | Leonid Yegoshin | 1 | -0/+13 |
2014-01-22 | MIPS: features: Add initial support for Segmentation Control registers | Steven J. Hill | 1 | -0/+29 |
2014-01-22 | MIPS: Add missing bits for Config registers | Leonid Yegoshin | 1 | -2/+38 |
2013-09-19 | MIPS: Add MIPS R5 config5 register. | Ralf Baechle | 1 | -0/+7 |
2013-07-01 | MIPS: microMIPS: Fix improper definition of ISA exception bit. | Steven J. Hill | 1 | -1/+1 |
2013-05-09 | MIPS: microMIPS: Add support for exception handling. | Steven J. Hill | 1 | -0/+1 |
2013-05-02 | MIPS: microMIPS: Add instruction utility macros. | Steven J. Hill | 1 | -0/+18 |
2013-03-19 | MIPS: Fix code generation for non-DSP capable CPUs | Florian Fainelli | 1 | -19/+190 |
2013-02-21 | Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j... | Ralf Baechle | 1 | -186/+125 |
2013-02-19 | MIPS: Probe for and report hardware virtualization support. | David Daney | 1 | -0/+1 |
2013-02-17 | MIPS: dsp: Simplify the DSP macros. | Steven J. Hill | 1 | -201/+30 |
2013-02-17 | MIPS: dsp: Support toolchains without DSP ASE and microMIPS. | Steven J. Hill | 1 | -0/+89 |
2013-02-17 | MIPS: dsp: Add assembler support for DSP ASEs. | Steven J. Hill | 1 | -17/+36 |
2013-02-17 | MIPS: Add support for the M14KEc core. | Steven J. Hill | 1 | -0/+1 |
2013-02-01 | MIPS: Whitespace cleanup. | Ralf Baechle | 1 | -199/+199 |
2013-02-01 | MIPS: Whitespace cleanups and reformatting. | Steven J. Hill | 1 | -11/+15 |
2012-12-13 | MIPS: PMC-Sierra Yosemite: Remove support. | Ralf Baechle | 1 | -8/+0 |
2012-12-12 | MIPS: Control huge tlb support via Kconfig symbol MIPS_HUGE_TLB_SUPPORT | David Daney | 1 | -1/+1 |
2012-10-11 | MIPS: Add detection of DSP ASE Revision 2. | Steven J. Hill | 1 | -0/+1 |
2012-10-11 | MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt) | Al Cooper | 1 | -0/+2 |
2012-09-28 | Merge branch 'ralf-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhi... | Ralf Baechle | 1 | -0/+2 |
2012-09-14 | MIPS: Add base architecture support for RI and XI. | Steven J. Hill | 1 | -0/+1 |
2012-09-14 | MIPS: Add support for the 1074K core. | Steven J. Hill | 1 | -0/+2 |
2011-12-08 | MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations | Kevin Cernekee | 1 | -1/+8 |
2011-10-25 | MIPS: Add accessor macros for 64-bit performance counter registers. | David Daney | 1 | -0/+8 |
2011-03-31 | Fix common misspellings | Lucas De Marchi | 1 | -2/+2 |
2010-10-29 | MIPS: Add BMIPS CP0 register definitions | Kevin Cernekee | 1 | -0/+51 |
2010-08-05 | MIPS: Define ST0_NMI in asm/mipsregs.h | David Daney | 1 | -0/+1 |
2010-05-16 | MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1 | Shane McDonald | 1 | -1/+8 |
2010-02-27 | MIPS: Add accessor functions and bit definitions for c0_PageGrain | David Daney | 1 | -0/+11 |
2010-02-27 | MIPS: Decode c0_config4 for large TLBs. | David Daney | 1 | -0/+4 |
2010-01-28 | MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs | David VomLehn | 1 | -0/+12 |
2009-06-17 | MIPS: Add hugetlbfs page defines. | David Daney | 1 | -0/+16 |
2009-05-14 | MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware. | Ralf Baechle | 1 | -4/+4 |
2009-05-14 | MIPS: Cavium: Add support for 8k and 32k page sizes. | Ralf Baechle | 1 | -0/+11 |
2009-05-14 | MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate. | Kevin D. Kissell | 1 | -8/+11 |
2009-03-24 | MIPS: Change {set,clear,change}_c0_<foo> to return old value. | Ralf Baechle | 1 | -11/+11 |