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path: root/arch/mips/bcm63xx/irq.c
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2015-03-05mips: fix up obsolete cpu function usage.Rusty Russell1-2/+2
Thanks to spatch, plus manual removal of "&*". Then a sweep for for_each_cpu_mask => for_each_cpu. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org
2014-08-26MIPS: BCM63xx: delete double assignmentJulia Lawall1-2/+2
Delete successive assignments to the same location. In each case, the duplicated assignment is modified to be in line with other nearby code. A simplified version of the semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression i; @@ *i = ...; i = ...; // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Cc: joe@perches.com Cc: kernel-janitors@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7565/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Allow setting affinity for IPICJonas Gorski1-6/+40
Wire up the set_affinity call for the internal PIC if booting on a cpu supporting it. Affinity is kept to boot cpu as default. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Use irq_desc as argument for (un)maskJonas Gorski1-8/+10
In preparation for applying affinity, use the irq descriptor as the argument for (un)mask. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7317/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Wire up the second cpu's irq lineJonas Gorski1-7/+37
Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7322/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Protect irq register accessesJonas Gorski1-0/+26
Since we will have the chance of accessing the registers concurrently, protect any accesses through a spinlock. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7321/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Add cpu argument to dispatch internalJonas Gorski1-8/+10
Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7320/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Populate irq_{stat,mask}_addr for second cpuJonas Gorski1-0/+18
Set it to zero if there is no second set. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7319/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Append irq line to irq_{stat,mask}*Jonas Gorski1-25/+26
The SMP capable irq controllers have two interrupt output pins which are controlled through separate registers, so make the variables arrays. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7318/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Replace irq dispatch code with a generic versionJonas Gorski1-74/+56
The generic version uses a variable length of u32 registers instead of u32/u64. This allows easier support for "wider" registers without having to rewrite everything. This "generic" version is as fast as the old version in the best case (i == next set bit), and twice as fast in the worst case in 64 bits. Using a macro was chosen over a (forced) inline version because gcc generated more compact code with the macro. The change from (signed) int to unsigned int for i and to_call was intentional as the value can be only between 0 and (width - 1) anyway, and allowed gcc to optimise the code a bit further. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7316/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Move bcm63xx_init_irq downJonas Gorski1-98/+92
Allows up to drop the prototypes from the top. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7315/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Add width to __dispatch_internalJonas Gorski1-3/+3
Make it follow the same naming convention as the other functions. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Gregory Fong <gregory.0xf0@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7314/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30MIPS: BCM63xx: Remove !RUNTIME_DETECT from irq setup codeJonas Gorski1-109/+0
Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7267/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: BCM63XX: add support for BCM3368 Cable ModemFlorian Fainelli1-0/+19
The Broadcom BCM3368 Cable Modem SoC is extremely similar to the existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort in the existing code base is required to get it supported. This patch adds support for the following on-chip peripherals: - two UARTS - GPIO - Ethernet - SPI - PCI - NOR Flash The most noticeable difference with 3368 is that it has its peripheral register at 0xfff8_0000 we check that separately in ioremap.h. Since 3368 is identical to 6358 for its clock and reset bits, we use them verbatim. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: BCM63XX: Handle SW IRQs 0-1Kevin Cernekee1-0/+4
MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI) on BMIPS SMP. Make the board support code aware of them. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> [jogo@openwrt.org: move sw irqs behind timer irq] Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08MIPS: BCM63XX: add basic BCM6362 supportJonas Gorski1-0/+22
Add basic support for detecting and booting the BCM6362. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5009/ Acked-by: John Crispin <blogic@openwrt.org>
2012-08-24MIPS: BCM63XX: use a switch for external irq configMaxime Bizon1-3/+11
Makes the code a bit more readable and easier to add support for new chips. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4093/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-24MIPS: BCM63XX: add external irq support for BCM6345Maxime Bizon1-2/+6
Add the missing definitions for BCM6345. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4091/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-07-24MIPS: BCM63XX: Add basic BCM6328 supportJonas Gorski1-0/+21
This includes CPU speed, memory size detection and working UART, but lacking the appropriate drivers, no support for attached flash. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3951/ Reviewed-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08MIPS: BCM63XX: Add support for bcm6368 CPU.Maxime Bizon1-1/+23
Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08MIPS: BCM63XX: Add external irq support for non 6348 CPUs.Maxime Bizon1-29/+102
Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08MIPS: BCM63XX: Handle 64 bits irq stat register in irq code.Maxime Bizon1-6/+76
bcm6368 has larger irq registers, prepare for this. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2898/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08MIPS: BCM63XX: Prepare irq code to handle different external irq hardware ↵Maxime Bizon1-37/+67
implementation. External irq only works for 6348, change code to prepare support of other CPUs. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2895/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-08MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.Maxime Bizon1-9/+77
No functionnal change is introduced by this patch. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2894/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21MIPS: Mark cascade and low level interrupts IRQF_NO_THREADWu Zhangjin1-0/+1
Mark interrupts with no_action handler, cascade interrupts, low level interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them from forced threading. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-29MIPS: Convert the irq functions to the new namesThomas Gleixner1-2/+2
Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-25MIPS: bcm63xx: Convert to new irq_chip functionsThomas Gleixner1-45/+32
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2176/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-07MIPS: Add missing #inclusions of <linux/irq.h>David Howells1-0/+1
Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should really include it. Note that this can replace #inclusions of <asm/irq.h>. This is required for the patch to sort out irqflags handling function naming to compile on MIPS. The problem is that these files require access to things like setup_irq() - which isn't available by #including <linux/interrupt.h> Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.Maxime Bizon1-0/+253
Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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