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path: root/arch/microblaze/pci/pci-common.c
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2022-11-25microblaze/PCI: Moving PCI iounmap and dependent codeThippeswamy Havalige1-72/+0
Moving PCI iounmap function and et all dependent code to iomap.c. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-14-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused pci_iobar_pfn() and et al declarationsThippeswamy Havalige1-19/+0
Remove unused pci_iobar_pfn() and et al declarations. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-12-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused sys_pciconfig_iobase() and et al declarationThippeswamy Havalige1-44/+0
Removed unused code which provides information of various I/O regions. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-11-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused pci_address_to_pio() conversion of CPU address ↵Thippeswamy Havalige1-23/+0
to I/O port Remove unused pci_address_to_pio() conversion of CPU address to I/O port function. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-10-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused PCI BIOS resource allocationThippeswamy Havalige1-489/+0
Remove PCI BIOSn unused code which provide's resource allocation for all pci bus and pci host controller memory initialization. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-8-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused allocation & free of PCI host bridge structureThippeswamy Havalige1-29/+0
Remove unused allocation and freeing of PCI host bridge structure. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-7-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused device tree parsing for a host bridge resourcesThippeswamy Havalige1-163/+0
Remove unused pci_process_bridge_OF_ranges function, used to parse the "ranges" property of a PCI host device. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-6-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused PCI legacy IO's access on a busThippeswamy Havalige1-140/+0
Remove PCI legacy read,write and mmap access IO's on a bus Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-5-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused PCI bus scan if configured as a hostThippeswamy Havalige1-19/+0
This routine is meant to be used early during boot, when the PCI bus numbers have not yet been assigned, and you need to issue PCI config cycles to an OF device. It could also be used to "fix" RTAS config cycles if you want to set pci_assign_all_buses to 1 and still use RTAS for PCI config cycles. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-4-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove Null PCI config access unused functionsThippeswamy Havalige1-64/+0
Remove unused NULL_PCI_OP config access functions, for the case when we can't find a hose. Remove unused EARLY_PCI_OP and other declarations. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-3-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-25microblaze/PCI: Remove unused early_read_config_byte() et al declarationsThippeswamy Havalige1-5/+0
early_read_config_byte() and similar are declared but never defined. Remove the unused declarations. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Link: https://lore.kernel.org/r/20221025065214.4663-2-thippeswamy.havalige@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-01-24microblaze/PCI: Remove pci_phys_mem_access_prot() dead codeBjorn Helgaas1-49/+0
pci_phys_mem_access_prot() is defined but never used. Remove it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20220121205150.1151607-1-helgaas@kernel.org Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-21PCI: Rename pcibios_add_device() to pcibios_device_add()Oliver O'Halloran1-2/+1
The general convention for pcibios_* hooks is that they're named after the corresponding pci_* function they provide a hook for. The exception is pcibios_add_device() which provides a hook for pci_device_add(). Rename pcibios_add_device() to pcibios_device_add() so it matches pci_device_add(). Also, remove the export of the microblaze version. The only caller must be compiled as a built-in so there's no reason for the export. Link: https://lore.kernel.org/r/20210913152709.48013-1-oohall@gmail.com Signed-off-by: Oliver O'Halloran <oohall@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Niklas Schnelle <schnelle@linux.ibm.com> # s390
2020-11-26microblaze: Remove noMMU codeMichal Simek1-2/+0
This configuration is obsolete and likely none is really using it. That's why remove it to simplify code. Note about CONFIG_MMU in hw_exception_handler.S is left intentionally for better comment understanding. Cc: Mike Rapoport <rppt@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Mike Rapoport <rppt@linux.ibm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/43486cab370e0c0a79860120b71e0caac75a7e44.1606397528.git.michal.simek@xilinx.com
2020-02-14microblaze: Drop using struct of_pci_range.pci_space fieldRob Herring1-6/+1
Let's use the struct of_pci_range.flags field instead so we can remove the pci_space field. Just drop the debug prints as there's plenty of debug output in drivers/of/address.c which can be enabled. Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner1-5/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-10-31mm: remove include/linux/bootmem.hMike Rapoport1-1/+1
Move remaining definitions and declarations from include/linux/bootmem.h into include/linux/memblock.h and remove the redundant header. The includes were replaced with the semantic patch below and then semi-automated removal of duplicated '#include <linux/memblock.h> @@ @@ - #include <linux/bootmem.h> + #include <linux/memblock.h> [sfr@canb.auug.org.au: dma-direct: fix up for the removal of linux/bootmem.h] Link: http://lkml.kernel.org/r/20181002185342.133d1680@canb.auug.org.au [sfr@canb.auug.org.au: powerpc: fix up for removal of linux/bootmem.h] Link: http://lkml.kernel.org/r/20181005161406.73ef8727@canb.auug.org.au [sfr@canb.auug.org.au: x86/kaslr, ACPI/NUMA: fix for linux/bootmem.h removal] Link: http://lkml.kernel.org/r/20181008190341.5e396491@canb.auug.org.au Link: http://lkml.kernel.org/r/1536927045-23536-30-git-send-email-rppt@linux.vnet.ibm.com Signed-off-by: Mike Rapoport <rppt@linux.vnet.ibm.com> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Michal Hocko <mhocko@suse.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Zankel <chris@zankel.net> Cc: "David S. Miller" <davem@davemloft.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greentime Hu <green.hu@gmail.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Ingo Molnar <mingo@redhat.com> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Jonas Bonn <jonas@southpole.se> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Ley Foon Tan <lftan@altera.com> Cc: Mark Salter <msalter@redhat.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Matt Turner <mattst88@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Michal Simek <monstr@monstr.eu> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Paul Burton <paul.burton@mips.com> Cc: Richard Kuo <rkuo@codeaurora.org> Cc: Richard Weinberger <richard@nod.at> Cc: Rich Felker <dalias@libc.org> Cc: Russell King <linux@armlinux.org.uk> Cc: Serge Semin <fancer.lancer@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-08-21microblaze/PCI: Remove stale pcibios_align_resource() commentLorenzo Pieralisi1-13/+0
commit 01cf9d524ff0 ("microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge IP driver") and commit ecf677c8dcaa ("PCI: Add a generic weak pcibios_align_resource()") first patched then removed pcibios_align_resource() from the microblaze architecture code but failed to remove the comment that was added to it. Remove it since it has now become stale and it is quite confusing. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Bharat Kumar Gogada <bharatku@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-22microblaze/PCI: Remove pcibios_claim_one_bus() dead codeBjorn Helgaas1-37/+0
pcibios_claim_one_bus() is defined but never used. Remove it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-05-22microblaze/PCI: Remove pcibios_finish_adding_to_bus() dead codeBjorn Helgaas1-24/+0
pcibios_finish_adding_to_bus() is defined but never used. Remove it. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-03-19microblaze: Use generic pci_mmap_resource_range()David Woodhouse1-90/+9
Commit f719582435 ("PCI: Add pci_mmap_resource_range() and use it for ARM64") added this generic function with the intent of using it everywhere and ultimately killing the old arch-specific implementations. Let's get on with that eradication... Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-09-09Merge tag 'pci-v4.14-changes' of ↵Linus Torvalds1-145/+0
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: - add enhanced Downstream Port Containment support, which prints more details about Root Port Programmed I/O errors (Dongdong Liu) - add Layerscape ls1088a and ls2088a support (Hou Zhiqiang) - add MediaTek MT2712 and MT7622 support (Ryder Lee) - add MediaTek MT2712 and MT7622 MSI support (Honghui Zhang) - add Qualcom IPQ8074 support (Varadarajan Narayanan) - add R-Car r8a7743/5 device tree support (Biju Das) - add Rockchip per-lane PHY support for better power management (Shawn Lin) - fix IRQ mapping for hot-added devices by replacing the pci_fixup_irqs() boot-time design with a host bridge hook called at probe-time (Lorenzo Pieralisi, Matthew Minter) - fix race when enabling two devices that results in upstream bridge not being enabled correctly (Srinath Mannam) - fix pciehp power fault infinite loop (Keith Busch) - fix SHPC bridge MSI hotplug events by enabling bus mastering (Aleksandr Bezzubikov) - fix a VFIO issue by correcting PCIe capability sizes (Alex Williamson) - fix an INTD issue on Xilinx and possibly other drivers by unifying INTx IRQ domain support (Paul Burton) - avoid IOMMU stalls by marking AMD Stoney GPU ATS as broken (Joerg Roedel) - allow APM X-Gene device assignment to guests by adding an ACS quirk (Feng Kan) - fix driver crashes by disabling Extended Tags on Broadcom HT2100 (Extended Tags support is required for PCIe Receivers but not Requesters, and we now enable them by default when Requesters support them) (Sinan Kaya) - fix MSIs for devices that use phantom RIDs for DMA by assuming MSIs use the real Requester ID (not a phantom RID) (Robin Murphy) - prevent assignment of Intel VMD children to guests (which may be supported eventually, but isn't yet) by not associating an IOMMU with them (Jon Derrick) - fix Intel VMD suspend/resume by releasing IRQs on suspend (Scott Bauer) - fix a Function-Level Reset issue with Intel 750 NVMe by waiting longer (up to 60sec instead of 1sec) for device to become ready (Sinan Kaya) - fix a Function-Level Reset issue on iProc Stingray by working around hardware defects in the CRS implementation (Oza Pawandeep) - fix an issue with Intel NVMe P3700 after an iProc reset by adding a delay during shutdown (Oza Pawandeep) - fix a Microsoft Hyper-V lockdep issue by polling instead of blocking in compose_msi_msg() (Stephen Hemminger) - fix a wireless LAN driver timeout by clearing DesignWare MSI interrupt status after it is handled, not before (Faiz Abbas) - fix DesignWare ATU enable checking (Jisheng Zhang) - reduce Layerscape dependencies on the bootloader by doing more initialization in the driver (Hou Zhiqiang) - improve Intel VMD performance allowing allocation of more IRQ vectors than present CPUs (Keith Busch) - improve endpoint framework support for initial DMA mask, different BAR sizes, configurable page sizes, MSI, test driver, etc (Kishon Vijay Abraham I, Stan Drozd) - rework CRS support to add periodic messages while we poll during enumeration and after Function-Level Reset and prepare for possible other uses of CRS (Sinan Kaya) - clean up Root Port AER handling by removing unnecessary code and moving error handler methods to struct pcie_port_service_driver (Christoph Hellwig) - clean up error handling paths in various drivers (Bjorn Andersson, Fabio Estevam, Gustavo A. R. Silva, Harunobu Kurokawa, Jeffy Chen, Lorenzo Pieralisi, Sergei Shtylyov) - clean up SR-IOV resource handling by disabling VF decoding before updating the corresponding resource structs (Gavin Shan) - clean up DesignWare-based drivers by unifying quirks to update Class Code and Interrupt Pin and related handling of write-protected registers (Hou Zhiqiang) - clean up by adding empty generic pcibios_align_resource() and pcibios_fixup_bus() and removing empty arch-specific implementations (Palmer Dabbelt) - request exclusive reset control for several drivers to allow cleanup elsewhere (Philipp Zabel) - constify various structures (Arvind Yadav, Bhumika Goyal) - convert from full_name() to %pOF (Rob Herring) - remove unused variables from iProc, HiSi, Altera, Keystone (Shawn Lin) * tag 'pci-v4.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (170 commits) PCI: xgene: Clean up whitespace PCI: xgene: Define XGENE_PCI_EXP_CAP and use generic PCI_EXP_RTCTL offset PCI: xgene: Fix platform_get_irq() error handling PCI: xilinx-nwl: Fix platform_get_irq() error handling PCI: rockchip: Fix platform_get_irq() error handling PCI: altera: Fix platform_get_irq() error handling PCI: spear13xx: Fix platform_get_irq() error handling PCI: artpec6: Fix platform_get_irq() error handling PCI: armada8k: Fix platform_get_irq() error handling PCI: dra7xx: Fix platform_get_irq() error handling PCI: exynos: Fix platform_get_irq() error handling PCI: iproc: Clean up whitespace PCI: iproc: Rename PCI_EXP_CAP to IPROC_PCI_EXP_CAP PCI: iproc: Add 500ms delay during device shutdown PCI: Fix typos and whitespace errors PCI: Remove unused "res" variable from pci_resource_io() PCI: Correct kernel-doc of pci_vpd_srdt_size(), pci_vpd_srdt_tag() PCI/AER: Reformat AER register definitions iommu/vt-d: Prevent VMD child devices from being remapping targets x86/PCI: Use is_vmd() rather than relying on the domain number ...
2017-08-29microblaze: Convert to using %pOF instead of full_nameRob Herring1-7/+7
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Michal Simek <monstr@monstr.eu>
2017-08-10microblaze/PCI: Remove pcibios_setup_bus_{self/devices} dead codeLorenzo Pieralisi1-132/+0
01cf9d524ff0 ("microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge IP driver") removed pcibios calls to: pcibios_setup_bus_self() pcibios_setup_bus_devices() Given that pcibios_fixup_bus() was the only caller of those functions they have now become dead code (along with the functions they were calling in turn), so they can be removed. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [bhelgaas: remove "Fixup resources of a PCI<->PCI bridge" comment] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Cc: Bharat Kumar Gogada <bharatku@xilinx.com> Cc: Ravi Kiran Gummaluri <rgummal@xilinx.com>
2017-08-02PCI: Add a generic weak pcibios_align_resource()Palmer Dabbelt1-7/+0
Multiple architectures define this as a trivial function, and I'm adding another one as part of the RISC-V port. Add a __weak version of pcibios_align_resource() and delete the now-obselete ones in a handful of ports. The only functional change should be that a handful of ports used to export pcibios_fixup_bus(). Only some architectures export this, so I just dropped it. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-08-02PCI: Add a generic weak pcibios_fixup_bus()Palmer Dabbelt1-6/+0
Multiple architectures define this as an empty function, and I'm adding another one as part of the RISC-V port. Add a __weak version of pcibios_fixup_bus() and delete the now-obselete ones in a handful of ports. The only functional change should be that microblaze used to export pcibios_fixup_bus(). None of the other architectures exports this, so I just dropped it. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-04-20PCI: Add BAR index argument to pci_mmap_page_range()David Woodhouse1-1/+1
In all cases we know which BAR it is. Passing it in means that arch code (or generic code; watch this space) won't have to go looking for it again. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-02-25mm: remove shmem_mapping() shmem_zero_setup() duplicatesHugh Dickins1-0/+1
Remove the prototypes for shmem_mapping() and shmem_zero_setup() from linux/mm.h, since they are already provided in linux/shmem_fs.h. But shmem_fs.h must then provide the inline stub for shmem_mapping() when CONFIG_SHMEM is not set, and a few more cfiles now need to #include it. Link: http://lkml.kernel.org/r/alpine.LSU.2.11.1702081658250.1549@eggly.anvils Signed-off-by: Hugh Dickins <hughd@google.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Michal Simek <monstr@monstr.eu> Cc: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2016-09-13microblaze/PCI: Add multidomain support for procfsBharat Kumar Gogada1-2/+2
We create a procfs directory for every PCI bus. Previously, the directory name was just the bus number, so using the same bus number in different domains caused a kernel crash when we tried to create a duplicate directory. Make pci_proc_domain() return the domain number, so procfs directories for buses in domain 0 are named with just the bus number, and directories for buses in other domains include both the domain number and the bus number. [bhelgaas: changelog] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-06-17microblaze/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus()Bjorn Helgaas1-28/+14
"User" addresses are shown in /sys/devices/pci.../.../resource and /proc/bus/pci/devices and used as mmap offsets for /proc/bus/pci/BB/DD.F files. For I/O port resources on microblaze, these are PCI bus addresses, i.e., raw BAR values. Previously pci_resource_to_user() computed the user address by subtracting "hose->io_base_virt - _IO_BASE" from the resource start: pci_resource_to_user() if (IO) offset = (unsigned long)hose->io_base_virt - _IO_BASE; *start = rsrc->start - offset; We've already told the PCI core about that "hose->io_base_virt - _IO_BASE" offset: pcibios_setup_phb_resources() res = &hose->io_resource; pci_add_resource_offset(resources, res, hose->io_base_virt - _IO_BASE); so pcibios_resource_to_bus() knows how to do that translation. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2016-06-17microblaze/PCI: Remove useless __pci_mmap_set_pgprot()Bjorn Helgaas1-30/+1
The microblaze __pci_mmap_set_pgprot() was apparently copied from powerpc, where it computes either an uncacheable pgprot_t or a write-combining one. But on microblaze, we always use the regular uncacheable pgprot_t. Remove the useless code in __pci_mmap_set_pgprot() and inline it at the only call site. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
2016-05-16microblaze: pci: export isa_io_base to fix link errorsFengguang Wu1-0/+2
ERROR: "isa_io_base" [sound/pci/vx222/snd-vx222.ko] undefined! ERROR: "isa_io_base" [sound/pci/trident/snd-trident.ko] undefined! ERROR: "isa_io_base" [sound/pci/snd-via82xx.ko] undefined! ... ERROR: "isa_io_base" [drivers/watchdog/wdt_pci.ko] undefined! ERROR: "isa_io_base" [drivers/watchdog/pcwd_pci.ko] undefined! ERROR: "isa_io_base" [drivers/video/vgastate.ko] undefined! ... ERROR: "isa_io_base" [drivers/video/fbdev/cirrusfb.ko] undefined! ERROR: "isa_io_base" [drivers/video/fbdev/arkfb.ko] undefined! ERROR: "isa_io_base" [drivers/usb/host/uhci-hcd.ko] undefined! ERROR: "isa_io_base" [drivers/usb/host/isp1362-hcd.ko] undefined! ERROR: "isa_io_base" [drivers/tty/serial/jsm/jsm.ko] undefined! ERROR: "isa_io_base" [drivers/tty/serial/8250/8250_pci.ko] undefined! ... ERROR: "isa_io_base" [drivers/scsi/qla2xxx/qla2xxx.ko] undefined! ERROR: "isa_io_base" [drivers/scsi/ppa.ko] undefined! Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-03-08microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge IP driverBharat Kumar Gogada1-46/+10
Modify the Microblaze PCI subsystem to work with the generic drivers/pci/host/pcie-xilinx.c driver on Microblaze and Zynq. [bhelgaas: changelog] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
2015-09-15PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code"Bjorn Helgaas1-1/+8
Revert dff22d2054b5 ("PCI: Call pci_read_bridge_bases() from core instead of arch code"). Reading PCI bridge windows is not arch-specific in itself, but there is PCI core code that doesn't work correctly if we read them too early. For example, Hannes found this case on an ARM Freescale i.mx6 board: pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff] pci 0000:00:00.0: PCI bridge to [bus 01-ff] pci 0000:00:00.0: BAR 8: no space for [mem size 0x01000000] (mem window) pci 0000:01:00.0: BAR 2: failed to assign [mem size 0x00200000] pci 0000:01:00.0: BAR 1: failed to assign [mem size 0x00004000] pci 0000:01:00.0: BAR 0: failed to assign [mem size 0x00000100] The 00:00.0 mem window needs to be at least 3MB: the 01:00.0 device needs 0x204100 of space, and mem windows are megabyte-aligned. Bus sizing can increase a bridge window size, but never *decrease* it (see d65245c3297a ("PCI: don't shrink bridge resources")). Prior to dff22d2054b5, ARM didn't read bridge windows at all, so the "original size" was zero, and we assigned a 3MB window. After dff22d2054b5, we read the bridge windows before sizing the bus. The firmware programmed a 16MB window (size 0x01000000) in 00:00.0, and since we never decrease the size, we kept 16MB even though we only needed 3MB. But 16MB doesn't fit in the host bridge aperture, so we failed to assign space for the window and the downstream devices. I think this is a defect in the PCI core: we shouldn't rely on the firmware to assign sensible windows. Ray reported a similar problem, also on ARM, with Broadcom iProc. Issues like this are too hard to fix right now, so revert dff22d2054b5. Reported-by: Hannes <oe5hpm@gmail.com> Reported-by: Ray Jui <rjui@broadcom.com> Link: http://lkml.kernel.org/r/CAAa04yFQEUJm7Jj1qMT57-LG7ZGtnhNDBe=PpSRa70Mj+XhW-A@mail.gmail.com Link: http://lkml.kernel.org/r/55F75BB8.4070405@broadcom.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2015-07-23PCI: Call pci_read_bridge_bases() from core instead of arch codeLorenzo Pieralisi1-8/+1
When we scan a PCI bus, we read PCI-PCI bridge window registers with pci_read_bridge_bases() so we can validate the resource hierarchy. Most architectures call pci_read_bridge_bases() from pcibios_fixup_bus(), but PCI-PCI bridges are not arch-specific, so this doesn't need to be in arch-specific code. Call pci_read_bridge_bases() directly from the PCI core instead of from arch code. For alpha and mips, we now call pci_read_bridge_bases() always; previously we only called it if PCI_PROBE_ONLY was set. [bhelgaas: changelog] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Ralf Baechle <ralf@linux-mips.org> CC: James E.J. Bottomley <jejb@parisc-linux.org> CC: Michael Ellerman <mpe@ellerman.id.au> CC: Bjorn Helgaas <bhelgaas@google.com> CC: Richard Henderson <rth@twiddle.net> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: David Howells <dhowells@redhat.com> CC: Russell King <linux@arm.linux.org.uk> CC: Tony Luck <tony.luck@intel.com> CC: David S. Miller <davem@davemloft.net> CC: Ingo Molnar <mingo@redhat.com> CC: Guenter Roeck <linux@roeck-us.net> CC: Michal Simek <monstr@monstr.eu> CC: Chris Zankel <chris@zankel.net>
2015-03-19PCI: Assign resources before drivers claim devices (pci_scan_root_bus())Yijing Wang1-0/+4
Previously, pci_scan_root_bus() created a root PCI bus, enumerated the devices on it, and called pci_bus_add_devices(), which made the devices available for drivers to claim them. Most callers assigned resources to devices after pci_scan_root_bus() returns, which may be after drivers have claimed the devices. This is incorrect; the PCI core should not change device resources while a driver is managing the device. Remove pci_bus_add_devices() from pci_scan_root_bus() and do it after any resource assignment in the callers. Note that ARM's pci_common_init_dev() already called pci_bus_add_devices() after pci_scan_root_bus(), so we only need to remove the first call: pci_common_init_dev pcibios_init_hw pci_scan_root_bus pci_bus_add_devices # first call pci_bus_assign_resources pci_bus_add_devices # second call [bhelgaas: changelog, drop "root_bus" var in alpha common_init_pci(), return failure earlier in mn10300, add "return" in x86 pcibios_scan_root(), return early if xtensa platform_pcibios_fixup() fails] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Richard Henderson <rth@twiddle.net> CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru> CC: Matt Turner <mattst88@gmail.com> CC: David Howells <dhowells@redhat.com> CC: Tony Luck <tony.luck@intel.com> CC: Michal Simek <monstr@monstr.eu> CC: Ralf Baechle <ralf@linux-mips.org> CC: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> CC: Sebastian Ott <sebott@linux.vnet.ibm.com> CC: "David S. Miller" <davem@davemloft.net> CC: Chris Metcalf <cmetcalf@ezchip.com> CC: Chris Zankel <chris@zankel.net> CC: Max Filippov <jcmvbkbc@gmail.com> CC: Thomas Gleixner <tglx@linutronix.de>
2015-01-16microblaze/PCI: Clip bridge windows to fit in upstream windowsYinghai Lu1-1/+12
Every PCI-PCI bridge window should fit inside an upstream bridge window because orphaned address space is unreachable from the primary side of the upstream bridge. If we inherit invalid bridge windows that overlap an upstream window from firmware, clip them to fit and update the bridge accordingly. [bhelgaas: changelog] Link: https://bugzilla.kernel.org/show_bug.cgi?id=85491 Reported-by: Marek Kordik <kordikmarek@gmail.com> Fixes: 5b28541552ef ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources") Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Michal Simek <monstr@monstr.eu> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: Sebastian Ott <sebott@linux.vnet.ibm.com>
2014-10-27microblaze: Fix IO space breakage after of_pci_range_to_resource() changeMichal Simek1-2/+7
Commit 0b0b0893d49b "of/pci: Fix the conversion of IO ranges into IO resources" changed the behaviour of of_pci_range_to_resource(). The issue is described here: "powerpc/pci: Fix IO space breakage after of_pci_range_to_resource() change" (sha1: aeba3731b150188685225b510886f1370d8814de) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-06-06Merge tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze ↵Linus Torvalds1-19/+0
into next Pull Microblaze updates from Michal Simek: - cleanup PCI and DMA handling - use generic device.h - some cleanups * tag 'microblaze-3.16-rc1' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Fix typo in head.S s/substract/subtract/ microblaze: remove check for CONFIG_XILINX_CONSOLE microblaze: Use generic device.h microblaze: Do not setup empty unmap_sg function microblaze: Remove device_to_mask microblaze: Clean device dma_ops structure microblaze: Cleanup PCI_DRAM_OFFSET handling microblaze: Do not setup pci_dma_ops microblaze: Return default dma operations microblaze: Enable SERIAL_OF_PLATFORM
2014-06-04microblaze: Cleanup PCI_DRAM_OFFSET handlingMichal Simek1-3/+0
PCI_DRAM_OFFSET/pci_dram_offset is 0 all the time and there is no difference for PCI and !PCI cases. Also remove the whole code which setup archdata.dma_data which is completely unused. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-06-04microblaze: Do not setup pci_dma_opsMichal Simek1-16/+0
pci_dma_ops are dma_direct_ops which are setup by default that's why not setup it again. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-05-01PCI: Move Open Firmware devspec attribute to PCI common codeSebastian Ott1-20/+0
Move the devspec OF attribute to PCI common code's set of device attributes since it's not architecture dependent. As a side effect microblaze and powerpc no longer need to use pcibios_add_platform_entries(). [bhelgaas: fold in #include for compile error] Link: https://lkml.kernel.org/r/alpine.LFD.2.11.1404141101500.1529@denkbrett Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2014-03-20microblaze/PCI: Use default pcibios_enable_device()Bjorn Helgaas1-5/+0
We don't need anything arch-specific in pcibios_enable_device(), so drop the arch implementation and use the default generic one. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Michal Simek <monstr@monstr.eu> CC: microblaze-uclinux@itee.uq.edu.au
2013-11-07Merge remote-tracking branch 'grant/devicetree/next' into for-nextRob Herring1-71/+1
2013-10-24microblaze/pci: Drop PowerPC-ism from irq parsingGrant Likely1-70/+1
The Microblaze PCI code copied the PowerPC irq handling, but powerpc needs to handle broken device trees that are not present on Microblaze. This patch removes the powerpc special case and replaces it with a direct of_irq_parse_and_map_pci() call. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu>
2013-10-24of/irq: simplify args to irq_create_of_mappingGrant Likely1-1/+1
All the callers of irq_create_of_mapping() pass the contents of a struct of_phandle_args structure to the function. Since all the callers already have an of_phandle_args pointer, why not pass it directly to irq_create_of_mapping()? Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-24of/irq: Replace of_irq with of_phandle_argsGrant Likely1-5/+4
struct of_irq and struct of_phandle_args are exactly the same structure. This patch makes the kernel use of_phandle_args everywhere. This in itself isn't a big deal, but it makes some follow-on patches simpler. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-24of/irq: Rename of_irq_map_* functions to of_irq_parse_*Grant Likely1-1/+1
The OF irq handling code has been overloading the term 'map' to refer to both parsing the data in the device tree and mapping it to the internal linux irq system. This is probably because the device tree does have the concept of an 'interrupt-map' function for translating interrupt references from one node to another, but 'map' is still confusing when the primary purpose of some of the functions are to parse the DT data. This patch renames all the of_irq_map_* functions to of_irq_parse_* which makes it clear that there is a difference between the parsing phase and the mapping phase. Kernel code can make use of just the parsing or just the mapping support as needed by the subsystem. The patch was generated mechanically with a handful of sed commands. Signed-off-by: Grant Likely <grant.likely@linaro.org> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-10-10microblaze: clean-up prom.h implicit includesRob Herring1-0/+1
While powerpc is a mess of implicit includes by prom.h, microblaze just copied this and is easily fixed. Add the necessary explicit includes and remove unnecessary includes and other parts from prom.h Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Michal Simek <monstr@monstr.eu> Cc: microblaze-uclinux@itee.uq.edu.au Cc: netdev@vger.kernel.org
2013-09-03of/pci: Use of_pci_range_parserAndrew Murray1-68/+38
This patch converts the pci_load_of_ranges function to use the new common of_pci_range_parser. Signed-off-by: Andrew Murray <amurray@embedded-bits.co.uk> Signed-off-by: Andrew Murray <Andrew.Murray@arm.com> Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>