summaryrefslogtreecommitdiff
path: root/arch/m68k/include/asm/m532xsim.h
AgeCommit message (Expand)AuthorFilesLines
2012-03-05m68knommu: make 532x QSPI platform addressing consistentGreg Ungerer1-0/+12
2012-03-05m68knommu: make 532x FEC platform addressing consistentGreg Ungerer1-0/+13
2012-03-05m68knommu: make 532x UART platform addressing consistentGreg Ungerer1-3/+7
2011-03-15m68knommu: remove ColdFire CLOCK_DIV config optionGreg Ungerer1-0/+1
2011-03-15m68knommu: remove use of MBAR in old-style ColdFire timerGreg Ungerer1-0/+8
2011-01-05m68knommu: merge bit definitions for version 3 ColdFire cache controllerGreg Ungerer1-27/+2
2011-01-05m68knommu: move UART addressing to part specific includesGreg Ungerer1-0/+7
2011-01-05m68knommu: fix clock rate value reported for ColdFire 54xx partsGreg Ungerer1-1/+2
2011-01-05m68knommu: move ColdFire CPU names into their headersGreg Ungerer1-0/+2
2010-05-17m68knommu: Coldfire QSPI platform supportSteven King1-0/+1
2009-09-16m68knommu: clean up ColdFire 532x CPU timer setupGreg Ungerer1-0/+5
2009-09-16m68knommu: mask off all interrupts in ColdFire intc-simr controllerGreg Ungerer1-33/+0
2009-09-16m68knommu: general interrupt controller for ColdFire 532x partsGreg Ungerer1-8/+10
2009-09-10generic GPIO support for the Freescale Coldfire 532x.sfking@fdwdc.com1-70/+84
2009-06-11m68knommu: add CPU reset code for the 532x ColdFireGreg Ungerer1-0/+12
2009-03-24m68knommu: add missing interrupt line definition for UART 2Greg Ungerer1-0/+1
2009-01-16m68k,m68knommu: merge header filesSam Ravnborg1-0/+2238
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-30 19:35:47 +0300