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2020-07-22Merge tag 'imx-fixes-5.8-3' of ↵Arnd Bergmann3-3/+4
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.8, round 3: - A couple of FEC2 phy-mode fixes on imx6sx-sabreauto and imx6sx-sdb board. - One fix on imx6qdl-icore pin muxing to get USB OTG_ID and SD card detect work correctly. * tag 'imx-fixes-5.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx6qdl-icore: Fix OTG_ID pin and sdcard detect ARM: dts: imx6sx-sabreauto: Fix the phy-mode on fec2 ARM: dts: imx6sx-sdb: Fix the phy-mode on fec2 Link: https://lore.kernel.org/r/20200720040148.GA20462@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'sunxi-fixes-for-5.8-1' of ↵Arnd Bergmann3-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes Two fixes for the Allwinner SoCs, one to relax the CMA allocation ranges that were failing on older SoCs and one to fix Cedrus on the H6. * tag 'sunxi-fixes-for-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: h6: Fix Cedrus IOMMU usage ARM: dts sunxi: Relax a bit the CMA pool allocation range Link: https://lore.kernel.org/r/e24f0608-6a4f-4163-b99e-a5f48e796184.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22Merge tag 'imx-defconfig-5.9' of ↵Arnd Bergmann1-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig i.MX defconfig update for 5.9: - Enable PCA9450 regulator driver in arm64 defconfig. - Enable RV8803 RTC and FSL_SAI audio support in arm64 defconfig to make it useful for Kontron sl28 boards. - Enable i.MX8MM clock and pinctrl driver in imx_v6_v7_defconfig to get AARCH32 mode kernel work on AARCH64 hardware. * tag 'imx-defconfig-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx_v6_v7_defconfig: Support i.MX8MM arm64: defconfig: enable RTC and audio support on Kontron sl28 boards arm64: defconfig: add pca9450 pmic driver Link: https://lore.kernel.org/r/20200720085536.24138-5-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-22ARM: dts: rockchip: Add HDMI out for RockPI N8/N10Jagan Teki2-0/+30
This patch adds support to enable HDMI out for N10 and N8 combinations SBCs. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Link: https://lore.kernel.org/r/20200720110230.367985-2-jagan@amarulasolutions.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22ARM: dts: rockchip: Add USB for RockPI N8/N10Jagan Teki2-0/+60
Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0 ports. This patch adds support to enable all these USB ports for N10 and N8 combinations SBCs. Note that the USB 3.0 port on RockPI N8 combination works as USB 2.0 OTG since it is driven from RK3288. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Link: https://lore.kernel.org/r/20200720110230.367985-1-jagan@amarulasolutions.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22ARM: dts: rockchip: Add usb host0 ohci node for rk3288Jagan Teki1-1/+10
rk3288 and rk3288w have a usb host0 ohci controller. Although rk3288 ohci doesn't actually work on hardware, but rk3288w ohci can work well. So add usb host0 ohci node in rk3288 dtsi and boards can then enable it if supported. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Cc: William Wu <william.wu@rock-chips.com> Link: https://lore.kernel.org/r/20200720105846.367776-1-jagan@amarulasolutions.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-22ARM: uaccess: add further explanation of __range_ok()Russell King1-1/+5
Detail the success return condition, and that we rely on KERNEL_DS being zero for this to operate correctly. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-22arm, arm64: Select CONFIG_SCHED_THERMAL_PRESSUREValentin Schneider1-0/+1
This option now correctly depends on CPU_FREQ_THERMAL, so select it on the architectures that implement the required functions, arch_set_thermal_pressure() and arch_get_thermal_pressure(). Signed-off-by: Valentin Schneider <valentin.schneider@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lkml.kernel.org/r/20200712165917.9168-4-valentin.schneider@arm.com
2020-07-22arch_topology, sched/core: Cleanup thermal pressure definitionValentin Schneider1-1/+2
The following commit: 14533a16c46d ("thermal/cpu-cooling, sched/core: Move the arch_set_thermal_pressure() API to generic scheduler code") moved the definition of arch_set_thermal_pressure() to sched/core.c, but kept its declaration in linux/arch_topology.h. When building e.g. an x86 kernel with CONFIG_SCHED_THERMAL_PRESSURE=y, cpufreq_cooling.c ends up getting the declaration of arch_set_thermal_pressure() from include/linux/arch_topology.h, which is somewhat awkward. On top of this, sched/core.c unconditionally defines o The thermal_pressure percpu variable o arch_set_thermal_pressure() while arch_scale_thermal_pressure() does nothing unless redefined by the architecture. arch_*() functions are meant to be defined by architectures, so revert the aforementioned commit and re-implement it in a way that keeps arch_set_thermal_pressure() architecture-definable, and doesn't define the thermal pressure percpu variable for kernels that don't need it (CONFIG_SCHED_THERMAL_PRESSURE=n). Signed-off-by: Valentin Schneider <valentin.schneider@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200712165917.9168-2-valentin.schneider@arm.com
2020-07-21ARM: davinci: dm646x-evm: Simplify error handling in 'evm_sw_setup()'Christophe JAILLET1-9/+4
There is no need to call 'gpio_free(evm_sw_gpio[i])' for these error handling cases, it is already done in the error handling path at label 'out_free'. Simplify the code and axe a few LoC. While at it, also explicitly return 0 in the normal path. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2020-07-21ARM: davinci: Fix trivial spellingKieran Bingham1-1/+1
The word 'descriptor' is misspelled throughout the tree. Fix it up accordingly: decriptors -> descriptors Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> [nsekhar@ti.com: fixed up subject prefix] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2020-07-21ARM: 8993/1: remove it8152 PCI controller driverMike Rapoport5-492/+0
The it8152 PCI host controller was only used by cm-x2xx platforms. Since these platforms were removed, there is no point to keep it8152 driver. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8992/1: Fix unwind_frame for clang-built kernelsNathan Huckleberry1-0/+24
Since clang does not push pc and sp in function prologues, the current implementation of unwind_frame does not work. By using the previous frame's lr/fp instead of saved pc/sp we get valid unwinds on clang-built kernels. The bounds check on next frame pointer must be changed as well since there are 8 less bytes between frames. This fixes /proc/<pid>/stack. Link: https://github.com/ClangBuiltLinux/linux/issues/912 Reported-by: Miles Chen <miles.chen@mediatek.com> Tested-by: Miles Chen <miles.chen@mediatek.com> Cc: stable@vger.kernel.org Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Huckleberry <nhuck@google.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8991/1: use VFP assembler mnemonics if availableStefan Agner6-5/+41
The integrated assembler of Clang 10 and earlier do not allow to access the VFP registers through the coprocessor load/store instructions: arch/arm/vfp/vfpmodule.c:342:2: error: invalid operand for instruction fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK)); ^ arch/arm/vfp/vfpinstr.h:79:6: note: expanded from macro 'fmxr' asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr " #_vfp_ ", %0" ^ <inline asm>:1:6: note: instantiated into assembly here mcr p10, 7, r0, cr8, cr0, 0 @ fmxr FPEXC, r0 ^ This has been addressed with Clang 11 [0]. However, to support earlier versions of Clang and for better readability use of VFP assembler mnemonics still is preferred. Ideally we would replace this code with the unified assembler language mnemonics vmrs/vmsr on call sites along with .fpu assembler directives. The GNU assembler supports the .fpu directive at least since 2.17 (when documentation has been added). Since Linux requires binutils 2.21 it is safe to use .fpu directive. However, binutils does not allow to use FPINST or FPINST2 as an argument to vmrs/vmsr instructions up to binutils 2.24 (see binutils commit 16d02dc907c5): arch/arm/vfp/vfphw.S: Assembler messages: arch/arm/vfp/vfphw.S:162: Error: operand 0 must be FPSID or FPSCR pr FPEXC -- `vmsr FPINST,r6' arch/arm/vfp/vfphw.S:165: Error: operand 0 must be FPSID or FPSCR pr FPEXC -- `vmsr FPINST2,r8' arch/arm/vfp/vfphw.S:235: Error: operand 1 must be a VFP extension System Register -- `vmrs r3,FPINST' arch/arm/vfp/vfphw.S:238: Error: operand 1 must be a VFP extension System Register -- `vmrs r12,FPINST2' Use as-instr in Kconfig to check if FPINST/FPINST2 can be used. If they can be used make use of .fpu directives and UAL VFP mnemonics for register access. This allows to build vfpmodule.c with Clang and its integrated assembler. [0] https://reviews.llvm.org/D59733 Link: https://github.com/ClangBuiltLinux/linux/issues/905 Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8990/1: use VFP assembler mnemonics in register load/store macrosStefan Agner1-8/+11
The integrated assembler of Clang 10 and earlier do not allow to access the VFP registers through the coprocessor load/store instructions: <instantiation>:4:6: error: invalid operand for instruction LDC p11, cr0, [r10],#32*4 @ FLDMIAD r10!, {d0-d15} ^ This has been addressed with Clang 11 [0]. However, to support earlier versions of Clang and for better readability use of VFP assembler mnemonics still is preferred. Replace the coprocessor load/store instructions with explicit assembler mnemonics to accessing the floating point coprocessor registers. Use assembler directives to select the appropriate FPU version. This allows to build these macros with GNU assembler as well as with Clang's built-in assembler. [0] https://reviews.llvm.org/D59733 Link: https://github.com/ClangBuiltLinux/linux/issues/905 Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8989/1: use .fpu assembler directives instead of assembler argumentsStefan Agner2-12/+20
Explicit FPU selection has been introduced in commit 1a6be26d5b1a ("[ARM] Enable VFP to be built when non-VFP capable CPUs are selected") to make use of assembler mnemonics for VFP instructions. However, clang currently does not support passing assembler flags like this and errors out with: clang-10: error: the clang compiler does not support '-Wa,-mfpu=softvfp+vfp' Make use of the .fpu assembler directives to select the floating point hardware selectively. Also use the new unified assembler language mnemonics. This allows to build these procedures with Clang. Link: https://github.com/ClangBuiltLinux/linux/issues/762 Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8982/1: mm: Simplify act_mm macroLinus Walleij1-3/+1
The act_mm assembly macro is actually partly reimplementing get_thread_info so let's just use that. Suggested-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8981/1: add arch/arm/KbuildMasahiro Yamada2-11/+12
Use the standard obj-y form to specify the sub-directories under arch/arm/. No functional change intended. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8988/1: mmu: fix crash in EFI calls due to p4d typo in ↵Ard Biesheuvel1-1/+1
create_mapping_late() Commit 84e6ffb2c49c7901 ("arm: add support for folded p4d page tables") updated create_mapping_late() to take folded P4Ds into account when creating mappings, but inverted the p4d_alloc() failure test, resulting in no mapping to be created at all. When the EFI rtc driver subsequently tries to invoke the EFI GetTime() service, the memory regions covering the EFI data structures are missing from the page tables, resulting in a crash like Unable to handle kernel paging request at virtual address 5ae0cf28 pgd = (ptrval) [5ae0cf28] *pgd=80000040205003, *pmd=00000000 Internal error: Oops: 207 [#1] SMP THUMB2 Modules linked in: CPU: 0 PID: 7 Comm: kworker/u32:0 Not tainted 5.7.0+ #92 Hardware name: QEMU KVM Virtual Machine, BIOS 0.0.0 02/06/2015 Workqueue: efi_rts_wq efi_call_rts PC is at efi_call_rts+0x94/0x294 LR is at efi_call_rts+0x83/0x294 pc : [<c0b4f098>] lr : [<c0b4f087>] psr: 30000033 sp : e6219ef0 ip : 00000000 fp : ffffe000 r10: 00000000 r9 : 00000000 r8 : 30000013 r7 : e6201dd0 r6 : e6201ddc r5 : 00000000 r4 : c181f264 r3 : 5ae0cf10 r2 : 00000001 r1 : e6201dd0 r0 : e6201ddc Flags: nzCV IRQs on FIQs on Mode SVC_32 ISA Thumb Segment none Control: 70c5383d Table: 661cc840 DAC: 00000001 Process kworker/u32:0 (pid: 7, stack limit = 0x(ptrval)) ... [<c0b4f098>] (efi_call_rts) from [<c0448219>] (process_one_work+0x16d/0x3d8) [<c0448219>] (process_one_work) from [<c0448581>] (worker_thread+0xfd/0x408) [<c0448581>] (worker_thread) from [<c044ca7b>] (kthread+0x103/0x104) ... Fixes: 84e6ffb2c49c7901 ("arm: add support for folded p4d page tables") Reviewed-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8987/1: VDSO: Fix incorrect clock_gettime64Jaedon Shin1-0/+1
__vdso_*() should be removed and fallback used if CNTCVT is not available by cntvct_functional(). __vdso_clock_gettime64 when added previous commit is using the incorrect CNTCVT value in that state. __vdso_clock_gettime64 is also added to remove it's symbol. Cc: stable@vger.kernel.org Fixes: 74d06efb9c2f ("ARM: 8932/1: Add clock_gettime64 entry point") Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Tested-by: Robin Murphy <robin.mruphy@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: 8986/1: hw_breakpoint: Don't invoke overflow handler on uaccess watchpointsWill Deacon1-5/+22
Unprivileged memory accesses generated by the so-called "translated" instructions (e.g. LDRT) in kernel mode can cause user watchpoints to fire unexpectedly. In such cases, the hw_breakpoint logic will invoke the user overflow handler which will typically raise a SIGTRAP back to the current task. This is futile when returning back to the kernel because (a) the signal won't have been delivered and (b) userspace can't handle the thing anyway. Avoid invoking the user overflow handler for watchpoints triggered by kernel uaccess routines, and instead single-step over the faulting instruction as we would if no overflow handler had been installed. Cc: <stable@vger.kernel.org> Fixes: f81ef4a920c8 ("ARM: 6356/1: hw-breakpoint: add ARM backend for the hw-breakpoint framework") Reported-by: Luis Machado <luis.machado@linaro.org> Tested-by: Luis Machado <luis.machado@linaro.org> Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2020-07-21ARM: davinci: Replace HTTP links with HTTPS onesAlexander A. Klimov13-15/+13
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> [nsekhar@ti.com: drop obsolete hawkboard.org URL completeley fixup subject line prefix] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2020-07-21usb: ohci-omap: Convert to use GPIO descriptorsLinus Walleij1-0/+17
The OMAP1 OHCI driver is using the legacy GPIO API to grab some random GPIO lines. One is from the TPS65010 chip and used for power, another one is for overcurrent and while the driver picks this line it doesn't watch it at all. Convert the driver and the OMAP1 OSK board file to pass these two GPIOs as machine described GPIO descriptors. I noticed the overcurrent GPIO line is not really used in the code so dropped in a little comment for other developers. Cc: Janusz Krzysztofik <jmkrzyszt@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200720135524.100374-2-linus.walleij@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-07-21asm/rwonce: Don't pull <asm/barrier.h> into 'asm-generic/rwonce.h'Will Deacon1-0/+1
Now that 'smp_read_barrier_depends()' has gone the way of the Norwegian Blue, drop the inclusion of <asm/barrier.h> in 'asm-generic/rwonce.h'. This requires fixups to some architecture vdso headers which were previously relying on 'asm/barrier.h' coming in via 'linux/compiler.h'. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Will Deacon <will@kernel.org>
2020-07-21ARM: dts: stm32: enable usb-role-switch on USB OTG on stm32mp15xx-dkxAmelie Delaunay1-1/+1
Now that USB OTG driver supports usb role switch by overriding PHY input signals (A-Valid, B-Valid and Vbus-Valid), enable it on stm32mp15xx-dkx. dr_mode needn't to be forced to Peripheral anymore, it is set to OTG in SoC device tree. USB role (USB_ROLE_NONE, USB_ROLE_DEVICE, USB_ROLE_HOST) will be provided by STUSB1600 Type-C controller driver. This patch depends on "Add STUSB160x Type-C port controller support" series, which is under review. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32mp151Benjamin Gaignard1-1/+1
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32h743Benjamin Gaignard1-3/+3
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32f746Benjamin Gaignard1-3/+3
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Add compatibles for syscon for stm32f426Benjamin Gaignard1-3/+3
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrlPatrick Delaunay1-14/+14
Move spi4_pins_a nodes from pinctrl_z to pinctrl as the associated pins are not in BANK Z. Fixes: 498a7014989d ("ARM: dts: stm32: Add missing pinctrl entries for STM32MP15") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: configure i2c5 support on stm32mp15xx-dkxFabrice Gasnier1-0/+13
Configure I2C5 on stm32mp15 DK boards. It's available and can be used on: - Arduino connector - GPIO expansion connector Keep it disabled by default, so the pins are kept in their initial state to lower power consumption. This way they can also be used as GPIO. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Alain Volmat <alain.volmat@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add usart2 node to stm32mp157c-dk2Erwan Le Ray1-0/+9
Adds the usart2 node to stm32mp157c-dk2 board. usart2 pins are connected to Bluetooth component. usart2 is disabled by default. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boardsErwan Le Ray3-0/+10
Adds uart7 node to stm32mp15xx-dkx and uart7 alias to stm32mp157a-dk1 and stm32mp157c-dk2 boards. uart7 pins are connected to Arduino connector. uart7 is disabled by default. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add usart3 node to stm32mp157c-ev1Erwan Le Ray1-0/+15
Adds the usart3 node to stm32mp157c-ev1 board. usart3 pins are connected to GPIO Expansion connector. usart3 is disabled by default. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boardsErwan Le Ray3-0/+11
Adds usart3 node to stm32mp15xx-dkx and usart3 alias to stm32mp157a-dk1 and stm32mp157c-dk2 boards. usart3 pins are connected to GPIO Expansion connector. usart3 is disabled by default. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrlErwan Le Ray1-0/+138
Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins configurations in stm32mp15-pinctrl. - usart2_pins_c pins are connected to Bluetooth chip on dk2 board. - usart3_pins_b pins are connected to GPIO expansion connector on evx board. - usart3_pins_c pins are connected to GPIO expansion connector on dkx board. - uart7_pins_c pins are connected to Arduino Uno connector on dkx board. Signed-off-by: Erwan Le Ray <erwan.leray@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21ARM: dts: stm32: cosmetic updates in stm32mp15-pinctrlPatrick Delaunay1-5/+4
Use tabs where possible and remove multiple blanks lines. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-20Merge tag 'sunxi-config-for-5.9-1' of ↵Arnd Bergmann1-15/+33
git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/defconfig A bunch of patches to generally make sunxi_defconfig more helpful and add all the new drivers merged recently. * tag 'sunxi-config-for-5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: configs: sunxi: Enable crypto related options ARM: sunxi: configs: Enable the Mailbox driver ARM: configs: sunxi: Enable the PS/2 controller ARM: configs: sunxi: Enable Lima ARM: configs: sunxi: Add DRM output-related options ARM: configs: sunxi: Enable ASoC options ARM: configs: sunxi: Enable Cedrus ARM: configs: sunxi: Enable the deinterlace and rotation engines ARM: configs: sunxi: Enable the CSI drivers ARM: configs: sunxi: Run savedefconfig Link: https://lore.kernel.org/r/c74e64c9-f1f2-40ee-b4cd-c1430d32cf8d.lettre@localhost Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-20Merge tag 'tegra-for-5.9-arm-defconfig' of ↵Arnd Bergmann1-0/+43
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig ARM: tegra: Default configuration changes for v5.9-rc1 Enables a few new configuration options that are useful on the new Nexus 7 and Acer A500 devices, as well as the userspace CPU frequency governor that's mainly used for testing. * tag 'tegra-for-5.9-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500 ARM: tegra: Enable CPUFREQ userspace governor Link: https://lore.kernel.org/r/20200717161300.1661002-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-07-20ARM: dts: exynos: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-20ARM: s3c24xx: Replace HTTP links with HTTPS onesAlexander A. Klimov5-5/+5
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-20ARM: dts: sunxi: bananapi-m2-plus-v1.2: Fix CPU supply voltagesChen-Yu Tsai1-3/+3
The Bananapi M2+ uses a GPIO line to change the effective resistance of the CPU supply regulator's feedback resistor network. The voltages described in the device tree were given directly by the vendor. This turns out to be slightly off compared to the real values. The updated voltages are based on calculations of the feedback resistor network, and verified down to three decimal places with a multi-meter. Fixes: 6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-4-wens@kernel.org
2020-07-20ARM: dts: sunxi: bananapi-m2-plus-v1.2: Add regulator supply to all CPU coresChen-Yu Tsai1-0/+12
The device tree currently only assigns the a supply for the first CPU core, when in reality the regulator supply is shared by all four cores. This might cause an issue if the implementation does not realize the sharing of the supply. Assign the same regulator supply to the remaining CPU cores to address this. Fixes: 6eeb4180d4b9 ("ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-3-wens@kernel.org
2020-07-20ARM: dts: sunxi: libretech-all-h3-cc: Add regulator supply to all CPU coresChen-Yu Tsai1-0/+12
The device tree currently only assigns the a supply for the first CPU core, when in reality the regulator supply is shared by all four cores. This might cause an issue if the implementation does not realize the sharing of the supply. Assign the same regulator supply to the remaining CPU cores to address this. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200717160053.31191-2-wens@kernel.org
2020-07-20ARM: dts: at91: sama5d3_xplained: change phy-modeAlexandre Belloni1-1/+1
Since commit bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY"), networking is broken on sama5d3 xplained. The device tree has phy-mode = "rgmii" and this worked before, because KSZ9031 PHY started with default RGMII internal delays configuration (TX off, RX on 1.2 ns) and MAC provided TX delay. After above commit, the KSZ9031 PHY starts handling phy mode properly and disables RX delay, as result networking is become broken. Fix it by switching to phy-mode = "rgmii-rxid" to reflect previous behavior. Fixes: bcf3440c6dd78bfe ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY") Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200717233644.841080-1-alexandre.belloni@bootlin.com
2020-07-20ARM: dts: ux500-skomer: Correct accel mounting matrixLinus Walleij1-2/+2
This corrects the mounting matrix for the BMA254 accelerometer to what makes PostmarketOS actually orient the screen the right way on this device. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200719201603.3610389-1-linus.walleij@linaro.org
2020-07-20ARM: dts: exynos: Disable frequency scaling for FSYS bus on Odroid XU3 familyMarek Szyprowski1-6/+0
Commit 1019fe2c7280 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids") changed the parameters of the OPPs for the FSYS bus. Besides the frequency adjustments, it also removed the 'shared-opp' property from the OPP table used for FSYS_APB and FSYS busses. This revealed that in fact the FSYS bus frequency scaling never worked. When one OPP table is marked as 'opp-shared', only the first bus which selects the OPP sets the rate of its clock. Then OPP core assumes that the other busses have been changed to that OPP and no change to their clock rates are needed. Thus when FSYS_APB bus, which was registered first, set the rate for its clock, the OPP core did not change the FSYS bus clock later. The mentioned commit removed that behavior, what introduced a regression on some Odroid XU3 boards. Frequency scaling of the FSYS bus causes instability of the USB host operation, what can be observed as network hangs. To restore old behavior, simply disable frequency scaling for the FSYS bus. Reported-by: Willy Wolff <willy.mh.wolff.ml@gmail.com> Fixes: 1019fe2c7280 ("ARM: dts: exynos: Adjust bus related OPPs to the values correct for Exynos5422 Odroids") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-07-20ARM: dts: aspeed: tacoma: Fix gpio-key definitionsJoel Stanley1-59/+0
This patch was applied twice. Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20ARM: dts: rainier: Configure ball Y23 as GPIOP7 for MCLR_VPPAndrew Jeffery1-0/+7
GPIOP7 is used in the Rainier design to manage the state of a microcontroller elsewhere in the system but its ball, Y23, is the driver of the heartbeat LED on the ast2600-evb and the SoC defaults Y23 at power-on to the pulse-train behaviour used to drive the LED. This causes much confusion for the micro in the Rainier system, so hog the line as early as possible. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-07-20ARM: dts: aspeed: rainier: Add second cfam on the hubEddie James1-0/+36
The hub FSI master can access the cfams on two other processors. Reflect this by adding a second cfam to the first hub description. Signed-off-by: Eddie James <eajames@linux.ibm.com> Tested-by: Andrew Geissler <geissonator@yahoo.com> Signed-off-by: Joel Stanley <joel@jms.id.au>