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2020-09-02ARM: dts: exynos: Add CPU cooling in SMDKv310Krzysztof Kozlowski1-0/+13
Add missing cooling devices for CPU thermal zones in Exynos4210 SMDKv310 board. This allows to scale down CPU frequency (and voltage) in case of thermal pressure. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-20-krzk@kernel.org
2020-09-02ARM: dts: exynos: Add CPU cooling in Exynos4210 OrigenKrzysztof Kozlowski1-0/+13
Add missing cooling devices for CPU thermal zones in Exynos4210 Origen board. This allows to scale down CPU frequency (and voltage) in case of thermal pressure. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-19-krzk@kernel.org
2020-09-02ARM: dts: exynos: Override thermal by label in TratsKrzysztof Kozlowski1-16/+13
Using full paths to extend or override a device tree node is error prone since if there was a typo error, a new node will be created instead of extending the node as it was desired. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-18-krzk@kernel.org
2020-09-02ARM: dts: exynos: Override thermal by label in Galaxy I9000Krzysztof Kozlowski1-15/+13
Using full paths to extend or override a device tree node is error prone since if there was a typo error, a new node will be created instead of extending the node as it was desired. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-17-krzk@kernel.org
2020-09-02ARM: dts: exynos: Override thermal by label in Exynos4210Krzysztof Kozlowski1-19/+17
Using full paths to extend or override a device tree node is error prone since if there was a typo error, a new node will be created instead of extending the node as it was desired. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-16-krzk@kernel.org
2020-09-02ARM: dts: exynos: Align SPI GPIO node name with dtschema in Galaxy I9100Krzysztof Kozlowski1-1/+1
The device tree schema expects SPI controller to be named "spi", otherwise dtbs_check complain with a warning like: arch/arm/boot/dts/exynos4210-i9100.dt.yaml: spi-lcd: $nodename:0: 'spi-lcd' does not match '^spi(@.*|-[0-9a-f])*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-15-krzk@kernel.org
2020-09-02ARM: dts: exynos: Replace deprecated GPIO spi-gpio properties in Universal C210Krzysztof Kozlowski1-2/+2
"gpio-sck" and "gpio-mosi" are deprecated so update the DTS to fix dtbs_checks warnings like: arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: spi-lcd: gpio-sck: False schema does not allow [[85, 1, 0]] Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20200830135200.24304-14-krzk@kernel.org
2020-09-02ARM: dts: exynos: Align SPI GPIO node name with dtschema in Universal C210Krzysztof Kozlowski1-1/+1
The device tree schema expects SPI controller to be named "spi", otherwise dtbs_check complain with a warning like: arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: spi-lcd: $nodename:0: 'spi-lcd' does not match '^spi(@.*|-[0-9a-f])*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-13-krzk@kernel.org
2020-09-02ARM: dts: exynos: Add and enable 32 kHz modem clock in TratsKrzysztof Kozlowski1-0/+5
The PMIC has a 32768 Hz clock used by the modem which is implemented by driver as a regulator. Add and enable it to be sure modem get's its signal. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-10-krzk@kernel.org
2020-09-02ARM: dts: exynos: Add and enable 32 kHz modem clock in Galaxy I9100Krzysztof Kozlowski1-0/+5
The PMIC has a 32768 Hz clock used by the modem which is implemented by driver as a regulator. Add and enable it to be sure modem get's its signal. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-8-krzk@kernel.org
2020-09-02ARM: dts: exynos: Correct S3C RTC bindings in SMDKv310Krzysztof Kozlowski1-0/+12
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. However there is no clock provided for the PMIC and the driver registers the clock as regulator. This is an old driver which will not be updated so add a workaround - a fixed-clock to fill missing clock phandle reference in S3C RTC. This allows to enable the S3C RTC and fixes dtbs_check warnings: arch/arm/boot/dts/exynos4210-smdkv310.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short arch/arm/boot/dts/exynos4210-smdkv310.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-7-krzk@kernel.org
2020-09-02ARM: dts: exynos: Correct S3C RTC bindings and enable it in Universal C210Krzysztof Kozlowski1-0/+13
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC. However there is no clock provided for the PMIC and the driver registers the clock as regulator. This is an old driver which will not be updated so add a workaround - add a fixed-clock to fill missing clock phandle reference in S3C RTC. The "clock" regulator in PMIC is already present and enabled. This allows to enable the S3C RTC and fixes dtbs_check warnings: arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short arch/arm/boot/dts/exynos4210-universal_c210.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20200830135200.24304-6-krzk@kernel.org
2020-09-02ARM: dts: exynos: Correct S3C RTC bindings and enable it in TratsKrzysztof Kozlowski1-0/+18
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC (Maxim MAX8997). However there is no clock provided for the PMIC and the driver registers the clock as regulator. This is an old driver which will not be updated so add a workaround: 1. Enable the "clock" regulator in PMIC, 2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC. This allows to enable the S3C RTC and fixes dtbs_check warnings: arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short arch/arm/boot/dts/exynos4210-trats.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20200830135200.24304-5-krzk@kernel.org
2020-09-02ARM: dts: exynos: Correct S3C RTC bindings and enable it in OrigenKrzysztof Kozlowski1-0/+14
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC (Maxim MAX8997). However there is no clock provided for the PMIC and the driver registers the clock as regulator. This is an old driver which will not be updated so add a workaround: 1. Enable the "clock" regulator in PMIC, 2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC. This allows to enable the S3C RTC and fixes dtbs_check warnings: arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short arch/arm/boot/dts/exynos4210-origen.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20200830135200.24304-4-krzk@kernel.org
2020-09-02ARM: dts: exynos: Correct S3C RTC bindings and enable it in Galaxy I9100Krzysztof Kozlowski1-0/+18
The S3C RTC requires 32768 Hz clock as input which is provided by PMIC (Maxim MAX8997). However there is no clock provided for the PMIC and the driver registers the clock as regulator. This is an old driver which will not be updated so add a workaround: 1. Enable the "clock" regulator in PMIC, 2. Add a fixed-clock to fill missing clock phandle reference in S3C RTC. This allows to enable the S3C RTC and fixes dtbs_check warnings: arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rtc@10070000: clocks: [[5, 346]] is too short arch/arm/boot/dts/exynos4210-i9100.dt.yaml: rtc@10070000: clock-names: ['rtc'] is too short Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-3-krzk@kernel.org
2020-09-02ARM: dts: exynos: Correct GPU regulator properties in Galaxy I9100Krzysztof Kozlowski1-2/+1
The regulator property 'regulator-microvolt-offset' should be put next to regulator definition, not consumer. The property 'regulator-microsecs-delay' is not valid at all. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-2-krzk@kernel.org
2020-09-02ARM: dts: exynos: Silence i2c-gpio dtschema warning in Galaxy I9100Krzysztof Kozlowski1-1/+1
The name of I2C controller over GPIO lines node ends with '-gpio' which confuses dtschema: /arch/arm/boot/dts/exynos4210-i9100.dt.yaml: /: i2c-gpio: {'compatible': ['i2c-gpio'], ... 'maxim,over-volt': [[4500]]}} is not of type 'array' From schema: lib/python3.6/site-packages/dtschema/schemas/gpio/gpio-consumer.yaml Add a '-0' suffix to silence it. This pattern on naming i2c-gpio is already present in many other dts. No functional change. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200830135200.24304-1-krzk@kernel.org
2020-09-02ARM: dts: exynos: Remove snps, dwc2 compatible in Exynos3250Krzysztof Kozlowski1-1/+1
The binding for DesignWare HS OTG USB 2.0 in Samsung SoCs take only one compatible. This fixes dtbs_check warnings like: arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: hsotg@12480000: compatible: ['samsung,s3c6400-hsotg', 'snps,dwc2'] is not valid under any of the given schemas (Possible causes of the failure): Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200829172532.29358-4-krzk@kernel.org
2020-09-01ARM: shmobile: defconfig: Enable CONFIG_PCIE_RCAR_HOSTLad Prabhakar1-1/+1
config option PCIE_RCAR internally selects PCIE_RCAR_HOST which builds the same driver. So this patch renames CONFIG_PCIE_RCAR to CONFIG_PCIE_RCAR_HOST so that PCIE_RCAR can be safely dropped from Kconfig file. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20200826093220.10266-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-01ARM: multi_v7_defconfig: Enable CONFIG_PCIE_RCAR_HOSTLad Prabhakar1-1/+1
config option PCIE_RCAR internally selects PCIE_RCAR_HOST which builds the same driver. So this patch renames CONFIG_PCIE_RCAR to CONFIG_PCIE_RCAR_HOST so that PCIE_RCAR can be safely dropped from Kconfig file. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20200826093220.10266-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-09-01ARM: dts: exynos: Move fixed clocks under root node in Exynos3250Krzysztof Kozlowski1-25/+17
The fixed clocks are kept under dedicated node fixed-rate-clocks, thus a fake "reg" was added. This is not correct with dtschema as fixed-clock binding does not have a "reg" property: arch/arm/boot/dts/exynos3250-artik5-eval.dt.yaml: clock@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20200829172532.29358-2-krzk@kernel.org
2020-09-01arm/boot: Handle all sections explicitlyKees Cook1-10/+10
In preparation for warning on orphan sections, use common macros for debug sections, discards, and text stubs. Add discards for unwanted .note, and .rel sections. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Russell King <linux@armlinux.org.uk> Link: https://lore.kernel.org/r/20200821194310.3089815-21-keescook@chromium.org
2020-09-01arm/build: Assert for unwanted sectionsKees Cook3-0/+15
In preparation for warning on orphan sections, enforce expected-to-be-zero-sized sections (since discarding them might hide problems with them suddenly gaining unexpected entries). Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Russell King <linux@armlinux.org.uk> Link: https://lore.kernel.org/r/20200821194310.3089815-19-keescook@chromium.org
2020-09-01arm/build: Add missing sectionsKees Cook3-1/+5
Add missing text stub sections .vfp11_veneer and .v4_bx, as well as missing DWARF sections, when present in the build. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Cc: Russell King <linux@armlinux.org.uk> Link: https://lore.kernel.org/r/20200821194310.3089815-18-keescook@chromium.org
2020-09-01arm/build: Explicitly keep .ARM.attributes sectionsKees Cook3-2/+6
In preparation for adding --orphan-handling=warn, explicitly keep the .ARM.attributes section (at address 0[1]) by expanding the existing ELF_DETAILS macro into ARM_DETAILS. [1] https://reviews.llvm.org/D85867 Suggested-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Fangrui Song <maskray@google.com> Cc: Russell King <linux@armlinux.org.uk> Link: https://lore.kernel.org/lkml/CAKwvOdk-racgq5pxsoGS6Vtifbtrk5fmkmnoLxrQMaOvV0nPWw@mail.gmail.com/ Link: https://lore.kernel.org/r/20200821194310.3089815-17-keescook@chromium.org
2020-09-01arm/build: Refactor linker script headersKees Cook3-11/+10
In preparation for adding --orphan-handling=warn, refactor the linker script header includes, and extract common macros. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Russell King <linux@armlinux.org.uk> Link: https://lore.kernel.org/r/20200821194310.3089815-16-keescook@chromium.org
2020-09-01vmlinux.lds.h: Split ELF_DETAILS from STABS_DEBUGKees Cook2-0/+2
The .comment section doesn't belong in STABS_DEBUG. Split it out into a new macro named ELF_DETAILS. This will gain other non-debug sections that need to be accounted for when linking with --orphan-handling=warn. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: linux-arch@vger.kernel.org Link: https://lore.kernel.org/r/20200821194310.3089815-5-keescook@chromium.org
2020-08-31ARM: dts: r8a7742-iwg21m: Add SPI NOR supportLad Prabhakar1-0/+51
Add support for the SPI NOR device used to boot up the system to the System on Module DT. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Link: https://lore.kernel.org/r/20200825085435.8744-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-08-31Merge 5.9-rc3 into usb-nextGreg Kroah-Hartman16-40/+28
We want the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-08-31ARM: dts: imx6qdl-gw553x: Remove unneeded #address-cells/#size-cellsFabio Estevam1-2/+0
The following dtc warning is seen when building with W=1: arch/arm/boot/dts/imx6qdl-gw553x.dtsi:65.12-110.4: Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Remove the unneeded #address-cells/#size-cells properties to fix the issue. Fixes: 64bf0a0af18d ("ARM: dts: imx6qdl-gw: add Gateworks System Controller support") Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-31ARM: dts: imx6sll-evk: Add audio sound card nodeShengjiu Wang1-0/+73
Add audio sound card node, which depends on codec node, SSI node, audmux node. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-31ARM: dts: imx6sl-evk: Add headphone detection for sound cardShengjiu Wang1-0/+9
Headphone detection is triggered by GPIO, then driver can switch between speaker and headphone. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-31ARM: dts: imx6sx-sdb: Add headphone detection for sound cardShengjiu Wang1-0/+9
Headphone detection is triggered by GPIO, then driver can switch between speaker and headphone. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-30ARM: dts: rockchip: replace status value "ok" by "okay"Adrian Schmutzler8-8/+8
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Link: https://lore.kernel.org/r/20200830190820.20583-1-freifunk@adrianschmutzler.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-08-30ARM: dts: rockchip: update cpu supplies on rk3066aJohan Jonker3-3/+15
The use of cpu0-supply for cpu0 alone is deprecated, so add cpu-supply to each cpu separately and update all existing rk3066a boards. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200813172451.13754-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-08-30ARM: dts: rockchip: rk3066a: add label to cpu@1Johan Jonker1-1/+1
Add label to cpu@1 for later use. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200813172451.13754-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-08-30ARM: dts: rockchip: update cpu supplies on rk3288Johan Jonker4-4/+52
The use of cpu0-supply for cpu0 alone is deprecated, so add cpu-supply to each cpu separately and update all existing rk3288 boards that use this property. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200813180241.14660-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-08-30Merge tag 'locking-urgent-2020-08-30' of ↵Linus Torvalds1-4/+0
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking fixes from Thomas Gleixner: "A set of fixes for lockdep, tracing and RCU: - Prevent recursion by using raw_cpu_* operations - Fixup the interrupt state in the cpu idle code to be consistent - Push rcu_idle_enter/exit() invocations deeper into the idle path so that the lock operations are inside the RCU watching sections - Move trace_cpu_idle() into generic code so it's called before RCU goes idle. - Handle raw_local_irq* vs. local_irq* operations correctly - Move the tracepoints out from under the lockdep recursion handling which turned out to be fragile and inconsistent" * tag 'locking-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: lockdep,trace: Expose tracepoints lockdep: Only trace IRQ edges mips: Implement arch_irqs_disabled() arm64: Implement arch_irqs_disabled() nds32: Implement arch_irqs_disabled() locking/lockdep: Cleanup x86/entry: Remove unused THUNKs cpuidle: Move trace_cpu_idle() into generic code cpuidle: Make CPUIDLE_FLAG_TLB_FLUSHED generic sched,idle,rcu: Push rcu_idle deeper into the idle path cpuidle: Fixup IRQ state lockdep: Use raw_cpu_*() for per-cpu variables
2020-08-30ARM: dts: ux500-skomer: Add KTD253 backlightLinus Walleij1-9/+6
This enables the KTD253 backlight found on the Samsung GT-S7710 "Skomer". Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200828223034.40983-1-linus.walleij@linaro.org
2020-08-30ARM: dts: imx6q-kontron-samx6i: Remove old fsl,spi-num-chipselectsKrzysztof Kozlowski1-1/+0
The property "fsl,spi-num-chipselects" is gone since commit 790739c4417c ("dt-bindings: spi: Convert imx cspi to json-schema"). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-30ARM: dts: imx: Fix the SPI chipselect polarityFabio Estevam56-81/+82
The conversion of the spi-imx driver to use GPIO descriptors in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors") helped to detect the following SPI chipselect polarity mismatch on an imx6q-sabresd: [ 4.854337] m25p80@0 enforce active low on chipselect handle Prior to the above commit, the chipselect polarity passed via cs-gpios property was ignored and considered active-low. The reason for such mismatch is clearly explained in the comments inside drivers/gpio/gpiolib-of.c: * SPI children have active low chip selects * by default. This can be specified negatively * by just omitting "spi-cs-high" in the * device node, or actively by tagging on * GPIO_ACTIVE_LOW as flag in the device * tree. If the line is simultaneously * tagged as active low in the device tree * and has the "spi-cs-high" set, we get a * conflict and the "spi-cs-high" flag will * take precedence. To properly represent the SPI chipselect polarity, change it to active-low when the "spi-cs-high" property is absent. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-28ARM: s3c: Avoid naming clash of S3C24xx and S3C64xx timer setupKrzysztof Kozlowski38-89/+89
PWM timer initialization has two independent implementations - one for S3C24xx and one for S3C64xx. The naming however was always the same and before also the declaration was shared. This is confusing, error prone and might cause issues when trying to build multiplatform kernel. Suggested-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200820204203.22328-1-krzk@kernel.org
2020-08-28ARM: dts: ux500-golden: Add S6E63M0 DSI displayLinus Walleij1-0/+91
Add the Samsung S6E63M0 video mode DSI display to the Samsung GT-S8190/Golden mobile phone. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20200815102627.3532646-1-linus.walleij@linaro.org
2020-08-28ARM: versatile: Remove Integrator and Realview from PHYS_OFFSETLinus Walleij1-3/+1
Both Integrator and Realview exclusively use ARM_PATCH_PHYS_VIRT these days so drop them from the PHYS_OFFSET Kconfig option. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20200814154529.3487163-1-linus.walleij@linaro.org
2020-08-27ARM: dts: sun8i: r40: Add node for system controllerJernej Skrabec1-0/+23
Allwinner R40 has system controller and SRAM C1 region similar to that in A10. Add nodes for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825173523.1289379-3-jernej.skrabec@siol.net
2020-08-27ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable IRJernej Skrabec1-0/+4
BananaPi M2 Ultra has IR receiver connected to IR0. Enable it. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825171358.1286902-4-jernej.skrabec@siol.net
2020-08-27ARM: dts: sun8i: r40: Add IR nodesJernej Skrabec1-0/+36
Allwinner R40 has two IR cores, add nodes for them. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200825171358.1286902-3-jernej.skrabec@siol.net
2020-08-27power: supply: gpio-charger: Convert to GPIO descriptorsLinus Walleij2-4/+22
This converts the GPIO charger to use exclusively GPIO descriptors, moving the two remaining platforms passing global GPIO numbers over to using a GPIO descriptor table. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-08-27ARM: dts: BCM5301X: Specify pcie2 in the DTChristian Lamparter1-0/+4
The SoC supports three pcie ports. Currently, only pcie0 and pcie1 are enabled. This patch adds the pcie2 port as well. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-08-27ARM: dts: BCM5301X: Specify uart2 in the DTChristian Lamparter1-0/+9
The BCM53016 in the Meraki MR32 utilizes the third "uart2" to connect to a on-board Bluetooth-LE 4.0 BCM20732 chip. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-27 05:10:23 +0300