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2011-12-28Merge branch 'tegra/soc' into next/socArnd Bergmann30-167/+1116
* tegra/soc: arm/tegra: Compile tegra_dt_init_irq only when CONFIG_OF arm/tegra: Make MACH_TEGRA_DT depend on ARCH_TEGRA_2x_SOC arm/tegra: Delete tegra_init_clock() arm/tegra: Fix section mismatch errors in tegra30 pinmux arm/tegra: Fix section mismatch errors in tegra20 pinmux arm/tegra: refresh defconfig for tegra30 arm/tegra: add support for tegra30 based board cardhu arm/tegra: implement support for tegra30 arm/tegra: pinmux tables and definitions for tegra30 arm/tegra: add new fields to struct tegra_pingroup_desc arm/tegra: prepare pinmux code for multiple tegra variants arm/tegra: rename tegra20 pinmux files arm/tegra: generalize L2 cache initialization arm/tegra: use PMC reset arm/tegra: rename board-dt.c to board-dt-tegra20.c arm/tegra: prepare early init for multiple tegra variants arm/tegra: don't export clk_measure_input_freq arm/tegra: prepare clock code for multiple tegra variants arm/tegra: cleanup tegra20 support arm/tegra: clk_get should not be fatal Conflicts: arch/arm/mach-tegra/board-dt-tegra20.c
2011-12-28Merge branches 'depends/rmk/devel-stable' and 'tegra/dt' into next/socArnd Bergmann75-506/+1944
Dependencies for tegra/soc branch Conflicts: arch/arm/mach-tegra/board-dt.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-12-20arm/tegra: Compile tegra_dt_init_irq only when CONFIG_OFStephen Warren1-0/+2
This fixes a build break attempting to build a Tegra20-only kernel without device tree enabled. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-20arm/tegra: Make MACH_TEGRA_DT depend on ARCH_TEGRA_2x_SOCStephen Warren1-0/+1
Now that Tegra20 and Tegra30 device tree board files are separate, MACH_TEGRA_DT (which enables the Tegra20 device tree board file) should depend on Tegra20 support being enabled. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-20arm/tegra: Delete tegra_init_clock()Stephen Warren2-6/+0
tegra_init_clock() is written to call tegra2_init_clocks(), which only exists if Tegra20 support is enabled. This breaks the build of a Tegra30-only kernel. tegra_init_clock() isn't actually used any more; tegra20_init_early() calls tegra2_init_clocks() directly. So, just delete this function. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-20arm/tegra: Fix section mismatch errors in tegra30 pinmuxStephen Warren1-1/+1
tegra30_pinmux_init() is called from the pinmux's probe() function, and hence should be __devinit not __init. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-20arm/tegra: Fix section mismatch errors in tegra20 pinmuxStephen Warren1-1/+1
tegra20_pinmux_init() is called from the pinmux's probe() function, and hence should be __devinit not __init. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-20arm/tegra: refresh defconfig for tegra30Olof Johansson1-5/+4
Update the defconfig for tegra due to the addition of tegra30 and rename of t20/t30 options. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com>
2011-12-20arm/tegra: Seaboard: Add GPIO key device tree nodesStephen Warren1-0/+20
This brings all the GPIO key definitions from board-seaboard.c into tegra-seaboard.dtsi. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-20arm/dt: Add ADT7461 to SeaboardStephen Warren1-0/+5
The ADT7461 is a temperature monitoring IC. One is present on the DVC I2C bus on Seaboard. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-20arm/dt: tegra: Use new compatible value for DVC I2C controllerStephen Warren2-2/+2
Update the device tree to indicate which I2C controller is the DVC controller. AUXDATA needs to be updated too, since the compatible value changed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: add support for tegra30 based board cardhuPeter De Schrijver3-0/+38
Add support for the tegra30 based cardhu development board. Cardhu is a tablet formfactor reference design for tegra30. The patch provides a device tree for the board, updates Makefile.boot to build the dtb, includes the platform in Kconfig and updates board-dt.c. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: implement support for tegra30Peter De Schrijver6-7/+83
Add support for tegra30 SoC. This includes a device tree compatible type for this SoC ("nvidia,tegra30") and adds L2 cache initialization for this new SoC. The clock framework is still missing, which prevents most drivers from working. The basic IRQs are the same, so remove the dependency on CONFIG_ARCH_TEGRA_2x_SOC. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: pinmux tables and definitions for tegra30Peter De Schrijver5-0/+798
Define the pinmuxing and pindrive tables for tegra30. The pinmux table defines the available functions for each pinmux group. The pindrive table defines the default pullup or pulldowns for each group. Derived from code by Scott Williams (scwilliams@nvidia.com) Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: add new fields to struct tegra_pingroup_descPeter De Schrijver2-0/+14
Add new fields to struct tegra_pingroup_desc to support new hardware features introduced in the tegra30 SoC. The pinmux driver won't use those fields yet, but the tegra30 pinmux tables will already provide the necessary data. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: prepare pinmux code for multiple tegra variantsPeter De Schrijver7-63/+86
This patch modifies the pinmux code to be useable for multiple tegra variants. Some tegra20 specific constants will be replaced by variables which will be initialized to the appropriate value at runtime. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: rename tegra20 pinmux filesPeter De Schrijver5-8/+9
Rename pinmux-t2.h and pinmux-t2-tables.c to the new tegra naming. This file will be reworked somewhat in the next patch to support multiple tegra SoC types. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: generalize L2 cache initializationPeter De Schrijver1-5/+10
Generalize L2 cache initialization and discover L2 cache associativity at runtime. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: use PMC resetPeter De Schrijver1-3/+2
Use PMC reset rather then CAR system reset as recommended by the hardware team. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: rename board-dt.c to board-dt-tegra20.cPeter De Schrijver3-3/+3
Tegra20 based boards will be handled by the current board-dt.c file. Tegra30 based boards will be handled by a new board-dt-tegra30.c file. Hence rename the existing board-dt.c to board-dt-tegra20.c to reflect its use. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: prepare early init for multiple tegra variantsPeter De Schrijver7-27/+34
This patch splits the early init code in a common and a tegra20 specific part. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: don't export clk_measure_input_freqPeter De Schrijver3-6/+9
don't export clk_measure_input_freq as its functionality is also available using clk_get_rate(). Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: prepare clock code for multiple tegra variantsPeter De Schrijver4-32/+10
Rework the tegra20 clock code to support multiple tegra variants : * remove tegra2_periph_reset_assert/tegra2_periph_reset_deassert. This functionality should be in clock.c. * remove tegra_sdmmc_tap_delay and export tegra2_sdmmc_tap_delay directly. This feature is handled inside the sdmmc block from tegra30 onwards. So there is no need for support in the clock code beyond tegra20. There are no in tree users of this function. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: cleanup tegra20 supportPeter De Schrijver2-2/+9
* add a dependency to ARCH_TEGRA_2x_SOC in Kconfig to all tegra20 based boards and TEGRA_PCI * make powergating dependent on ARCH_TEGRA_2x_SOC * remove dependency on ARCH_TEGRA_2x_SOC for clock.c Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: clk_get should not be fatalPeter De Schrijver1-4/+8
The timer and rtc-timer clocks aren't gated by default, so there is no reason to crash the system if the dummy enable call failed. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18Merge remote-tracking branch 'rmk/devel-stable' into for-3.3/socOlof Johansson397-3585/+3028
Conflicts: arch/arm/mach-tegra/board-dt.c Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-18arm/tegra: initial device tree for tegra30Peter De Schrijver1-0/+127
This patch adds the initial device tree for tegra30 Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2011-12-16Merge branch 'omap/soc' into next/socOlof Johansson355-3230/+1874
2011-12-13ARM: OMAP: TI814X: Add cpu type macros and detection supportHemant Pedanekar4-0/+33
This patch adds cpu type, macros for identification of TI814X device. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> [tony@atomide.com: left out CK_TI814X for now] Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-13ARM: OMAP: TI81XX: Prepare for addition of TI814X supportHemant Pedanekar16-76/+90
This patch updates existing macros, functions used for TI816X, to enable addition of other SoCs belonging to TI81XX family (e.g., TI814X). The approach taken is to use TI81XX/ti81xx for code/data going to be common across all TI81XX devices. cpu_is_ti81xx() is introduced to handle code common across TI81XX devices. In addition, ti8168_evm_map_io() is now replaced with ti81xx_map_io() and moved in mach-omap2/common.c as same will be used for TI814X and is not board specific. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-13ARM: OMAP: ID: Chip detection for OMAP4470Leonid Iziumtsev2-1/+17
Add support for detection of the next chip in the OMAP4 family: OMAP4470 ES1.0 For more details on OMAP4470, visit: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12869&contentId=123362 Signed-off-by: Leonid Iziumtsev <x0153368@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-13ARM: OMAP: id: add chip id recognition for omap4430 es2.3David Anders2-2/+6
allow for the omap4430 es2.3 revision to be recognized in the omap4_check_revision() function. most aspects of all omap4430 es2.x versions are identical, however a number of small variations such as default pullup or pulldown resistor configurations vary between revisions. detailed information on silicon errata for omap4430 revisions can be found at http://focus.ti.com/pdfs/wtbu/swpz009D.pdf Signed-off-by: David Anders <x0132446@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-13ARM: OMAP: am33xx: Update common OMAP machine specific sourcesAfzal Mohammed11-3/+105
This patch updates the common machine specific source files for support for AM33XX/AM335x with cpu type, macros for identification of AM33XX/AM335X device. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> [tony@atomide.com: updated for map_io and common.h changes, dropped CK_AM33XX] Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-13ARM: OMAP: am33xx: Update common omap platform filesAfzal Mohammed6-4/+35
This patch updates the common platform files with AM335X device support (AM33XX family). The approach taken in this patch is, AM33XX device will be considered as OMAP3 variant, and a separate SoC class created for AM33XX family of devices with a subclass type for AM335X device, which is newly added device in the family. This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x() checks will return success on AM335X device. A kernel config option CONFIG_SOC_OMAPAM33XX is added under OMAP3 to include support for AM33XX build. Also, cpu_mask and RATE_IN_XXX flags have crossed 8 bit hence struct clksel_rate.flags, struct prcm_config.flags and cpu_mask are changed to u16 from u8. Signed-off-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Hemant Pedanekar <hemantp@ti.com> [tony@atomide.com: left out CK_AM33XX for now] Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-12ARM: kexec: use soft_restart for branching to the reboot bufferWill Deacon1-12/+3
Now that there is a common way to reset the machine, let's use it instead of reinventing the wheel in the kexec backend. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-12-12ARM: stop: execute platform callback from cpu_stop codeWill Deacon2-1/+5
Sending IPI_CPU_STOP to a CPU causes it to execute a busy cpu_relax loop forever. This makes it impossible to kexec successfully on an SMP system since the secondary CPUs do not reset. This patch adds a callback to platform_cpu_kill, defined when CONFIG_HOTPLUG_CPU=y, from the ipi_cpu_stop handling code. This function currently just returns 1 on all platforms that define it but allows them to do something more sophisticated in the future. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-12-12ARM: reset: implement soft_restart for jumping to a physical addressWill Deacon1-10/+40
Tools such as kexec and CPU hotplug require a way to reset the processor and branch to some code in physical space. This requires various bits of jiggery pokery with the caches and MMU which, when it goes wrong, tends to lock up the system. This patch fleshes out the soft_restart implementation so that it branches to the reset code using the identity mapping. This requires us to change to a temporary stack, held within the kernel image as a static array, to avoid conflicting with the new view of memory. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-12-12ARM: lib: add call_with_stack function for safely changing stackWill Deacon2-1/+46
When disabling the MMU, it is necessary to take out a 1:1 identity map of the reset code so that it can safely be executed with and without the MMU active. To avoid the situation where the physical address of the reset code aliases with the virtual address of the active stack (which cannot be included in the 1:1 mapping), it is desirable to change to a new stack at a location which is less likely to alias. This code adds a new lib function, call_with_stack: void call_with_stack(void (*fn)(void *), void *arg, void *sp); which changes the stack to point at the sp parameter, before invoking fn(arg) with the new stack selected. Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-12-11ARM: 7183/1: vic: register the VIC for ST-modified VIC'sJamie Iles1-2/+3
When probing the VIC, the ST variant has a different probing method to account for the extra interrupts which meant we didn't previously call vic_register() which registered the irq_domain. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-12-09Merge branch 'iommu/fixes' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu * 'iommu/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: MAINTAINERS: Update amd-iommu F: patterns iommu/amd: Fix typo in kernel-parameters.txt iommu/msm: Fix compile error in mach-msm/devices-iommu.c Fix comparison using wrong pointer variable in dma debug code
2011-12-09Merge branch 'fixes' of ↵Linus Torvalds28-55/+69
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits) ARM: sa1100: fix build error ARM: OMAP1: recalculate loops per jiffy after dpll1 reprogram ARM: davinci: dm365 evm: align nand partition table to u-boot ARM: davinci: da850 evm: change audio edma event queue to EVENTQ_0 ARM: davinci: dm646x evm: wrong register used in setup_vpif_input_channel_mode ARM: davinci: dm646x does not have a DSP domain ARM: davinci: psc: fix incorrect offsets ARM: davinci: psc: fix incorrect mask ARM: mx28: LRADC macro rename arm: mx23: recognise stmp378x as mx23 ARM: mxs: fix machines' initializers order ARM: mxs/tx28: add __initconst for fec pdata ARM: S3C64XX: Staticise s3c6400_sysclass ARM: S3C64XX: Add linux/export.h to dev-spi.c ARM: S3C64XX: Remove extern from definition of framebuffer setup call MAINTAINERS: Extend Samsung patterns to cover SPI and ASoC drivers MAINTAINERS: Add linux-samsung-soc mailing list for Samsung MAINTAINERS: Consolidate Samsung MAINTAINERS ARM: CSR: PM: fix build error due to undeclared 'THIS_MODULE' ARM: CSR: fix build error due to new mdesc->dma_zone_size ...
2011-12-08Merge branch 'for-rmk' of ↵Russell King32-322/+1199
git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable Conflicts: arch/arm/mm/ioremap.c
2011-12-08Merge branch 'fixes' of git://github.com/hzhuang1/linux into fixesArnd Bergmann1-2/+2
2011-12-08ARM: LPAE: Add the Kconfig entriesCatalin Marinas2-1/+18
This patch adds the ARM_LPAE and ARCH_PHYS_ADDR_T_64BIT Kconfig entries allowing LPAE support to be compiled into the kernel. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2011-12-08ARM: LPAE: mark memory banks with start > ULONG_MAX as highmemWill Deacon1-1/+15
Memory banks living outside of the 32-bit physical address space do not have a 1:1 pa <-> va mapping and therefore the __va macro may wrap. This patch ensures that such banks are marked as highmem so that the Kernel doesn't try to split them up when it sees that the wrapped virtual address overlaps the vmalloc space. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org>
2011-12-08ARM: LPAE: Add identity mapping support for the 3-level page table formatCatalin Marinas1-1/+27
With LPAE, the pgd is a separate page table with entries pointing to the pmd. The identity_mapping_add() function needs to ensure that the pgd is populated before populating the pmd level. The do..while blocks now loop over the pmd in order to have the same implementation for the two page table formats. The pmd_addr_end() definition has been removed and the generic one used instead. The pmd clean-up is done in the pgd_free() function. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2011-12-08ARM: LPAE: Add context switching supportCatalin Marinas1-2/+17
With LPAE, TTBRx registers are 64-bit. The ASID is stored in TTBR0 rather than a separate Context ID register. This patch makes the necessary changes to handle context switching on LPAE. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2011-12-08ARM: LPAE: Add fault handling supportCatalin Marinas6-5/+104
The DFSR and IFSR register format is different when LPAE is enabled. In addition, DFSR and IFSR have similar definitions for the fault type. This modifies the fault code to correctly handle the new format. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2011-12-08ARM: LPAE: Invalidate the TLB before freeing the PMDCatalin Marinas1-1/+10
Similar to the PTE freeing, this patch introduced __pmd_free_tlb() which invalidates the TLB before freeing a PMD page. This is needed because on newer processors the entry in the upper page table may be cached by the TLB and point to random data after the PMD has been freed. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2011-12-08ARM: LPAE: MMU setup for the 3-level page table formatCatalin Marinas5-12/+243
This patch adds the MMU initialisation for the LPAE page table format. The swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new proc-v7-3level.S file contains the TTB initialisation, context switch and PTE setting code with the LPAE. The TTBRx split is based on the PAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit mappings (supersections) and a few other memory types in mmu.c are conditionally compiled. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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