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2014-05-20Merge tag 'mvebu-dt-3.16' of git://git.infradead.org/linux-mvebu into next/dtOlof Johansson82-417/+627
Merge "ARM: mvebu: DT changes for v3.16" from Jason Cooper: mvebu DT changes for v3.16 - kirkwood - rework nsa3x0 board to add nsa320 - large cleanup to facilitate use in barebox - guruplug phy updates - audio updates for t5325 - mvebu - use clocks vice clock-frequency for uart nodes - armada 375/380/385 - add watchdog node - add coherency fabric - add smp support - add sdhci - add ahci - add thermal sensor - armada 370/XP - and pmsu * tag 'mvebu-dt-3.16' of git://git.infradead.org/linux-mvebu: (35 commits) ARM: Kirkwood: t5325: Use simple card to instantiate audio ARM: Kirkwood: DT: Add missing #sound-dai-cells property ARM: Kirkwood: Add node for audio codec ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id ARM: dts: kirkwood: set Guruplug ethernet PHY compatible ARM: dts: kirkwood: set default pinctrl for I2C1 on 6282 ARM: dts: kirkwood: set default pinctrl for I2C0 ARM: dts: kirkwood: set default pinctrl for NAND ARM: dts: kirkwood: set default pinctrl for SPI0 ARM: dts: kirkwood: set default pinctrl for UART0/1 ARM: dts: kirkwood: set default pinctrl for GBE1 ARM: dts: kirkwood: consolidate common pinctrl settings ARM: dts: kirkwood: add pinctrl node to common SoC include ARM: dts: kirkwood: rename pin-controller nodes ARM: dts: kirkwood: remove clock-frequency properties from UART nodes ARM: dts: kirkwood: add stdout-path property to all boards ARM: dts: kirkwood: add node labels ARM: mvebu: Enable the thermal sensor in Armada 380/385 SoC ARM: mvebu: Enable the thermal sensor in Armada 375 SoC ARM: mvebu: don't use clocks property in UART node for Netgear RN2120 ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-17Merge tag 'socfpga-dt-updates-for-3.16_v3' of ↵Olof Johansson9-60/+211
git://git.rocketboards.org/linux-socfpga-next into next/dt Merge "dts: socfpga: general updates for the socfpga platform" from Dinh Nguyen: Mostly DTS additions to the SOCFPGA platform from Steffan Trumtrar, and a couple of device tree documentation updates/typo fix. This one does not the GPIO binding patch, as that is pending further discussion. Also, v3 fixes a rebase artifact and compile tested. * tag 'socfpga-dt-updates-for-3.16_v3' of git://git.rocketboards.org/linux-socfpga-next: ARM: socfpga: dts: Add div-reg to the main_pll clocks ARM: socfpga: dts: add reset-controller Documentation: dt: reset: move socfpga-reset Documentation: dt: socfpga: add reset-cells property ARM: socfpga: dts: Add DTS entries for USB ARM: socfpga: dts: Remove hard coded clock-frequency property ARM: socfpga: dts: add eeprom and rtc on i2c0 ARM: socfpga: dts: convert to preprocessor includes ARM: socfpga: dts: add rtc on i2c0 to socrates ARM: socfpga: dts: add support for EBV SOCrates ARM: socfpga: dts: add can0+1 ARM: socfpga: dts: add i2c busses ARM: socfpga: dts: add remaining interrupts for pdma ARM: socfpga: dts: fix pdma interrupt Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-06ARM: socfpga: dts: Add div-reg to the main_pll clocksDinh Nguyen1-3/+3
The mpu_clk, main_clk, and dbg_base_clk outputs from the main PLL go through a pre-divider. Update socfpga.dtsi to represent those dividers for these clocks. Re-use the "div-reg" property that was used for the socfpga-gate-clock as this is the same thing. Also update the documentation. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add reset-controllerSteffen Trumtrar1-1/+6
Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: Add DTS entries for USBDinh Nguyen4-0/+40
Update all the SOCFPGA DTS files with USB entries. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: Remove hard coded clock-frequency propertyDinh Nguyen3-48/+10
The timers and uart can get their clock frequencies using the common clock driver. Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add eeprom and rtc on i2c0Dinh Nguyen2-0/+30
The Altera Cyclone5 and Arria5 devkit has an EEPROM and a RTC on the board. This patch adds support for them. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> --- v2: Remove LCD as the driver has not been upstreamed.
2014-05-06ARM: socfpga: dts: convert to preprocessor includesSteffen Trumtrar8-8/+8
Convert all socfpga DT files to the dtc preprocessor include syntax. This allows to include header files in the devicetrees like other SoC-types already do. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add rtc on i2c0 to socratesSteffen Trumtrar1-0/+9
The SOCrates has an M41T82M RTC on i2c0. Add it. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add support for EBV SOCratesSteffen Trumtrar2-0/+42
The SOCrates is a SOCFpga-Cyclone5 based board from EBV. Add support for it. Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add can0+1Steffen Trumtrar1-0/+16
Add both can controllers to the dtsi. Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add i2c bussesSteffen Trumtrar1-0/+40
Add all 4 i2c busses. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: add remaining interrupts for pdmaSteffen Trumtrar1-1/+8
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06ARM: socfpga: dts: fix pdma interruptSteffen Trumtrar1-1/+1
The first interrupt is not at 180 but 104. Fix it. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-06Merge tag 'renesas-dt2-for-v3.16' of ↵Olof Johansson2-0/+81
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Second Round of Renesas ARM Based SoC DT Updates for v3.16" from Simon Horman: * Add r8a7791 (R-Car M2) based Henninger board * tag 'renesas-dt2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: henninger: enable SATA0 ARM: shmobile: henninger: add Ether DT support ARM: shmobile: henninger: initial device tree Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-06Merge tag 'renesas-dt-for-v3.16' of ↵Olof Johansson10-72/+396
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Updates for v3.16" from Simon Horman: r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs * Add MSIOF nodes and aliases * Correct I2C clock parents r8a7791 (R-Car M2) SoC * Add EHCI MSTP clock r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards * Add MSIOF nodes * Add gpio-keys support for SW2 * Enable I2C * Enable Quad SPI transfers for the SPI FLASH * Rename and lable spi to qspi, add spi0 alias * Set ethernet PHY LED mode r8a7779 (R-Car H1) and r8a7778 (R-Car M2) SoCs * Improve and correct HSPI nodes r8a7778 (R-Car M2) based Bock-W board * Add SPI FLASH r8a7740 (R-Mobile A1) SoC * Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings r8a7740 (R-Mobile A1) based Armadillo800 EVA board * Enable RTC * Use KEY_* macros for gpio-keys EMEV2 (Emma Mobile EV2) based kzm9g board * Use KEY_* macros for gpio-keys * tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits) ARM: shmobile: armadillo-reference dts: Seiko Instruments, Inc is "sii" ARM: shmobile: lager dts: Enable Quad SPI transfers for the SPI FLASH ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI FLASH ARM: shmobile: r8a7790: add IIC(B) cores to dtsi ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi ARM: shmobile: r8a7790: add IIC0-2 clock macros ARM: shmobile: r8a7791: Fix the I2C clocks parents in DT ARM: shmobile: r8a7790: Fix the I2C clocks parents in DT ARM: shmobile: lager: Correct setting of ethernet PHY LED mode ARM: shmobile: armadillo-reference dts: enable RTC ARM: shmobile: r8a7791: Add EHCI MSTP clock ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings ARM: shmobile: koelsch: activate i2c6 bus ARM: shmobile: koelsch: make i2c2-pfc node unique ARM: shmobile: r8a7791: add IIC(B) cores to dtsi ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi ARM: shmobile: r8a7791: add IIC0/1 clock macros ARM: shmobile: kzm9g-reference dts: Use KEY_* macros for gpio-keys ARM: shmobile: armadillo-reference dts: Use KEY_* macros for gpio-keys ARM: shmobile: koelsch: Set ethernet PHY LED mode ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-06Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dtOlof Johansson6-18/+405
Merge "at91: DT for 3.16 #1" from Nicolas Ferre: 3.16: first DT series: - more support for at91sam9rl and its associated EK board - some improvements to at91sam9g45 (ADC, TS, PWM leds) - addition of some missing pieces for describing audio of SAMA5D3-EK in DT * tag 'at91-dt' of git://github.com/at91linux/linux-at91: ARM: at91: sama5d3: clock for ssc from rk pin ARM: at91: sama5d3: add the missing property ARM: at91: sama5d3: correct the sound compatible string ARM: at91: sama5d3: disable sound by default ARM: at91: sama5d3: add DMA property for SSC devices ARM: at91/dt: at91sam9m10g45ek PWM leds polarity is inversed ARM: at91/dt: at91sam9m10g45ek: add ADC and touchscreen support ARM: at91/dt: sam9g45: improve ADC/touchscreen support ARM: at91/dt: add peripherals to the at91sam9rlek board ARM: at91/dt: sam9rl: add lcd, adc, usb gadget and pwm support Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-05ARM: Kirkwood: t5325: Use simple card to instantiate audioAndrew Lunn1-0/+25
Add device tree nodes to instantiate the audio drivers on the HP T5325 device. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-8-git-send-email-andrew@lunn.ch Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: Kirkwood: DT: Add missing #sound-dai-cells propertyAndrew Lunn1-0/+1
The sound node is missing a #sound-dai-cells property. Add it, so that the sounds node can be used in combination with the simple-audio-card binding. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-5-git-send-email-andrew@lunn.ch Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: Kirkwood: Add node for audio codecAndrew Lunn1-0/+3
Instantiate the audio codec via a DT node. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-4-git-send-email-andrew@lunn.ch Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-idSebastian Hesselbarth1-0/+2
Ethernet PHYs found on Globalscale Guruplug are connected by RGMII-ID. Set the corresponding phy-connection-type property accordingly. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-16-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: set Guruplug ethernet PHY compatibleSebastian Hesselbarth1-2/+6
Ethernet PHY compatible shall be "ethernet-phy-ieee802.3-c22" and "ethernet-phy-idAAAA.BBBB" if PHY OUI id is known. We know it for the PHY found on Guruplug, so set it accordingly. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-15-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: set default pinctrl for I2C1 on 6282Sebastian Hesselbarth3-4/+6
Currently, the only 6282-based Kirkwood boards that use I2C1 are Openblocks A6/A7. Both use the same default I2C1 pinctrl setting from kirkwood-6282.dtsi. Move the pinctrl setting to the I2C1 node directly and put a note in front of the corresponding pinctrl node to overwrite the setting on board level. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-14-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: set default pinctrl for I2C0Sebastian Hesselbarth6-11/+3
There is only one valid pinctrl setting for I2C0 on Kirkwood. Now that we have the setting in the common SoC pinctrl, move it to the I2C0 controller node directly and remove it from the individual boards. While at it, also fix up status = "okay" to "ok" on one board's I2C0 node. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-13-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: set default pinctrl for NANDSebastian Hesselbarth11-20/+3
There is only one valid pinctrl setting for NAND on Kirkwood. Now that we have the setting in the common SoC pinctrl, move it to the NAND controller node directly and remove it from the individual boards. While at it, also fix up status = "okay" to "ok" on one board's NAND node. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-12-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: set default pinctrl for SPI0Sebastian Hesselbarth10-22/+6
Most Kirkwood boards use the default SPI0 pinctrl setting anyway. Add a default pinctrl setting to the toplevel SoC SPI0 node and put a note in front of the corresponding pinctrl node to overwrite the setting on board level. Currently, only T5325 is using a different setting and already overwrites the corresponding pinctrl node. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-11-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: set default pinctrl for UART0/1Sebastian Hesselbarth17-50/+18
Most boards use the default UART0/1 pinctrl setting without RTS/CTS. Add the pinctrl setting to the toplevel SoC UART nodes and put a note in front of the corresponding pinctrl node to overwrite the setting on board level. Currently, both boards using a different UART pinctrl setting (Openblocks A6, A7) already overwrite the pinctrl node. While at it, also fix up some status = "ok" to "okay" and again whitespace issues on mplcec4 uart nodes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-10-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: set default pinctrl for GBE1Sebastian Hesselbarth2-2/+2
On Kirkwood, there is only one valid pinctrl setting for GBE1. With a common SoC pinctrl node, we can now set it in the node instead of in each board file. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-9-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: consolidate common pinctrl settingsSebastian Hesselbarth6-96/+33
All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0, and GBE1. Move it to the common pinctrl node that we now have. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-8-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: add pinctrl node to common SoC includeSebastian Hesselbarth5-4/+5
All Kirkwood SoCs have their pinctrl registers at the same address. Instead of replaying the same reg property on each SoC, have the reg property set in the common SoC file already. This also allows us to move common pinctrl settings to this node later on. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-7-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: rename pin-controller nodesSebastian Hesselbarth38-38/+38
To prepare pin-controller consolidation, first rename all pinctrl nodes to a more appropriate name regarding ePAPR recommended names. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-6-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: remove clock-frequency properties from UART nodesSebastian Hesselbarth5-6/+0
UART devices found on Kirkwood SoCs derive their baudrate from TCLK. With proper clocks property in the SoCs serial node, boards do not need to overwrite it anymore. Remove the remaining clock-frequency property from all Kirkwood boards. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-5-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: add stdout-path property to all boardsSebastian Hesselbarth47-3/+50
ePAPR allows to reference the device used for console output by stdout-path property. With node labels for Kirkwood UART0, now reference it on all Kirkwood boards that already have ttyS0 in their bootargs property. While at it, fix some whitespace issues on mplcec4's chosen node (there are more, but we only fix the chosen node now) Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-4-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05ARM: dts: kirkwood: add node labelsSebastian Hesselbarth4-26/+26
This adds missing node labels to Kirkwood common and SoC specific nodes to allow to reference them more easily. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-3-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-02Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2-7/+10
Pull KVM fixes from Paolo Bonzini: - Fix for a Haswell regression in nested virtualization, introduced during the merge window. - A fix from Oleg to async page faults. - A bunch of small ARM changes. - A trivial patch to use the new MSI-X API introduced during the merge window. * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: ARM: vgic: Fix the overlap check action about setting the GICD & GICC base address. KVM: arm/arm64: vgic: fix GICD_ICFGR register accesses KVM: async_pf: mm->mm_users can not pin apf->mm KVM: ARM: vgic: Fix sgi dispatch problem MAINTAINERS: co-maintainance of KVM/{arm,arm64} arm: KVM: fix possible misalignment of PGDs and bounce page KVM: x86: Check for host supported fields in shadow vmcs kvm: Use pci_enable_msix_exact() instead of pci_enable_msix() ARM: KVM: disable KVM in Kconfig on big-endian systems
2014-04-29Merge tag 'dt-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds4-14/+14
Pull devicetree bug fixes from Grant Likely: "These are some important bug fixes that need to get into v3.15. This branch contains a pair of important bug fixes for the DT code: - Fix some incorrect binding property names before they enter common usage - Fix bug where some platform devices will be unable to get their interrupt number when they depend on an interrupt controller that is not available at device creation time. This is a problem causing mainline to fail on a number of ARM platforms" * tag 'dt-for-linus' of git://git.secretlab.ca/git/linux: of/irq: do irq resolution in platform_get_irq of: selftest: add deferred probe interrupt test dt: Fix binding typos in clock-names and interrupt-names
2014-04-28ARM: mvebu: Enable the thermal sensor in Armada 380/385 SoCEzequiel Garcia1-0/+6
This commit enables the thermal sensor found in Armada 380/385 SoCs. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1398371004-15807-11-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-28arm: KVM: fix possible misalignment of PGDs and bounce pageMark Salter1-6/+9
The kvm/mmu code shared by arm and arm64 uses kalloc() to allocate a bounce page (if hypervisor init code crosses page boundary) and hypervisor PGDs. The problem is that kalloc() does not guarantee the proper alignment. In the case of the bounce page, the page sized buffer allocated may also cross a page boundary negating the purpose and leading to a hang during kvm initialization. Likewise the PGDs allocated may not meet the minimum alignment requirements of the underlying MMU. This patch uses __get_free_page() to guarantee the worst case alignment needs of the bounce page and PGDs on both arm and arm64. Cc: <stable@vger.kernel.org> # 3.10+ Signed-off-by: Mark Salter <msalter@redhat.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-04-28ARM: shmobile: henninger: enable SATA0Sergei Shtylyov1-0/+4
Enable SATA0 device for the Henninger board. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-28Merge branch 'safe-dirty-tlb-flush'Linus Torvalds1-1/+11
This merges the patch to fix possible loss of dirty bit on munmap() or madvice(DONTNEED). If there are concurrent writers on other CPU's that have the unmapped/unneeded page in their TLBs, their writes to the page could possibly get lost if a third CPU raced with the TLB flush and did a page_mkclean() before the page was fully written. Admittedly, if you unmap() or madvice(DONTNEED) an area _while_ another thread is still busy writing to it, you deserve all the lost writes you could get. But we kernel people hold ourselves to higher quality standards than "crazy people deserve to lose", because, well, we've seen people do all kinds of crazy things. So let's get it right, just because we can, and we don't have to worry about it. * safe-dirty-tlb-flush: mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing parts
2014-04-27Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds5-15/+56
Pull arm fixes from Russell King: "A number of fixes for the PJ4/iwmmxt changes which arm-soc forced me to take during the merge window. This stuff should have been better tested and sorted out *before* the merge window" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8042/1: iwmmxt: allow to build iWMMXt on Marvell PJ4B ARM: 8041/1: pj4: fix cpu_is_pj4 check ARM: 8040/1: pj4: properly detect existence of iWMMXt coprocessor ARM: 8039/1: pj4: enable iWMMXt only if CONFIG_IWMMXT is set ARM: 8038/1: iwmmxt: explicitly check for supported architectures
2014-04-27Merge tag 'staging-3.15-rc3' of ↵Linus Torvalds2-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging / IIO driver fixes from Greg KH: "Here are some small staging and IIO driver fixes for 3.15-rc3. Nothing major at all, just some assorted issues that people have reported" * tag 'staging-3.15-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: staging: comedi: usbdux: bug fix for accessing 'ao_chanlist' in private data iio: adc: mxs-lradc: fix warning when buidling on avr32 iio: cm36651: Fix i2c client leak and possible NULL pointer dereference iio: querying buffer scan_mask should return 0/1 staging:iio:ad2s1200 fix a missing break iio: adc: at91_adc: correct default shtim value ARM: at91: at91sam9260: change at91_adc name ARM: at91: at91sam9g45: change at91_adc name iio: cm32181: Fix read integration time function iio: adc: at91_adc: Repair broken platform_data support
2014-04-26ARM: KVM: disable KVM in Kconfig on big-endian systemsWill Deacon1-1/+1
KVM currently crashes and burns on big-endian hosts, so don't allow it to be selected until we've got that fixed. Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2014-04-26ARM: mvebu: Enable the thermal sensor in Armada 375 SoCEzequiel Garcia1-0/+6
This commit enables the thermal sensor found in Armada 375 SoCs. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1398371004-15807-10-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-26ARM: mvebu: don't use clocks property in UART node for Netgear RN2120Thomas Petazzoni1-1/+0
The Netgear RN2120 was not using the same strategy as the other Armada 370/375/38x/XP boards: it was using a 'clocks' property and not the 'clock-frequency' property in its UART controller Device Tree node. However, now that this clock reference is present at the SoC-level, there is no point in duplicating it at the board-level. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-6-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-26ARM: mvebu: remove clock-frequency of serial port Device Tree nodesThomas Petazzoni13-24/+0
Now that the Armada 370/375/38x/XP SoC-level Device Tree files have the proper "clocks" property in their UART controllers node, it is no longer useful to have the clock-frequency property defined in the board-level Device Tree files. Therefore, this commit gets rid of all the useless 'clock-frequency' properties. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-26ARM: mvebu: use clocks property for serial portsThomas Petazzoni4-0/+8
Back when the Armada 370 and Armada XP initial support was introduced, the only way to pass the clock frequency to the of_serial driver was through a clock-frequency Device Tree property. Thanks to 0bbeb3c3e84bc963d1c66661e082d207023b0e5c ('of serial port driver - add clk_get_rate() support'), it is possible to use the standard 'clocks' DT property to reference the clock used for a particular UART controller. This clock is then used by the of_serial driver to retrieve the clock rate. This commit modifies the SoC-level Device Tree files of Armada 370, Armada XP, Armada 375 and Armada 38x to use this possibility. Since there is no gatable clock for the UART controllers, we simply reference the TCLK, which is the main SoC clock for the peripherals. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397806908-7550-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-26ARM: mvebu: add Device Tree description of AHCI interfaces on Armada 38xThomas Petazzoni2-0/+24
The Marvell Armada 38x processors contain two AHCI compatible interfaces. This commit adds the Device Tree description of those interfaces at the SoC level, and also enables them on the Armada 385 DB platform, which allows access to both interfaces through SATA ports. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397574006-5868-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-04-26mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing partsLinus Torvalds1-1/+11
The mmu-gather operation 'tlb_flush_mmu()' has done two things: the actual tlb flush operation, and the batched freeing of the pages that the TLB entries pointed at. This splits the operation into separate phases, so that the forced batched flushing done by zap_pte_range() can now do the actual TLB flush while still holding the page table lock, but delay the batched freeing of all the pages to after the lock has been dropped. This in turn allows us to avoid a race condition between set_page_dirty() (as called by zap_pte_range() when it finds a dirty shared memory pte) and page_mkclean(): because we now flush all the dirty page data from the TLB's while holding the pte lock, page_mkclean() will be held up walking the (recently cleaned) page tables until after the TLB entries have been flushed from all CPU's. Reported-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Dave Hansen <dave.hansen@intel.com> Acked-by: Hugh Dickins <hughd@google.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-04-26ARM: mvebu: enable the SDHCI interface on Armada 385Thomas Petazzoni2-0/+17
In commit "mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller", the sdhci-pxav3 driver has been extended to also be usable on Armada 38x platforms. Therefore, this commit adds the necessary Device Tree informations to declare this SDHCI interface in the Armada 38x SoC, and also in the Armada 385 Development Board. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1397486478-16991-2-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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