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2025-07-25scsi: arm64: dts: mediatek: mt8195: Add UFSHCI nodeRice Lee1-0/+25
Add a UFS host controller interface (UFSHCI) node to mt8195.dtsi. Introduce the 'mediatek,ufs-disable-mcq' property to allow disabling Multiple Circular Queue (MCQ) support. Signed-off-by: Rice Lee <ot_riceyj.lee@mediatek.com> Signed-off-by: Eric Lin <ht.lin@mediatek.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Link: https://lore.kernel.org/r/20250722085721.2062657-4-macpaul.lin@mediatek.com Reviewed-by: Peter Wang <peter.wang@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-07-25arm64: add batched versions of ptep_modify_prot_start/commitDev Jain2-5/+33
Override the generic definition of modify_prot_start_ptes() to use get_and_clear_full_ptes(). This helper does a TLBI only for the starting and ending contpte block of the range, whereas the current implementation will call ptep_get_and_clear() for every contpte block, thus doing a TLBI on every contpte block. Therefore, we have a performance win. The arm64 definition of pte_accessible() allows us to batch in the errata specific case: #define pte_accessible(mm, pte) \ (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte)) All ptes are obviously present in the folio batch, and they are also valid. Override the generic definition of modify_prot_commit_ptes() to simply use set_ptes() to map the new ptes into the pagetable. Link: https://lkml.kernel.org/r/20250718090244.21092-8-dev.jain@arm.com Signed-off-by: Dev Jain <dev.jain@arm.com> Reviewed-by: Ryan Roberts <ryan.roberts@arm.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Barry Song <baohua@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Christophe Leroy <christophe.leroy@csgroup.eu> Cc: David Hildenbrand <david@redhat.com> Cc: Hugh Dickins <hughd@google.com> Cc: Jann Horn <jannh@google.com> Cc: Joey Gouly <joey.gouly@arm.com> Cc: Kevin Brodsky <kevin.brodsky@arm.com> Cc: Lance Yang <ioworker0@gmail.com> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Cc: Matthew Wilcox (Oracle) <willy@infradead.org> Cc: Peter Xu <peterx@redhat.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Will Deacon <will@kernel.org> Cc: Yang Shi <yang@os.amperecomputing.com> Cc: Yicong Yang <yangyicong@hisilicon.com> Cc: Zhenhua Huang <quic_zhenhuah@quicinc.com> Cc: Zi Yan <ziy@nvidia.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-07-25mm: remove arch_flush_tlb_batched_pending() arch helperRyan Roberts1-11/+0
Since commit 4b634918384c ("arm64/mm: Close theoretical race where stale TLB entry remains valid"), all arches that use tlbbatch for reclaim (arm64, riscv, x86) implement arch_flush_tlb_batched_pending() with a flush_tlb_mm(). So let's simplify by removing the unnecessary abstraction and doing the flush_tlb_mm() directly in flush_tlb_batched_pending(). This effectively reverts commit db6c1f6f236d ("mm/tlbbatch: introduce arch_flush_tlb_batched_pending()"). Link: https://lkml.kernel.org/r/20250609103132.447370-1-ryan.roberts@arm.com Signed-off-by: Ryan Roberts <ryan.roberts@arm.com> Suggested-by: Will Deacon <will@kernel.org> Reviewed-by: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Acked-by: David Hildenbrand <david@redhat.com> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Acked-by: Will Deacon <will@kernel.org> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexandre Ghiti <alex@ghiti.fr> Cc: Borislav Betkov <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Rik van Riel <riel@surriel.com> Cc: Ryan Roberts <ryan.roberts@arm.com> Cc: Thomas Gleinxer <tglx@linutronix.de> Cc: Vlastimil Babka <vbabka@suse.cz> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2025-07-25arm64: Handle KCOV __init vs inline mismatchesKees Cook1-1/+1
GCC appears to have kind of fragile inlining heuristics, in the sense that it can change whether or not it inlines something based on optimizations. It looks like the kcov instrumentation being added (or in this case, removed) from a function changes the optimization results, and some functions marked "inline" are _not_ inlined. In that case, we end up with __init code calling a function not marked __init, and we get the build warnings I'm trying to eliminate in the coming patch that adds __no_sanitize_coverage to __init functions: WARNING: modpost: vmlinux: section mismatch in reference: acpi_get_enable_method+0x1c (section: .text.unlikely) -> acpi_psci_present (section: .init.text) This problem is somewhat fragile (though using either __always_inline or __init will deterministically solve it), but we've tripped over this before with GCC and the solution has usually been to just use __always_inline and move on. For arm64 this requires forcing one ACPI function to be inlined with __always_inline. Link: https://lore.kernel.org/r/20250724055029.3623499-1-kees@kernel.org Signed-off-by: Kees Cook <kees@kernel.org>
2025-07-24Merge tag 'arm64-fixes' of ↵Linus Torvalds2-0/+11
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "Two important arm64 fixes ahead of the 6.16 release. The first fixes a regression introduced during the merge window where the KVM UUID (which is used to advertise KVM-specific hypercalls for things like time synchronisation in the guest) was corrupted thanks to an endianness bug introduced when converting the code to use the UUID_INIT() helper. The second fixes a stack-pointer corruption issue during context-switch which has been observed in the wild when taking a pseudo-NMI with shadow call stack enabled. Summary: - Fix broken UUID value for the KVM/arm64 hypervisor SMCCC interface - Fix stack corruption on context-switch, primarily seen on (but not limited to) configurations with both pNMI and SCS enabled" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/entry: Mask DAIF in cpu_switch_to(), call_on_irq_stack() arm64: kvm, smccc: Fix vendor uuid
2025-07-24Merge branch 'for-next/feat_mte_store_only' into for-next/coreCatalin Marinas9-4/+35
* for-next/feat_mte_store_only: : MTE feature to restrict tag checking to store only operations kselftest/arm64/mte: Add MTE_STORE_ONLY testcases kselftest/arm64/mte: Preparation for mte store only test kselftest/arm64/abi: Add MTE_STORE_ONLY feature hwcap test KVM: arm64: Expose MTE_STORE_ONLY feature to guest arm64/hwcaps: Add MTE_STORE_ONLY hwcaps arm64/kernel: Support store-only mte tag check prctl: Introduce PR_MTE_STORE_ONLY arm64/cpufeature: Add MTE_STORE_ONLY feature
2025-07-24Merge branches 'for-next/livepatch', 'for-next/user-contig-bbml2', ↵Catalin Marinas46-634/+831
'for-next/misc', 'for-next/acpi', 'for-next/debug-entry', 'for-next/feat_mte_tagged_far', 'for-next/kselftest', 'for-next/mdscr-cleanup' and 'for-next/vmap-stack', remote-tracking branch 'arm64/for-next/perf' into for-next/core * arm64/for-next/perf: (23 commits) drivers/perf: hisi: Support PMUs with no interrupt drivers/perf: hisi: Relax the event number check of v2 PMUs drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver drivers/perf: hisi: Use ACPI driver_data to retrieve SLLC PMU information drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver drivers/perf: hisi: Simplify the probe process for each DDRC version perf/arm-ni: Support sharing IRQs within an NI instance perf/arm-ni: Consolidate CPU affinity handling perf/cxlpmu: Fix typos in cxl_pmu.c comments and documentation perf/cxlpmu: Remove unintended newline from IRQ name format string perf/cxlpmu: Fix devm_kcalloc() argument order in cxl_pmu_probe() perf: arm_spe: Relax period restriction perf: arm_pmuv3: Add support for the Branch Record Buffer Extension (BRBE) KVM: arm64: nvhe: Disable branch generation in nVHE guests arm64: Handle BRBE booting requirements arm64/sysreg: Add BRBE registers and fields perf/arm: Add missing .suppress_bind_attrs perf/arm-cmn: Reduce stack usage during discovery perf: imx9_perf: make the read-only array mask static const perf/arm-cmn: Broaden module description for wider interconnect support ... * for-next/livepatch: : Support for HAVE_LIVEPATCH on arm64 arm64: Kconfig: Keep selects somewhat alphabetically ordered arm64: Implement HAVE_LIVEPATCH arm64: stacktrace: Implement arch_stack_walk_reliable() arm64: stacktrace: Check kretprobe_find_ret_addr() return value arm64/module: Use text-poke API for late relocations. * for-next/user-contig-bbml2: : Optimise the TLBI when folding/unfolding contigous PTEs on hardware with BBML2 and no TLB conflict aborts arm64/mm: Elide tlbi in contpte_convert() under BBML2 iommu/arm: Add BBM Level 2 smmu feature arm64: Add BBM Level 2 cpu feature arm64: cpufeature: Introduce MATCH_ALL_EARLY_CPUS capability type * for-next/misc: : Miscellaneous arm64 patches arm64/gcs: task_gcs_el0_enable() should use passed task arm64: signal: Remove ISB when resetting POR_EL0 arm64/mm: Drop redundant addr increment in set_huge_pte_at() arm64: Mark kernel as tainted on SAE and SError panic arm64/gcs: Don't call gcs_free() when releasing task_struct arm64: fix unnecessary rebuilding when CONFIG_DEBUG_EFI=y arm64/mm: Optimize loop to reduce redundant operations of contpte_ptep_get arm64: pi: use 'targets' instead of extra-y in Makefile * for-next/acpi: : Various ACPI arm64 changes ACPI: Suppress misleading SPCR console message when SPCR table is absent ACPI: Return -ENODEV from acpi_parse_spcr() when SPCR support is disabled * for-next/debug-entry: : Simplify the debug exception entry path arm64: debug: remove debug exception registration infrastructure arm64: debug: split bkpt32 exception entry arm64: debug: split brk64 exception entry arm64: debug: split hardware watchpoint exception entry arm64: debug: split single stepping exception entry arm64: debug: refactor reinstall_suspended_bps() arm64: debug: split hardware breakpoint exception entry arm64: entry: Add entry and exit functions for debug exceptions arm64: debug: remove break/step handler registration infrastructure arm64: debug: call step handlers statically arm64: debug: call software breakpoint handlers statically arm64: refactor aarch32_break_handler() arm64: debug: clean up single_step_handler logic * for-next/feat_mte_tagged_far: : Support for reporting the non-address bits during a synchronous MTE tag check fault kselftest/arm64/mte: Add mtefar tests on check_mmap_options kselftest/arm64/mte: Refactor check_mmap_option test kselftest/arm64/mte: Add verification for address tag in signal handler kselftest/arm64/mte: Add address tag related macro and function kselftest/arm64/mte: Check MTE_FAR feature is supported kselftest/arm64/mte: Register mte signal handler with SA_EXPOSE_TAGBITS kselftest/arm64: Add MTE_FAR hwcap test KVM: arm64: Expose FEAT_MTE_TAGGED_FAR feature to guest arm64: Report address tag when FEAT_MTE_TAGGED_FAR is supported arm64/cpufeature: Add FEAT_MTE_TAGGED_FAR feature * for-next/kselftest: : Kselftest updates for arm64 kselftest/arm64: Handle attempts to disable SM on SME only systems kselftest/arm64: Fix SVE write data generation for SME only systems kselftest/arm64: Test SME on SME only systems in fp-ptrace kselftest/arm64: Test FPSIMD format data writes via NT_ARM_SVE in fp-ptrace kselftest/arm64: Allow sve-ptrace to run on SME only systems kselftest/arm4: Provide local defines for AT_HWCAP3 kselftest/arm64: Specify SVE data when testing VL set in sve-ptrace kselftest/arm64: Fix test for streaming FPSIMD write in sve-ptrace kselftest/arm64: Fix check for setting new VLs in sve-ptrace kselftest/arm64: Convert tpidr2 test to use kselftest.h * for-next/mdscr-cleanup: : Drop redundant DBG_MDSCR_* macros KVM: selftests: Change MDSCR_EL1 register holding variables as uint64_t arm64/debug: Drop redundant DBG_MDSCR_* macros * for-next/vmap-stack: : Force VMAP_STACK on arm64 arm64: remove CONFIG_VMAP_STACK checks from entry code arm64: remove CONFIG_VMAP_STACK checks from SDEI stack handling arm64: remove CONFIG_VMAP_STACK checks from stacktrace overflow logic arm64: remove CONFIG_VMAP_STACK conditionals from traps overflow stack arm64: remove CONFIG_VMAP_STACK conditionals from irq stack setup arm64: Remove CONFIG_VMAP_STACK conditionals from THREAD_SHIFT and THREAD_ALIGN arm64: efi: Remove CONFIG_VMAP_STACK check arm64: Mandate VMAP_STACK arm64: efi: Fix KASAN false positive for EFI runtime stack arm64/ptrace: Fix stack-out-of-bounds read in regs_get_kernel_stack_nth() arm64/gcs: Don't call gcs_free() during flush_gcs() arm64: Restrict pagetable teardown to avoid false warning docs: arm64: Fix ICC_SRE_EL2 register typo in booting.rst
2025-07-24arm64: kvm: trace_handle_exit: use string choices helperKuninori Morimoto1-1/+1
We can use string choices helper, let's use it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87o6ti5ksx.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-24arm64: kvm: sys_regs: use string choices helperKuninori Morimoto2-2/+2
We can use string choices helper, let's use it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87pldy5ktb.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-24KVM: arm64: Follow specification when implementing WXNMarc Zyngier1-14/+14
The R_QXXPC and R_NPBXC rules have some interesting (and pretty sharp) corners when defining the behaviour of of WXN at S1: - when S1 overlay is enabled, WXN applies to the overlay and will remove W - when S1 overlay is disabled, WXN applies to the base permissions and will remove X. Today, we lumb the two together in a way that doesn't really match the rules, making things awkward to follow what is happening, in particular when overlays are enabled. Split these two rules over two distinct paths, which makes things a lot easier to read and validate against the architecture rules. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250701151648.754785-3-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-24KVM: arm64: Remove the wi->{e0,}poe vs wr->{p,u}ov confusionMarc Zyngier1-22/+30
Some of the POE computation is a bit confused. Specifically, there is an element of confusion between what wi->{e0,}poe an wr->{p,u}ov actually represent. - wi->{e0,}poe is an *input* to the walk, and indicates whether POE is enabled at EL0 or EL{1,2} - wr->{p,u}ov is a *result* of the walk, and indicates whether overlays are enabled. Crutially, it is possible to have POE enabled, and yet overlays disabled, while the converse isn't true What this all means is that once the base permissions have been established, checking for wi->{e0,}poe makes little sense, because the truth about overlays resides in wr->{p,u}ov. So constructs checking for (wi->poe && wr->pov) only add perplexity. Refactor compute_s1_overlay_permissions() and the way it is called according to the above principles. Take the opportunity to avoid reading registers that are not strictly required. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250701151648.754785-2-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-24KVM: arm64: vgic-its: Return -ENXIO to invalid KVM_DEV_ARM_VGIC_GRP_CTRL attrsDavid Woodhouse1-0/+3
A preliminary version of a hack to invoke unmap_all_vpes() from an ioctl didn't work very well. We eventually determined this was because we were invoking it on the wrong file descriptor, but not getting an error. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Eric Auger <eric.auger@redhat.com> Link: https://lore.kernel.org/r/bbbddd56135399baf699bc46ffb6e7f08d9f8c9f.camel@infradead.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-23Merge tag 'arm-sophgo-dt-for-v6.17' of https://github.com/sophgo/linux into ↵Arnd Bergmann7-0/+215
soc/newsoc ARM Devicetrees for v6.17 Sophgo: Add support for Duo Module 01 Evaluation Board. This board uses SG2000(old codename CV181xH), which is dual-arch, RISC-V and ARM64. This patch add the support for ARM64. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> * tag 'arm-sophgo-dt-for-v6.17' of https://github.com/sophgo/linux: arm64: defconfig: Enable rudimentary Sophgo SG2000 support arm64: Add SOPHGO SOC family Kconfig support arm64: dts: sophgo: Add Duo Module 01 Evaluation Board arm64: dts: sophgo: Add Duo Module 01 arm64: dts: sophgo: Add initial SG2000 SoC device tree Link: https://lore.kernel.org/r/MAUPR01MB11072C4B088AAC02268044E95FE5FA@MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-23tracing: arm: arm64: Hide trace events ipi_raise, ipi_entry and ipi_exitSteven Rostedt1-0/+1
The ipi tracepoints are mostly generic, but the tracepoints ipi_raise, ipi_entry and ipi_exit are only used by arm and arm64. This means these trace events are wasting memory in all the other architectures that do not use them. Add CONFIG_HAVE_EXTRA_IPI_TRACEPOINTS and have arm and arm64 select it to enable these trace events. The config makes it easy if other architectures decide to trace these as well. Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Cc: Will Deacon <will@kernel.org> Cc: Russell King <linux@armlinux.org.uk> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Valentin Schneider <vschneid@redhat.com> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Peter Zijlstra <peterz@infradead.org> Link: https://lore.kernel.org/20250722103714.64eba013@gandalf.local.home Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
2025-07-23arm64/gcs: task_gcs_el0_enable() should use passed taskJeremy Linton2-4/+4
Mark Rutland noticed that the task parameter is ignored and 'current' is being used instead. Since this is usually what its passed, it hasn't yet been causing problems but likely will as the code gets more testing. But, once this is fixed, it creates a new bug in copy_thread_gcs() since the gcs_el_mode isn't yet set for the task before its being checked. Move gcs_alloc_thread_stack() after the new task's gcs_el0_mode initialization to avoid this. Fixes: fc84bc5378a8 ("arm64/gcs: Context switch GCS state for EL0") Signed-off-by: Jeremy Linton <jeremy.linton@arm.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20250719043740.4548-2-jeremy.linton@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2025-07-23arm64: defconfig: Enable rudimentary Sophgo SG2000 supportAlexander Sverdlin1-0/+4
Enable ARCH_SOPHGO, pinctrl (built-in, required to boot), ADC as module. This defconfig is able to boot from SD card on Milk-V Duo Module 01 evalboard. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250612132844.767216-7-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23arm64: Add SOPHGO SOC family Kconfig supportAlexander Sverdlin1-0/+6
First user will be Aarch64 core within SG2000 SoC. Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250612132844.767216-6-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23arm64: dts: sophgo: Add Duo Module 01 Evaluation BoardAlexander Sverdlin3-0/+79
Duo Module 01 Evaluation Board contains Sophgo Duo Module 01 SMD SoM, Ethernet+USB switch, microSD slot, etc... Add only support for UART0 (console) and microSD slot. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Link: https://lore.kernel.org/r/20250612132844.767216-5-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23arm64: dts: sophgo: Add Duo Module 01Alexander Sverdlin1-0/+40
The Duo Module 01 is a compact module with integrated SG2000, WI-FI6/BTDM5.4, and eMMC. Add only support for UART and SDHCI. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Link: https://lore.kernel.org/r/20250612132844.767216-4-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23arm64: dts: sophgo: Add initial SG2000 SoC device treeAlexander Sverdlin1-0/+86
Add initial device tree for the SG2000 SoC by SOPHGO (from ARM64 PoV). Reviewed-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://lore.kernel.org/r/20250612132844.767216-3-alexander.sverdlin@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
2025-07-23tracing: Remove redundant config HAVE_FTRACE_MCOUNT_RECORDSteven Rostedt1-1/+0
Ftrace is tightly coupled with architecture specific code because it requires the use of trampolines written in assembly. This means that when a new feature or optimization is made, it must be done for all architectures. To simplify the approach, CONFIG_HAVE_FTRACE_* configs are added to denote which architecture has the new enhancement so that other architectures can still function until they too have been updated. The CONFIG_HAVE_FTRACE_MCOUNT was added to help simplify the DYNAMIC_FTRACE work, but now every architecture that implements DYNAMIC_FTRACE also has HAVE_FTRACE_MCOUNT set too, making it redundant with the HAVE_DYNAMIC_FTRACE. Remove the HAVE_FTRACE_MCOUNT config and use DYNAMIC_FTRACE directly where applicable. Link: https://lore.kernel.org/all/20250703154916.48e3ada7@gandalf.local.home/ Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lore.kernel.org/20250704104838.27a18690@gandalf.local.home Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
2025-07-23arm64/bug: Add ARCH_WARN_ASM macro for BUG/WARN asm code sharing with RustFUJITA Tomonori1-4/+29
Add new ARCH_WARN_ASM macro for BUG/WARN assembly code sharing with Rust to avoid the duplication. No functional changes. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com> Link: https://lore.kernel.org/r/20250502094537.231725-4-fujita.tomonori@gmail.com Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2025-07-23Merge tag 'apple-soc-dt-6.17' of ↵Arnd Bergmann8-9/+208
https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/dt Apple SoC device tree changes for v6.17 - Added the bindings and nodes for Apple SoC GPU. The driver itself isn't ready for upstreaming yet due to rust dependencies but we're confident that the bindings are stable at this point. - Added a missing node for the touchbar framebuffer to Apple T2 device trees, which is the BMC for some x86 Macs - Fixed a W=1 warning by adding bit offsets to NVMEM node names. This required a change to the generic NVMEM cell binding which will be part of 6.17 through the NVMEM tree. Signed-off-by: Sven Peter <sven@kernel.org> * tag 'apple-soc-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux: arm64: dts: apple: Add Apple SoC GPU dt-bindings: gpu: Add Apple SoC GPU arm64: dts: apple: t8012-j132: Include touchbar framebuffer node arm64: dts: apple: Add bit offset to PMIC NVMEM node names Link: https://lore.kernel.org/r/20250722163258.62424-2-sven@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-23Merge tag 'v6.17-rockchip-dts64-2' of ↵Arnd Bergmann35-108/+1381
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New board: FriendlyElec NanoPi M5 Camera support for the PinePhone Pro. A bunch of cleanups to make DTC happier, fix ordering of DMA uart channels on rk3528 and some video output enablement as well as some button definitions. An interesting tidbit is the reset behaviour addition in that some boards have specific requirements as to how the PMIC needs to do the restart. DT-maintainers did not consider the header with helper-constants as part of the binding, so that header ended up in the Rockchip directory * tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits) arm64: dts: rockchip: Add maskrom button to NanoPi R5S + R5C arm64: dts: rockchip: Drop regulator-compatible property on rk3399 arm64: dts: rockchip: Drop unneeded address+size-cells on px30 arm64: dts: rockchip: Fix LCD panel port on rk3566-pinetab2 arm64: dts: rockchip: Move mipi_out node on rk3399 haikou demo dtso arm64: dts: rockchip: Simplify mipi_out endpoint on rk3399 RP64 dtso arm64: dts: rockchip: Simplify edp endpoints on several rk3399 boards arm64: dts: rockchip: Simplify VOP port definition on rk3328 arm64: dts: rockchip: Move dsi address+size-cells from SoC to rk3399 boards arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boards arm64: dts: rockchip: Fix UART DMA support for RK3528 arm64: dts: rockchip: Add reset button to NanoPi R5S arm64: dts: rockchip: Add rtc0 alias for NanoPi R5S + R5C arm64: dts: rockchip: describe the OV8858 user camera on PinePhone Pro arm64: dts: rockchip: describe I2c Bus 1 and IMX258 world camera on PinePhone Pro arm64: dts: rockchip: Fix pinctrl node names for RK3528 arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar ... Link: https://lore.kernel.org/r/11552292.NyiUUSuA9g@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'v6.17-rockchip-defconfig64-1' of ↵Arnd Bergmann1-0/+3
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/defconfig Enable Rockchip DFI + PM_DEVFREQ_EVENT and RGA modules. * tag 'v6.17-rockchip-defconfig64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: defconfig: enable further Rockchip platform drivers Link: https://lore.kernel.org/r/9025082.MhkbZ0Pkbq@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'qcom-arm64-defconfig-for-6.17' of ↵Arnd Bergmann1-0/+3
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig Qualcomm Arm64 defconfig updates for v6.17 Enable camera and video clock controllers for SM8450, SM8550, and SM8650 platforms. * tag 'qcom-arm64-defconfig-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: Enable camcc and videocc on Qualcomm SM8450+ Link: https://lore.kernel.org/r/20250720031134.286063-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22arm64: dts: rockchip: Drop netdev led-triggers on NanoPi R5SDiederik de Haas1-3/+0
Sometimes the netdev triggers causes tasks to get blocked for more then 120 seconds, which in turn makes the (WAN) network port on the NanoPi R5S fail to come up. This results in the following (partial) trace: INFO: task kworker/0:1:11 blocked for more than 120 seconds. Not tainted 6.16-rc6+unreleased-arm64-cknow #1 Debian 6.16~rc6-1~exp1 "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. task:kworker/0:1 state:D stack:0 pid:11 tgid:11 ppid:2 task_flags:0x4208060 flags:0x00000010 Workqueue: events_power_efficient reg_check_chans_work [cfg80211] Call trace: __switch_to+0xf8/0x168 (T) __schedule+0x3f8/0xda8 schedule+0x3c/0x120 schedule_preempt_disabled+0x2c/0x58 __mutex_lock.constprop.0+0x4d0/0xab8 __mutex_lock_slowpath+0x1c/0x30 mutex_lock+0x50/0x68 rtnl_lock+0x20/0x38 reg_check_chans_work+0x40/0x478 [cfg80211] process_one_work+0x178/0x3e0 worker_thread+0x260/0x390 kthread+0x150/0x250 ret_from_fork+0x10/0x20 INFO: task kworker/0:1:11 is blocked on a mutex likely owned by task dhcpcd:615. task:dhcpcd state:D stack:0 pid:615 tgid:615 ppid:614 task_flags:0x400140 flags:0x00000018 Call trace: __switch_to+0xf8/0x168 (T) __schedule+0x3f8/0xda8 schedule+0x3c/0x120 schedule_preempt_disabled+0x2c/0x58 rwsem_down_write_slowpath+0x1e4/0x750 down_write+0x98/0xb0 led_trigger_register+0x134/0x1c0 phy_led_triggers_register+0xf4/0x258 [libphy] phy_attach_direct+0x30c/0x390 [libphy] phylink_fwnode_phy_connect+0xb0/0x138 [phylink] __stmmac_open+0xec/0x520 [stmmac] stmmac_open+0x4c/0xe8 [stmmac] __dev_open+0x130/0x2e0 __dev_change_flags+0x1c4/0x248 netif_change_flags+0x2c/0x80 dev_change_flags+0x88/0xc8 devinet_ioctl+0x35c/0x610 inet_ioctl+0x204/0x260 sock_do_ioctl+0x6c/0x140 sock_ioctl+0x2e4/0x388 __arm64_sys_ioctl+0xb4/0x120 invoke_syscall+0x6c/0x100 el0_svc_common.constprop.0+0x48/0xf0 do_el0_svc+0x24/0x38 el0_svc+0x3c/0x188 el0t_64_sync_handler+0x10c/0x140 el0t_64_sync+0x198/0x1a0 In order to not introduce a regression with kernel 6.16, drop the netdev triggers for now while the problem is being investigated further. Fixes: 1631cbdb8089 ("arm64: dts: rockchip: Improve LED config for NanoPi R5S") Helped-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250722123628.25660-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge branch 'newsoc/axiado' into soc/newsocArnd Bergmann6-0/+609
Support for the AX3000 SoC, from Harshit Shah <hshah@axiado.com>: The AX3000 is a multi-core system-on-chip featuring four ARM Cortex-A53 cores, secure vault, hardware firewall, and AI acceleration engines. This initial support enables basic bring-up of the SoC and evaluation platform with CPU, timer, UART, and I3C functionality. The series begins by adding the "axiado" vendor prefix and compatible strings for the SoC and board. It then introduces the device tree files and minimal ARCH_AXIADO platform support in arm64. * newsoc/axiado: MAINTAINERS: Add entry for Axiado arm64: defconfig: enable the Axiado family arm64: dts: axiado: Add initial support for AX3000 SoC and eval board arm64: add Axiado SoC family dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller dt-bindings: serial: cdns: add Axiado AX3000 UART controller dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant dt-bindings: gpio: cdns: convert to YAML dt-bindings: arm: axiado: add AX3000 EVK compatible strings dt-bindings: vendor-prefixes: Add Axiado Corporation
2025-07-22arm64: defconfig: enable the Axiado familyHarshit Shah1-0/+1
Enable the Axiado SoC family in the arm64 defconfig. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Harshit Shah <hshah@axiado.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22arm64: dts: axiado: Add initial support for AX3000 SoC and eval boardHarshit Shah4-0/+602
Add initial device tree support for the AX3000 SoC and its evaluation platform. The AX3000 is a multi-core SoC featuring 4 Cortex-A53 cores, Secure Vault, AI Engine and Firewall. It adds support for Cortex-A53 CPUs, timer, UARTs, and I3C controllers on the AX3000 evaluation board. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Harshit Shah <hshah@axiado.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22arm64: add Axiado SoC familyHarshit Shah1-0/+6
Add ARCH_AXIADO for the support of the Axiado SoC for arm64 architecture. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Harshit Shah <hshah@axiado.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'imx-defconfig-6.17' of ↵Arnd Bergmann1-0/+1
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/defconfig i.MX defconfig changes for 6.17: - Enable S32G RTC driver as module in arm64 defconfig - Enable drivers used by imx28-amarula-rmm board in mxs_defconfig - Enable INPUT_PWM_BEEPER, USB_HSIC_USB3503 and BT_HCIUART_BCM in imx_v6_v7_defconfig * tag 'imx-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx_v6_v7_defconfig: select CONFIG_USB_HSIC_USB3503 ARM: imx_v6_v7_defconfig: select CONFIG_INPUT_PWM_BEEPER ARM: imx_v6_v7_defconfig: cleanup with savedefconfig ARM: mxs_defconfig: select new drivers used by imx28-amarula-rmm ARM: mxs_defconfig: Cleanup mxs_defconfig arm64: defconfig: add S32G RTC module support ARM: imx_v6_v7_defconfig: Select BT_HCIUART_BCM Link: https://lore.kernel.org/r/20250713055441.221235-5-shawnguo2@yeah.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'tegra-for-6.17-arm64-defconfig' of ↵Arnd Bergmann1-0/+4
https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/defconfig arm64: tegra: Default configuration updates for v6.17-rc1 Enable the HSP and BPMP via the configuration instead of selecting them, which can lead to problems. Also enable support for Tegra241, which was never done after support for it was added, and Tegra264. * tag 'tegra-for-6.17-arm64-defconfig' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: defconfig: Enable Tegra241 and Tegra264 arm64: defconfig: Enable Tegra HSP and BPMP Link: https://lore.kernel.org/r/20250711220943.2389322-8-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'amlogic-arm64-dt-for-v6.17' of ↵Arnd Bergmann9-2/+370
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt Amlogic ARM64 DT for v6.17: - Align wifi node name with bindings - Add pinctrl nodes for Amlogic S7/S7D/S6 nodes - Enable the NPU nodes on Alta & VIM3 - New boards: - Ugoos AM3 * tag 'amlogic-arm64-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: amlogic: Enable the npu node for Alta and VIM3 dts: arm64: amlogic: add S6 pinctrl node dts: arm64: amlogic: add S7D pinctrl node dts: arm64: amlogic: add S7 pinctrl node arm64: dts: amlogic: Add Ugoos AM3 dt-bindings: arm: amlogic: Add Ugoos AM3 arm64: dts: amlogic: Align wifi node name with bindings Link: https://lore.kernel.org/r/3d93b621-9544-4a68-85db-6f87a9e8fa5c@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'qcom-arm64-for-6.17' of ↵Arnd Bergmann43-165/+5495
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm64 DeviceTree updates for v6.17 79b896e7da7e arm64: dts: qcom: msm8976-longcheer-l9360: Add initial device tree 6516961352a1 arm64: dts: qcom: Add support for X1-based Asus Zenbook A14 The DB410c D3 camera mezzanine is converted to an overlay. On MSM8976 SDC2 pinctrl definitions are introduced and BLSP DMA controller is marked to be managed by another entity. Add camera subsystem on the QCM2290 platform. Add and enable remoteproc and related devices on QCS615. Add and enable Video encoder/decoder on QCS8300 and SA8775P. Also on SA8775P add CPU OPP tables for scaling DDR/L3 bandwidth based on CPU frequency, add L3 interconnect definitions, DSI and video encoder/decoder support. Enable the SLPI remoteproc on SDM850-based Lenovo Yoga C630. On SM6350, add the video clock controller, APR and some audio related services. Describe the camera subsystem on SM8550 and add Iris video encoder/decoder node for SM8650. On SM8750 introduce UFS and Soundwire support, enable these and describe the sound hardware on MTP and QRD. Add camera clock controller on SC8180X. On X Elite, for the Dell XPS13, add WiFi and Bluetooth pwrseq and enable the fingerprint sensor. For HP Omnibook X14 USB1 SS1 SBU mux and do some misc cleanup. Replace the thermal zones inherited from X Elite with X Plus-specific ones. Add missing interrupts and clean up unrelated clocks for PCIe controllers across a variety of platforms. * tag 'qcom-arm64-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (67 commits) arm64: dts: qcom: sm8150: Drop unrelated clocks from PCIe hosts arm64: dts: qcom: sc8180x: Drop unrelated clocks from PCIe hosts arm64: dts: qcom: x1-asus-zenbook: support sound arm64: dts: qcom: x1-asus-zenbook: fixup GPU nodes arm64: dts: qcom: sm6115: add debug UART pins arm64: dts: qcom: sm8650: add iris DT node arm64: dts: qcom: msm8976-longcheer-l9360: Add initial device tree arm64: dts: qcom: msm8976: Add sdc2 GPIOs dt-bindings: arm: qcom: Add MSM8976 BQ Aquaris X5 Plus arm64: dts: qcom: msm8976: Make blsp_dma controlled-remotely arm64: dts: qcom: sa8775p: Correct the interrupt for remoteproc arm64: dts: qcom: sm8550: Add support for camss arm64: dts: qcom: qcs615: disable the CTI device of the camera block arm64: dts: qcom: qcs615-ride: enable remoteprocs arm64: dts: qcom: qcs615: add ADSP and CDSP nodes arm64: dts: qcom: qcs615: Add IMEM and PIL info region arm64: dts: qcom: qcs615: Add mproc node for SEMP2P arm64: dts: qcom: Add support for X1-based Asus Zenbook A14 arm64: dts: qcom: sc7180: Expand IMEM region arm64: dts: qcom: sdm845: Expand IMEM region ... Link: https://lore.kernel.org/r/20250716031059.76348-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'sunxi-dt-for-6.17' of ↵Arnd Bergmann8-73/+588
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner device tree changes for 6.17 This branch includes a change shared with the clk tree for adding the missing PPU0 reset on the A523. The PM domain DT binding immutable branch is also included, which brings in v6.16-rc2, as well as PM domain bindings for other platforms. Other changes include: - RGB666 LCD pin definitions for the V3s PE pins and V3 PD pins - node order fixes for the A523 dtsi - UART1 pin definitions for A523 - Allwinner board DT binding cleanup - EMAC support on A100/A133 - Enabled on the Liontron H-A133L board - SID efuse, power controllers and GPU added for A523 - A523 GPU enabled on all existing boards New boards: - Xunlong OrangePi 4A with the Allwinner T527 SoC. * tag 'sunxi-dt-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits) arm64: dts: allwinner: a523: enable Mali GPU for all boards arm64: dts: allwinner: a523: add Mali GPU node arm64: dts: allwinner: a523: Add power controller device nodes dt-bindings: power: Add A523 PPU and PCK600 power controllers arm64: dts: allwinner: A523: Add SID controller node arm64: dts: allwinner: a133-liontron-h-a133l: Add Ethernet support arm64: dts: allwinner: a100: Add EMAC support arm64: dts: allwinner: a100: Add pin definitions for RGMII/RMII dt-bindings: arm: sunxi: Combine board variants into enums dt-bindings: power: qcom,rpmpd: document the Milos RPMh Power Domains arm64: dts: allwinner: t527: Add OrangePi 4A board arm64: dts: allwinner: a523: Add UART1 pins arm64: dts: allwinner: a523: Move rgmii0 pins to correct location arm64: dts: allwinner: a523: Move mmc nodes to correct position dt-bindings: arm: sunxi: Add Xunlong OrangePi 4A board ARM: dts: sun8i: v3: Add RGB666 LCD PD pins definition ARM: dts: sun8i: v3s: Add RGB666 LCD PE pins definition dt-bindings: reset: sun55i-a523-r-ccu: Add missing PPU0 reset dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen dt-bindings: rockchip: pmu: Add compatible for RK3528 ... Link: https://lore.kernel.org/r/aHaQFe3Lr8Qzyb1M@wens.tw Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'ti-k3-dt-for-v6.17' of ↵Arnd Bergmann31-65/+1069
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.17 Generic fixes and cleanups: * Enable overlays for all DTB files * Enable Schmitt Trigger by default in K3 pinctrl SoC specific changes: AM62D * Add new SoC support and pinctrl entries AM62 * Remove eMMC High Speed DDR support * Move eMMC pinmux to top level board file J784S4/J742S2 * Add Power on BIST (PBSIT) nodes * Add ACSPCIE1 node J721S2 * Add McASP support J722S * Add alernate audio-refclk0 node Board changes: Multiple boards * Bootphase tags for Ethernet boot support AM62D2-EVM * Add new board support AM62A7-SK * Fix pinmux for main_uart1 * Add SPI NAND support AM62P * Fix PWM_3_DSI GPIO direction, SD pull up, I2C ups on AM62P-Verdin * Add bootph-all property for Ethernet boot AM62-Verdin * Enable pull-ups on I2C buses AM654-base-board * Add boot phase tags for various bootmodes AM64 * Add boot phase tag PCIe EP boot * Fix PRU-ICSSG Ethernet ports on AM642-PhyBoard-Electra AM69-SK * Add idle-states for remaining SERDES instances J722S-EVM * Fix USB gpio-hog level for Type-C * tag 'ti-k3-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (33 commits) arm64: dts: ti: k3-am69-sk: Add idle-states for remaining SERDES instances arm64: dts: ti: k3-am62a7-sk: add boot phase tags arm64: dts: ti: k3-am654-base-board: add boot phase tags arm64: dts: ti: k3-am65: add boot phase tags arm64: dts: ti: k3-am69-sk: Add bootph-all property to enable Ethernet boot arm64: dts: ti: k3-j722s-evm: Add bootph-all property to enable Ethernet boot arm64: dts: ti: k3-am62p5-sk: Add bootph-all property to enable Ethernet boot arm64: dts: ti: k3-am68-sk-base-board: Add bootph-all property to enable Ethernet boot arm64: dts: ti: Add support for AM62D2-EVM arm64: dts: ti: Add pinctrl entries for AM62D2 family of SoCs dt-bindings: arm: ti: Add AM62D2 SoC and Boards arm64: dts: ti: Add bootph property to nodes at source for am62a arm64: dts: ti: k3-am62p-verdin: Adjust temperature trip points arm64: dts: ti: k3-am62p-j722s: Enable freq throttling on thermal alert arm64: dts: ti: k3-j784s4-j742s2-main-common: Add PBIST_14 node dt-bindings: soc: ti: bist: Add BIST for K3 devices arm64: dts: ti: k3-am62-main: Remove eMMC High Speed DDR support arm64: dts: ti: k3-am62*: Move eMMC pinmux to top level board file arm64: dts: ti: k3-am62a7-sk: fix pinmux for main_uart1 arm64: dts: ti: Enable overlays for all DTB files ... Link: https://lore.kernel.org/r/a0401460-8c67-4c29-a6cf-fa4bdf33bc7d@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'imx-dt64-6.17' of ↵Arnd Bergmann79-201/+5489
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX arm64 device tree changes for 6.17: - New board support: GOcontroll Moduline based devices, phyCORE-i.MX 95 Plus FPSC SoM and base boards, i.MX93 phycore overlays - A few i.MX8M changes from Adam Ford to add DMA configuration for UART2, set up VPU clocks for nominal and overdrive mode, improve HS400 USDHC clock speed - Several sets of changes from Alexander Stein to add EASRC support for tqma8mnql and tqma8mpql board, add missing DMA entries for I2C & LPUART on ls1043a and ls1046a, enable SFP interface for tqmls1043a and tqmls1046a, etc. - A series from Clark Wang to improve Ethernet support for i.MX93, removing eee-broken-1000t for eqos node, reducing the driving strength of net RXC/TXC, etc. - A few i.MX95 and i.MX8Q changes from Frank Li to add missing devices for EVK board and enable camera support - A couple of changes from Laurentiu Mihalcea to support WM8962 audio codec for imx8qxp-mek and imx8qm-mek board - A number of changes from Shengjiu Wang to improve various audio support for imx943-evk and imx8mp-evk - A series from Tim Harvey to increase HS400 USDHC clock speed for Gateworks i.MX8M Venice devices - Many other random improvements and cleanups on various boards * tag 'imx-dt64-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (85 commits) arm64: dts: imx8q: add camera ov5640 support for imx8qm-mek and imx8qxp-mek arm64: dts: freescale: imx8mp-toradex-smarc: remove gpio hog arm64: dts: freescale: imx8mp-toradex-smarc: fix lvds dsi mux gpio arm64: dts: imx8mm-venice-gw7904: Increase HS400 USDHC clock speed arm64: dts: imx8mm-venice-gw7903: Increase HS400 USDHC clock speed arm64: dts: imx8mn-venice-gw7902: Increase HS400 USDHC clock speed arm64: dts: imx8mm-venice-gw7902: Increase HS400 USDHC clock speed arm64: dts: imx8mm-venice-gw7901: Increase HS400 USDHC clock speed arm64: dts: imx8mp-venice-gw702x: Increase HS400 USDHC clock speed arm64: dts: imx8mm-venice-gw700x: Increase HS400 USDHC clock speed arm64: dts: lx2160a-qds: add the two on-board RGMII PHYs arm64: dts: add imx95-libra-rdk-fpsc board arm64: dts: imx8q: add linux,cma node for imx8qm-mek and imx8qxp-mek arm64: dts: imx8: add capture controller for i.MX8's img subsystem arm64: dts: imx95: add jpeg encode and decode nodes arm64: dts: imx93-phyboard-nash: Add PEB-WLBT-07 overlay arm64: dts: imx93-phyboard-segin: Add PEB-WLBT-05 overlay arm64: dts: imx93-phyboard-segin: Add PEB-EVAL-01 overlay arm64: dts: imx93-phycore-som: Add RPMsg overlay arm64: dts: freescale: tqmls10xx: Add vdd-supply for spi-nor flash ... Link: https://lore.kernel.org/r/20250713055441.221235-4-shawnguo2@yeah.net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'socfpga_dts_updates_for_v6.17' of ↵Arnd Bergmann3-7/+5
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt SoCFPGA DTS updates for v6.17 - Fix dt_binding_check warnings - agilex - f2s-free-clk - stratix10 - rstmgr - swvp - remove phy-addr, cpu1-start-addr and altr,modrst-offset * tag 'socfpga_dts_updates_for_v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: altera: socfpga_stratix10: update internal oscillators arm64: dts: socfpga: swvp: remove phy-addr in the GMAC node arm64: dts: socfpga: swvp: remove cpu1-start-addr arm64: dts: socfpga: swvp: remove altr,modrst-offset arm64: dts: socfpga: stratix10: fix dtbs_check for rstmgr arm64: dts: socfpga: agilex: fix dtbs_check warning for f2s-free-clk Link: https://lore.kernel.org/r/20250712123248.16981-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'tegra-for-6.17-arm64-dt' of ↵Arnd Bergmann8-0/+486
https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt arm64: tegra: Changes for v6.17-rc1 Add support for the Tegra264 SoC and the corresponding engineering reference hardware (P3971-0089+P3834-0008). * tag 'tegra-for-6.17-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Add p3971-0089+p3834-0008 support arm64: tegra: Add memory controller on Tegra264 arm64: tegra: Add Tegra264 support Link: https://lore.kernel.org/r/20250711220943.2389322-7-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22Merge tag 'ti-k3-config-for-v6.17' of ↵Arnd Bergmann1-4/+0
https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/arm TI K3 defconfig updates for v6.17 Cleanup select clauses for ARCH_K3 allow more modular builds * tag 'ti-k3-config-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arm64: Kconfig.platforms: remove useless select for ARCH_K3 Link: https://lore.kernel.org/r/5488ccd5-c999-4b72-bfc0-ba94bb9a360d@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22arm64/entry: Mask DAIF in cpu_switch_to(), call_on_irq_stack()Ada Couprie Diaz2-0/+11
`cpu_switch_to()` and `call_on_irq_stack()` manipulate SP to change to different stacks along with the Shadow Call Stack if it is enabled. Those two stack changes cannot be done atomically and both functions can be interrupted by SErrors or Debug Exceptions which, though unlikely, is very much broken : if interrupted, we can end up with mismatched stacks and Shadow Call Stack leading to clobbered stacks. In `cpu_switch_to()`, it can happen when SP_EL0 points to the new task, but x18 stills points to the old task's SCS. When the interrupt handler tries to save the task's SCS pointer, it will save the old task SCS pointer (x18) into the new task struct (pointed to by SP_EL0), clobbering it. In `call_on_irq_stack()`, it can happen when switching from the task stack to the IRQ stack and when switching back. In both cases, we can be interrupted when the SCS pointer points to the IRQ SCS, but SP points to the task stack. The nested interrupt handler pushes its return addresses on the IRQ SCS. It then detects that SP points to the task stack, calls `call_on_irq_stack()` and clobbers the task SCS pointer with the IRQ SCS pointer, which it will also use ! This leads to tasks returning to addresses on the wrong SCS, or even on the IRQ SCS, triggering kernel panics via CONFIG_VMAP_STACK or FPAC if enabled. This is possible on a default config, but unlikely. However, when enabling CONFIG_ARM64_PSEUDO_NMI, DAIF is unmasked and instead the GIC is responsible for filtering what interrupts the CPU should receive based on priority. Given the goal of emulating NMIs, pseudo-NMIs can be received by the CPU even in `cpu_switch_to()` and `call_on_irq_stack()`, possibly *very* frequently depending on the system configuration and workload, leading to unpredictable kernel panics. Completely mask DAIF in `cpu_switch_to()` and restore it when returning. Do the same in `call_on_irq_stack()`, but restore and mask around the branch. Mask DAIF even if CONFIG_SHADOW_CALL_STACK is not enabled for consistency of behaviour between all configurations. Introduce and use an assembly macro for saving and masking DAIF, as the existing one saves but only masks IF. Cc: <stable@vger.kernel.org> Signed-off-by: Ada Couprie Diaz <ada.coupriediaz@arm.com> Reported-by: Cristian Prundeanu <cpru@amazon.com> Fixes: 59b37fe52f49 ("arm64: Stash shadow stack pointer in the task struct on interrupt") Tested-by: Cristian Prundeanu <cpru@amazon.com> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20250718142814.133329-1-ada.coupriediaz@arm.com Signed-off-by: Will Deacon <will@kernel.org>
2025-07-22arm64: Kconfig: Keep selects somewhat alphabetically orderedCatalin Marinas1-2/+2
Recent patches selecting HAVE_RELIABLE_STACKTRACE and HAVE_LIVEPATCH added them to the end of the ARM64 Kconfig select list. Move them around to keep this list nearly alphabetically ordered. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2025-07-22arm64: signal: Remove ISB when resetting POR_EL0Kevin Brodsky1-2/+5
POR_EL0 is set to its most permissive value before setting up the signal frame, to ensure that uaccess succeeds regardless of the signal stack's pkey. We are now tolerant to spurious POE faults. This means that we do not strictly need to issue an ISB after updating POR_EL0, even when followed by uaccess. The question is whether a fault is likely to happen or not if the ISB is omitted; in this case the answer seems to be no. If the regular stack is used, then it should already be accessible. If the alternate signal stack is used, then a special (inaccessible) pkey may be used - the assumption is that this situation is very uncommon. Remove the ISB to speed up the regular path - this should not have any functional impact regardless of the scenario. Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com> Link: https://lore.kernel.org/r/20250619160042.2499290-3-kevin.brodsky@arm.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2025-07-22stackleak: Split KSTACK_ERASE_CFLAGS from GCC_PLUGINS_CFLAGSKees Cook1-1/+2
In preparation for Clang stack depth tracking for KSTACK_ERASE, split the stackleak-specific cflags out of GCC_PLUGINS_CFLAGS into KSTACK_ERASE_CFLAGS. Link: https://lore.kernel.org/r/20250717232519.2984886-3-kees@kernel.org Signed-off-by: Kees Cook <kees@kernel.org>
2025-07-22stackleak: Rename STACKLEAK to KSTACK_ERASEKees Cook4-4/+4
In preparation for adding Clang sanitizer coverage stack depth tracking that can support stack depth callbacks: - Add the new top-level CONFIG_KSTACK_ERASE option which will be implemented either with the stackleak GCC plugin, or with the Clang stack depth callback support. - Rename CONFIG_GCC_PLUGIN_STACKLEAK as needed to CONFIG_KSTACK_ERASE, but keep it for anything specific to the GCC plugin itself. - Rename all exposed "STACKLEAK" names and files to "KSTACK_ERASE" (named for what it does rather than what it protects against), but leave as many of the internals alone as possible to avoid even more churn. While here, also split "prev_lowest_stack" into CONFIG_KSTACK_ERASE_METRICS, since that's the only place it is referenced from. Suggested-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20250717232519.2984886-1-kees@kernel.org Signed-off-by: Kees Cook <kees@kernel.org>
2025-07-21KVM: arm64: Make RAS registers UNDEF when RAS isn't advertisedMarc Zyngier1-8/+25
We currently always expose FEAT_RAS when available on the host. As we are about to make this feature selectable from userspace, check for it being present before emulating register accesses as RAZ/WI, and inject an UNDEF otherwise. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20250721101955.535159-4-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-21KVM: arm64: Filter out HCR_EL2 bits when running in hypervisor contextMarc Zyngier1-2/+12
Most HCR_EL2 bits are not supposed to affect EL2 at all, but only the guest. However, we gladly merge these bits with the host's HCR_EL2 configuration, irrespective of entering L1 or L2. This leads to some funky behaviour, such as L1 trying to inject a virtual SError for L2, and getting a taste of its own medecine. Not quite what the architecture anticipated. In the end, the only bits that matter are those we have defined as invariants, either because we've made them RESx (E2H, HCD...), or that we actively refuse to merge because the mess with KVM's own logic. Use the sanitisation infrastructure to get the RES1 bits, and let things rip in a safer way. Fixes: 04ab519bb86df ("KVM: arm64: nv: Configure HCR_EL2 for FEAT_NV2") Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250721101955.535159-3-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-21KVM: arm64: Check for SYSREGS_ON_CPU before accessing the CPU stateMarc Zyngier2-2/+8
Mark Brown reports that since we commit to making exceptions visible without the vcpu being loaded, the external abort selftest fails. Upon investigation, it turns out that the code that makes registers affected by an exception visible to the guest is completely broken on VHE, as we don't check whether the system registers are loaded on the CPU at this point. We managed to get away with this so far, but that's obviously as bad as it gets, Add the required checksm and document the absolute need to check for the SYSREGS_ON_CPU flag before calling into any of the __vcpu_write_sys_reg_to_cpu()__vcpu_read_sys_reg_from_cpu() helpers. Reported-by: Mark Brown <broonie@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/18535df8-e647-4643-af9a-bb780af03a70@sirena.org.uk Link: https://lore.kernel.org/r/20250720102229.179114-1-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2025-07-21Merge tag 'samsung-defconfig-6.17' of ↵Arnd Bergmann1-7/+7
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/defconfig Samsung SoC defconfig changes for v6.17 1. Multiple SoCs (including Samsung, Apple): switch sound to module from a built-in, because it is not necessary for booting. Also drop redundant sound codec options. 2. Enable PMIC drivers for Google GS101 Pixel 6 phones: MAX77759 and Samsung PMIC over ACPM protocol. * tag 'samsung-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: defconfig: enable Samsung PMIC over ACPM arm64: defconfig: enable Maxim max77759 driver arm64: defconfig: Drop unneeded unselectable sound drivers arm64: defconfig: Switch SOUND to module Link: https://lore.kernel.org/r/20250709191523.171359-4-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-17 15:13:24 +0300