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path: root/arch/arm64/include/asm/mmu_context.h
AgeCommit message (Expand)AuthorFilesLines
2017-12-06arm64: SW PAN: Update saved ttbr0 value on enter_lazy_tlbWill Deacon1-14/+10
2017-12-06arm64: SW PAN: Point saved ttbr0 at the zero page when switching to init_mmWill Deacon1-9/+13
2017-03-02sched/headers: Prepare to remove the <linux/mm_types.h> dependency from <linu...Ingo Molnar1-0/+1
2017-03-02sched/headers: Prepare for new header dependencies before moving code to <lin...Ingo Molnar1-0/+1
2017-02-10arm64: Work around Falkor erratum 1003Christopher Covington1-1/+7
2017-01-12arm64: Use __pa_symbol for kernel symbolsLaura Abbott1-3/+3
2016-11-21arm64: Disable TTBR0_EL1 during normal kernel executionCatalin Marinas1-14/+39
2016-09-09arm64: simplify contextidr_thread_switchMark Rutland1-6/+3
2016-09-09arm64: simplify sysreg manipulationMark Rutland1-17/+10
2016-02-25arm64: Ensure the secondary CPUs have safe ASIDBits sizeSuzuki K Poulose1-0/+2
2016-02-16arm64: mm: add code to safely replace TTBR1_EL1Mark Rutland1-0/+19
2016-02-16arm64: add function to install the idmapMark Rutland1-2/+14
2016-02-16arm64: unify idmap removalMark Rutland1-0/+25
2016-02-16arm64: mm: place empty_zero_page in bssMark Rutland1-1/+1
2015-11-18arm64: use non-global mappings for UEFI runtime regionsArd Biesheuvel1-1/+1
2015-10-07arm64: switch_mm: simplify mm and CPU checksWill Deacon1-2/+4
2015-10-07arm64: mm: rewrite ASID allocator and MM context-switching codeWill Deacon1-65/+11
2015-10-07arm64: mm: remove unused cpu_set_idmap_tcr_t0sz functionWill Deacon1-23/+12
2015-04-16Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds1-0/+43
2015-03-23arm64: Use the reserved TTBR0 if context switching to the init_mmCatalin Marinas1-0/+9
2015-03-23arm64: mm: increase VA range of identity mapArd Biesheuvel1-0/+43
2013-06-07arm64: mm: don't bother invalidating the icache in switch_mmWill Deacon1-6/+0
2013-02-11arm64: mm: update CONTEXTIDR register to contain PID of current processWill Deacon1-0/+15
2012-09-17arm64: Process managementCatalin Marinas1-0/+152