summaryrefslogtreecommitdiff
path: root/arch/arm64/include/asm/atomic_ll_sc.h
AgeCommit message (Expand)AuthorFilesLines
2019-02-11Merge branch 'locking/atomics' into locking/core, to pick up WIP commitsIngo Molnar1-14/+14
2018-12-07arm64: cmpxchg: Use "K" instead of "L" for ll/sc immediate constraintWill Deacon1-1/+1
2018-12-07arm64: Avoid masking "old" for LSE cmpxchg() implementationWill Deacon1-0/+8
2018-12-07arm64: Avoid redundant type conversions in xchg() and cmpxchg()Will Deacon1-26/+27
2018-11-01arm64, locking/atomics: Use instrumented atomicsMark Rutland1-14/+14
2017-05-15arm64: Remove redundant mov from LL/SC cmpxchgRobin Murphy1-1/+0
2016-06-16locking/atomic, arch/arm64: Implement atomic{,64}_fetch_{add,sub,and,andnot,o...Peter Zijlstra1-24/+86
2015-11-05arm64: cmpxchg_dbl: fix return value typeLorenzo Pieralisi1-1/+1
2015-10-12arm64: atomics: implement native {relaxed, acquire, release} atomicsWill Deacon1-38/+60
2015-08-04arm64: make ll/sc __cmpxchg_case_##name asm consistentMark Rutland1-1/+1
2015-07-27arm64: atomic64_dec_if_positive: fix incorrect branch conditionWill Deacon1-1/+1
2015-07-27arm64: atomics: implement atomic{,64}_cmpxchg using cmpxchgWill Deacon1-46/+0
2015-07-27arm64: atomics: prefetch the destination word for write prior to stxrWill Deacon1-0/+9
2015-07-27arm64: cmpxchg: avoid memory barrier on comparison failureWill Deacon1-26/+22
2015-07-27arm64: cmpxchg: avoid "cc" clobber in ll/sc routinesWill Deacon1-8/+6
2015-07-27arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPUWill Deacon1-0/+34
2015-07-27arm64: cmpxchg: patch in lse instructions when supported by the CPUWill Deacon1-0/+38
2015-07-27arm64: atomics: patch in lse instructions when supported by the CPUWill Deacon1-12/+0
2015-07-27arm64: introduce CONFIG_ARM64_LSE_ATOMICS as fallback to ll/sc atomicsWill Deacon1-2/+17
2015-07-27arm64: atomics: move ll/sc atomics into separate header fileWill Deacon1-0/+215