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2023-06-14arm64: dts: ti: k3-am62-wakeup: add VTM nodeBryan Brattlof1-0/+8
The am62x supports a single Voltage and Thermal Management (VTM) module located in the wakeup domain with two associated temperature monitors located in hot spots of the die. Signed-off-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20230405215328.3755561-3-bb@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-03-20arm64: dts: ti: k3-am62: Add watchdog nodesJulien Panis1-0/+11
Add nodes for watchdogs : - 5 in main domain - 1 in MCU domain - 1 in wakeup domain Signed-off-by: Julien Panis <jpanis@baylibre.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20230320165123.80561-3-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2023-03-20arm64: dts: ti: k3-am62-wakeup: Introduce RTC nodeNishanth Menon1-0/+10
Introduce digital RTC node in wakeup domain. Even though this has no specific battery backup supply, this on-chip RTC is used in cost-optimized board designs as a wakeup source. Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20230320165123.80561-2-nm@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2022-11-15arm64: dts: ti: Trim addresses to 8 digitsKrzysztof Kozlowski1-1/+1
Hex numbers in addresses and sizes should be rather eight digits, not nine. Drop leading zeros. No functional change (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20221115105044.95225-1-krzysztof.kozlowski@linaro.org
2022-10-28arm64: dts: ti: k3-am62: Enable I2C nodes at the board levelAndrew Davis1-0/+1
I2C nodes defined in the top-level AM62x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the I2C nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221018211533.21335-3-afd@ti.com
2022-10-28arm64: dts: ti: k3-am62: Enable UART nodes at the board levelAndrew Davis1-0/+1
UART nodes defined in the top-level AM62x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the UART nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <afd@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20221018211533.21335-2-afd@ti.com
2022-02-28arm64: dts: ti: Introduce base support for AM62x SoCVignesh Raghavendra1-0/+41
This add bare minimum DT for AM62 describing ARM compute clusters, Main, MCU and Wakeup domain and interconnects, UARTs and I2Cs to enable booting using ramdisk. Hierarchy of dts files: am62.dtsi: base SoC skeleton which is common across am62xx family of SoCs, includes am62-main.dtsi, am62-mcu.dtsi and am62-wakeup.dtsi representing 3 domains and peripherals in each of these domain am625.dtsi: describes CPU cluster (Quad A53s). Since, am625 is a current superset device with all peripherals, am625.dtsi includes am62.dtsi completing SoC definition. Individual EVMs using this SoC will just need to include am625.dtsi thus making things easier for Board and SOM Vendors. Future derivative SoCs will have their own am62{1-9}{1-9}.dtsi overriding cluster / peripheral definitions with their own compatibles. More details about the SoCs can be found in the Technical Reference Manual: https://www.ti.com/lit/pdf/spruiv7 Co-developed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Co-developed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20220225120239.1303821-5-vigneshr@ti.com