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2021-10-17arm64: dts: rockchip: change gpio nodenamesJohan Jonker1-4/+4
Currently all gpio nodenames are sort of identical to there label. Nodenames should be of a generic type, so change them all. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20211007144019.7461-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-10-16arm64: dts: rockchip: add powerdomains to rk3368Heiko Stuebner1-0/+178
Add the core io-domain node for rk3368. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20210925090405.2601792-3-heiko@sntech.de
2021-09-15arm64: dts: rockchip: remove interrupt-names from iommu nodesJohan Jonker1-5/+0
The iommu driver gets the interrupts by platform_get_irq(), so remove interrupt-names property from iommu nodes. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210711143430.14347-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-10arm64: dts: rockchip: add timer0 clocks on rk3368Ezequiel Garcia1-0/+2
The timer driver requires pclk and sclk clocks to be present in the device tree node, so add them. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Link: https://lore.kernel.org/r/20210506111136.3941-2-ezequiel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-05-05Merge tag 'pwm/for-5.13-rc1' of ↵Linus Torvalds1-4/+0
git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This adds support for the PWM controller found on Toshiba Visconti SoCs and converts a couple of drivers to the atomic API. There's also a bunch of cleanups and minor fixes across the board" * tag 'pwm/for-5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (35 commits) pwm: Reword docs about pwm_apply_state() pwm: atmel: Improve duty cycle calculation in .apply() pwm: atmel: Fix duty cycle calculation in .get_state() pwm: visconti: Add Toshiba Visconti SoC PWM support dt-bindings: pwm: Add bindings for Toshiba Visconti PWM Controller arm64: dts: rockchip: Remove clock-names from PWM nodes ARM: dts: rockchip: Remove clock-names from PWM nodes dt-bindings: pwm: rockchip: Add more compatible strings dt-bindings: pwm: Convert pwm-rockchip.txt to YAML pwm: mediatek: Remove unused function pwm: pca9685: Improve runtime PM behavior pwm: pca9685: Support hardware readout pwm: pca9685: Switch to atomic API pwm: lpss: Don't modify HW state in .remove callback pwm: sti: Free resources only after pwmchip_remove() pwm: sti: Don't modify HW state in .remove callback pwm: lpc3200: Don't modify HW state in .remove callback pwm: lpc18xx-sct: Free resources only after pwmchip_remove() pwm: bcm-kona: Don't modify HW state in .remove callback pwm: bcm2835: Free resources only after pwmchip_remove() ...
2021-04-23arm64: dts: rockchip: Remove clock-names from PWM nodesJohan Jonker1-4/+0
A test with the command below gives this error: /arch/arm64/boot/dts/rockchip/rk3368-evb-act8846.dt.yaml: pwm@ff680030: clock-names: ['pwm'] is too short Devices with only one PWM clock use it to both to derive the functional clock for the device and as the bus clock. The driver does not need "clock-names" to get a handle, so remove them all. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2021-04-11arm64: dts: rockchip: move mmc aliases to board dts on rk3368Heiko Stuebner1-3/+0
As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-6-heiko@sntech.de
2021-03-21arm64: dts: rockchip: add phandle to timer0 on rk3368Heiko Stuebner1-1/+1
While the kernel doesn't care s0 much right now, bootloaders like u-boot need to refine the node on their side, so to make life easier for everyone add the timer0 phandle for timer0. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210209103408.2302218-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-02-01arm64: dts: rockchip: assign a fixed index to mmc devices on rk3368 boardsJohan Jonker1-0/+3
Recently introduced async probe on mmc devices can shuffle block IDs. Pin them to fixed values to ease booting in environments where UUIDs are not practical. Use newly introduced aliases for mmcblk devices from [1]. The sort order is based on reg address. [1] https://patchwork.kernel.org/patch/11747669/ Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210118155242.7172-5-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-02-01arm64: dts: rockchip: Remove bogus "amba" bus nodesRobin Murphy1-31/+24
The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful purpose, and certainly bear no relation at all to the actual underlying interconnect topology. They appear to be cargo-cult copying from a design misstep in the very early days of FDT adoption on ARM, which was righted with the "arm,primecell" compatible, and the last trace of the idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus""). As such, they can simply be removed and the DMA-330 nodes fitted into the normal sort order. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/131e0ea065109760ea3b59c4bb90cf4fac7826f7.1611186142.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-01-18arm64: dts: rockchip: rename thermal subnodes for rk3368Johan Jonker1-2/+2
A test with the command below gives for example this error: /arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dt.yaml: thermal-zones: 'cpu', 'gpu' do not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+' Make the rk3368 thermal subnode names in line with the rest of the Rockchip dts files. Add a label and rename them so that it ends with "-thermal" make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/ thermal/thermal-zones.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210117150953.16475-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-07-18arm64: dts: rockchip: Add 'arm,pl330-periph-burst' for dmacSugar Zhang1-0/+2
This patch Add the quirk to specify to use burst transfer for better compatible and higher performance. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Link: https://lore.kernel.org/r/1593439935-68540-1-git-send-email-sugar.zhang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-06-17arm64: dts: rockchip: rename label and nodename pinctrl subnodes that end ↵Johan Jonker1-3/+3
with gpio A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dt.yaml: tsadc: tsadc-otp-gpio: {'phandle': [[90]], 'rockchip,pins': [[0, 6, 0, 123]]} is not of type 'array' 'gpio' is a sort of reserved nodename and should not be used for pinctrl in combination with 'rockchip,pins', so change nodes that end with 'gpio' to end with 'pin' or 'pins'. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/ dtschema/schemas/gpio/gpio.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200524160636.16547-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-17arm64: dts: rockchip: remove clock-names property from 'generic-ehci' nodesJohan Jonker1-1/+0
A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff5c0000: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' 'clock-names' is not a valid property name for usb_host nodes with compatible string 'generic-ehci', so remove them. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ehci.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312171441.21144-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-03-11arm64: dts: add bus to rockchip amba nodenamesJohan Jonker1-1/+1
A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' AMBA is a open standard for the connection and management of functional blocks in a SoC. It's compatible with 'simple-bus', so fix this error by adding 'bus' to all Rockchip 'amba' nodes. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/ schemas/simple-bus.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200302153047.17101-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-19arm64: dts: rockchip: rename dwmmc node names to mmcJohan Jonker1-3/+3
Current dts files with 'dwmmc' nodes are manually verified. In order to automate this process rockchip-dw-mshc.txt has to be converted to yaml. In the new setup rockchip-dw-mshc.yaml will inherit properties from mmc-controller.yaml and synopsys-dw-mshc-common.yaml. 'dwmmc' will no longer be a valid name for a node, so change them all to 'mmc' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200115185244.18149-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-04-11arm64: dts: rockchip: bulk convert gpios to their constant counterpartsHeiko Stuebner1-120/+120
Rockchip SoCs use 2 different numbering schemes. Where the gpio- controllers just count 0-31 for their 32 gpios, the underlying iomux controller splits these into 4 separate entities A-D. Device-schematics always use these iomux-values to identify pins, so to make mapping schematics to devicetree easier Andy Yan introduced named constants for the pins but so far we only used them on new additions. Using a sed-script created by Emil Renner Berthing bulk-convert the remaining raw gpio numbers into their descriptive counterparts and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x mappings: /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Suggested-by: Emil Renner Berthing <esmil@mailme.dk> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Acked-by: Robin Murphy <robin.murphy@arm.com>
2019-01-30arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring1-8/+8
The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-11-19arm64: dts: rockchip: Add all CPUs in cooling mapsViresh Kumar1-3/+12
Each CPU can (and does) participate in cooling down the system but the DT only captures a handful of them, normally CPU0, in the cooling maps. Things work by chance currently as under normal circumstances its the first CPU of each cluster which is used by the operating systems to probe the cooling devices. But as soon as this CPU ordering changes and any other CPU is used to bring up the cooling device, we will start seeing failures. Also the DT is rather incomplete when we list only one CPU in the cooling maps, as the hardware doesn't have any such limitations. Update cooling maps to include all devices affected by individual trip points. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-06-20arm64: dts: rockchip: Add missing cooling device properties for CPUsViresh Kumar1-2/+6
The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Do minor rearrangement as well to keep ordering consistent. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-06-17arm64: dts: rockchip: use SPDX-License-IdentifierKlaus Goger1-38/+1
Update all 64bit rockchip devicetree files to use SPDX-License-Identifiers. All devicetrees claim to be either GPL or X11 while the actual license text is MIT. Therefore we use MIT for the SPDX tag as X11 is clearly wrong. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Brian Norris <briannorris@chromium.org> Acked-by: Matthias Brugger <mbrugger@suse.com> Acked-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-04-16arm64: dts: rockchip: add clocks in iommu nodesJeffy Chen1-0/+10
Add clocks in iommu nodes, since we are going to control clocks in rockchip iommu driver. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-02-16arm64: dts: rockchip: Fix DWMMC clocksRobin Murphy1-1/+1
Trying to boot an RK3328 box with an HS200-capable eMMC, I see said eMMC fail to initialise as it can't run its tuning procedure, because the sample clock is missing. Upon closer inspection, whilst the clock is present in the DT, its name is subtly incorrect per the binding, so __of_clk_get_by_name() never finds it. By inspection, the drive clock suffers from a similar problem, so has never worked properly either. Fix up all instances of the incorrect clock names across the 64-bit DTs. Fixes: d717f7352ec6 ("arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs") Fixes: b790c2cab5ca ("arm64: dts: add Rockchip rk3368 core dtsi and board dts for the r88 board") Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-11-17Merge tag 'armsoc-dt' of ↵Linus Torvalds1-0/+16
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM device-tree updates from Arnd Bergmann: "We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits) arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3 dt-bindings: bus: Add documentation for the Technologic Systems NBUS arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock ARM: dts: owl-s500: Add CubieBoard6 dt-bindings: arm: actions: Add CubieBoard6 ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock ARM: dts: owl-s500: Set power domains for CPU2 and CPU3 arm: dts: mt7623: remove unused compatible string for pio node arm: dts: mt7623: update usb related nodes arm: dts: mt7623: update crypto node ARM: dts: sun8i: a711: Enable USB OTG ARM: dts: sun8i: a711: Add regulator support ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1 ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1 ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes ARM: dts: sunxi: Add dtsi for AXP81x PMIC arm64: dts: allwinner: H5: Restore EMAC changes ...
2017-11-07Merge tag 'v4.15-rockchip-dts64-2' of ↵Arnd Bergmann1-0/+16
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Pull "Rockchip dts64 updates for 4.15 part2" from Heiko Stübner: Support for the RGA (raster graphics accelerator) on rk3399 and efuses on rk3368. * tag 'v4.15-rockchip-dts64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: add efuse for RK3368 SoCs arm64: dts: rockchip: add RGA device node for RK3399 clk: rockchip: add more rk3188 graphics clock ids clk: rockchip: add clock id for PCLK_EFUSE256 of RK3368 SoCs
2017-10-24arm64: dts: rockchip: add efuse for RK3368 SoCsRomain Perier1-0/+16
This adds the definition for eFuse that is found on RK3368 SoCs with the corresponding data cells. Signed-off-by: Romain Perier <romain.perier@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-10-17arm64: dts: rockchip: fix typo in iommu nodesArnd Bergmann1-1/+1
The latest dtc warns about an extraneous cell in the interrupt property of two of the iommu device nodes: Warning (interrupts_property): interrupts size is (16), expected multiple of 12 in /iommu@ff373f00 Warning (interrupts_property): interrupts size is (16), expected multiple of 12 in /iommu@ff900800 This removes the typo. Fixes: cede4c79de28 ("arm64: dts: rockchip: add rk3368 iommu nodes") Fixes: 49c82f2b7c5d ("arm64: dts: rockchip: add rk3328 iommu nodes") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-09-17Revert "arm64: dts: rockchip: Add basic cpu frequencies for RK3368"Heiko Stuebner1-70/+2
This reverts commit 6f2dea1f5fdb73eb2e050d9ebe990121d557e519. Without accurate cpu regulators being set for boards this will wreak havoc when cpufreq-dt begins to set new frequencies without adjusting the core frequency. Additionally the rk3368 has an unsolved issue in that it has two separate cpu clusters with separate clock lines but only one cpu supply regulator for both clusters, which causes even more problems. While it seems that originally only one cluster was supposed to be active at a time (big or little), talking with real users of the hardware revealed that having all 8 cores accessible at 1.2GHz max is way more liked than having 4 cores at 1.5GHz max. Such an approach needs changes to cpufreq and/or opp though to control the two separate clock lines when setting both clusters to the same frequencies. In any case, having the OPPs in the dts at this point in time is undesireable, so remove them again for now. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-22arm64: dts: rockchip: add rk3368 iommu nodesSimon Xue1-0/+49
Add IEP/ISP/VOP/HEVC/VPU iommu nodes Signed-off-by: Simon Xue <xxm@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-21arm64: dts: rockchip: Add basic cpu frequencies for RK3368Romain Perier1-2/+70
This adds and enable the operating points that have been tested and are currently supported by the SoC. This also adds clocks for ARMCLKL and ARMCLKB. Signed-off-by: Romain Perier <romain.perier@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-07-30arm64: dts: rockchip: add rk3368 spdif nodeSugar Zhang1-0/+19
This patch add the spdif dt node for rk3368 soc. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-22arm64: dts: rockchip: add rk3368 dw-mmc resetsHeiko Stuebner1-0/+6
dw-mmc got its reset-properties specified, so add the softresets for it on the rk3368. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
2017-03-22arm64: dts: rockchip: disable mailbox of RK3368 SoCs per defaultJianqun Xu1-0/+1
Default to disable mailbox in rk3368 core dts file. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-22arm64: dts: rockchip: add i2s nodes support for RK3368 SoCsJianqun Xu1-0/+38
I2S of RK3368 SoCs keep same as RK3066 SoCs found on Rockchip, add nodes to support them. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-22arm64: dts: rockchip: add dmac nodes for rk3368 SoCsHuibin Hong1-0/+29
Add dmac bus and dmac peri dts nodes for peripherals, such as I2S, SPI, UART and so on. Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-22arm64: dts: rockchip: remove wrongly added idle states on rk3368Heiko Stuebner1-20/+0
As reported by Lorenzo, the residency/latency values defined in the idle-state for rk3368 "make no sense". When introducing them I simply took the idle-state node from the vendor kernel in error as I didn't look up if these values were sane in the first place. Talking to people and determining why they were used in this way showed that it was meant to make sure the cpu_suspend callback got initialized which at the 3.10 time was somehow required even for wfi-based idle handling. Of course the generic arch_cpu_idle() now does wfi-based idle-handling already and the rk3368 does not implement any other idle states than the default WFI, so these wrong idle-states should go away. Reported-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2016-12-16Merge tag 'armsoc-dt64' of ↵Linus Torvalds1-9/+9
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "A couple of interesting new SoC platforms are now supported, these are the respective DTS sources: - Samsung Exynos5433 mobile phone platform, including an (almost) fully supported phone reference board. - Hisilicon Hip07 server platform and D05 board, the latest iteration of their product line, now with 64 Cortex-A72 cores across two sockets. - Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product line, used in Android tablets and ultra-cheap development boards - NXP LS1046A Communication processor, improving on the earlier LS1043A with faster CPU cores - Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810) mobile phone SoCs - Early support for the Nvidia Tegra Tegra186 SoC - Amlogic S905D is a minor variant of their existing Android consumer product line - Rockchip PX5 automotive platform, a close relative of their popular rk3368 Android tablet chips Aside from the respective evaluation platforms for the above chips, there are only a few consumer devices and boards added this time: - Huawei Nexus 6P (Angler) mobile phone - LG Nexus 5x (Bullhead) mobile phone - Nexbox A1 and A95X Android TV boxes - Pine64 development board based on Allwinner A64 - Globalscale Marvell ESPRESSOBin community board based on Armada 3700 - Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board For the existing platforms, we get bug fixes and new peripheral support for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom, Rockchip, Berlin, and ZTE" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (168 commits) arm64: dts: fix build errors from missing dependencies ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible ARM64: dts: meson-gxl: Add support for Nexbox A95X ARM64: dts: meson-gxm: Add support for the Nexbox A1 ARM: dts: artpec: add pcie support arm64: dts: berlin4ct-dmp: add missing unit name to /memory node arm64: dts: berlin4ct-stb: add missing unit name to /memory node arm64: dts: berlin4ct: add missing unit name to /soc node arm64: dts: qcom: msm8916: Add ddr support to sdhc1 arm64: dts: exynos: Enable HS400 mode for eMMC for TM2 ARM: dts: Add xo to sdhc clock node on qcom platforms ARM64: dts: Add support for Meson GXM dt-bindings: add rockchip RK1108 Evaluation board arm64: dts: NS2: Add PCI PHYs arm64: dts: NS2: enable sdio1 arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash arm64: tegra: Add NVIDIA P2771 board support arm64: tegra: Enable PSCI on P3310 arm64: tegra: Add NVIDIA P3310 processor module support arm64: tegra: Add GPIO controllers on Tegra186 ...
2016-11-18usb: dwc2: Deprecate g-use-dma bindingJohn Youn1-1/+0
This is not needed as the gadget now fully supports DMA and it can autodetect it. This was initially added because gadget DMA mode was only partially implemented so could not be automatically enabled. Signed-off-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
2016-11-09arm64: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"Jaehoon Chung1-3/+3
In drivers/mmc/core/host.c, there is "max-freqeuncy" property. It should be same behavior, So Use the "max-frequency" instead of "clock-freq-min-max". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-10-16arm64: dts: rockchip: fix i2c resource error of rk3368Andy Yan1-6/+6
According to the TRM and downstream code from rockchip, the register address of i2c1 on rk3368 is 0xff660000 and i2c2 is 0xff140000. This patch fix the i2c1 & i2c2 register address definition error, also fix the clk and pinctrl reference error. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-10-08Merge tag 'armsoc-dt64' of ↵Linus Torvalds1-0/+10
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM 64-bit DT updates from Arnd Bergmann: "The 64-bit DT changes are surprisingly small this time, we only add two SoC platforms: the ZTE ZX296718 Set-top-box SoC and the SocioNext UniPhier LD11 TV SoC, each with their reference boards. There are three new machines added for existing SoC platforms: - The Marvell Armada 8040 development board is an impressive quad-core Cortex-A72 machine with three 10gbit ethernet interfaces - Qualcomms DragonBoard 820c single-board computer is their current high-end phone platform in the 96boards form factor - Rockchip: Tronsmart Orion r86 set-top-box is a popular mid-range Android box based on the 8-core rk3368 SoC" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (91 commits) arm64: dts: berlin4ct: Add L2 cache topology arm64: dts: berlin4ct: enable all wdt nodes unconditionally arm64: dts: berlin4ct: switch to Cortex-A53 specific pmu nodes arm64: dts: Add ZTE ZX296718 SoC dts and Makefile arm64: dts: apm: Add DT node for APM X-Gene 2 CPU clocks arm64: dts: apm: Add X-Gene SoC hwmon to device tree arm64: dts: apm: Fix interrupt polarity for X-Gene PCIe legacy interrupts arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries arm64: dts: marvell: enable MSI for PCIe on Armada 7K/8K arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes arm64: dts: rockchip: add Type-C phy for RK3399 arm64: dts: rockchip: enable the gmac for rk3399 evb board arm64: dts: rockchip: add the gmac needed node for rk3399 arm64: dts: rockchip: support the pmu node for rk3399 arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs arm64: dts: rockchip: add the tcpc for rk3399 power domain arm64: dts: rockchip: add efuse0 device node for rk3399 arm64: dts: rockchip: configure PCIe support for rk3399-evb arm64: dts: rockchip: add the PCIe controller support for RK3399 ...
2016-08-23arm64: dts: rockchip: add reset saradc node for rk3368 SoCsCaesar Wang1-0/+2
SARADC controller needs to be reset before programming it, otherwise it will not function properly. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-08-11arm64: dts: rockchip: add syscon-reboot-mode DT nodeAndy Yan1-0/+10
Add syscon-reboot-mode driver DT node for rk3368 platform Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Tested-by: Caesar Wang <caesar.upstream@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-06-18arm64: dts: rockchip: fixes the gic400 2nd region size for rk3368Caesar Wang1-1/+1
The 2nd additional region is the GIC virtual cpu interface register base and size. As the gic400 of rk3368 says, the cpu interface register map as below : -0x0000 GICC_CTRL . . . -0x00fc GICC_IIDR -0x1000 GICC_IDR Obviously, the region size should be greater than 0x1000. So we should make sure to include the GICC_IDR since the kernel will access it in some cases. Fixes: b790c2cab5ca ("arm64: dts: add Rockchip rk3368 core dtsi and board dts for the r88 board") Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Cc: stable@vger.kernel.org [added Fixes and stable-cc] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30arm64: dts: rockchip: add rk3368 io-domain core nodesHeiko Stuebner1-0/+10
Add the core io-domain nodes to grf and pmugrf which individual boards than just have to enable and add the necessary supplies to. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-30arm64: dts: rockchip: make rk3368 grf syscons simple-mfdsHeiko Stuebner1-2/+2
The general register files do contain a lot of separate functions and while some really are only registers with a lot of different 1-bit settings, there are also a lot of them containing some bigger function blocks. To be able to define these as sub-devices, make them simple-mfds. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: David Wu <david.wu@rock-chips.com>
2016-04-25arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsiCaesar Wang1-1/+65
In order to be standard to manage for rockchip SoCs, move the thermal data into rk3368 dtsi, we needn't to add a new file for thermal. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Cc: Zhang Rui <rui.zhang@intel.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-29arm64: dts: rockchip: Add rk3368 mailbox device nodesCaesar Wang1-0/+12
This adds mailbox device nodes in dts. Mailbox is used by the Rockchip CPU cores to communicate requests to MCU processor. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-27arm64: dts: rockchip: fix the incorrect otp-out pin on rk3368Caesar Wang1-2/+2
This patch fixes the incorrect Over-temperature protection pin. since the rk3368 io list said the otp pin is gpio0a3. Anyway, that should be fixed in here. Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-01-25arm64: dts: rockchip: add rk3368 tuning clk for emmc and sdmmcShawn Lin1-4/+6
Add tuning clk for emmc and sdmmc, otherwise I get the following failure while enabling mmc-hs200-1_8v. dwmmc_rockchip ff0f0000.dwmmc: Tuning clock (sample_clk) not defined. mmc0: tuning execution failed mmc0: error -5 whilst initialising MMC card With it dwmmc_rockchip ff0f0000.dwmmc: Successfully tuned phase to 170 mmc0: new HS200 MMC card at address 0001 mmcblk0: mmc0:0001 M8G1GC 7.28 GiB Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-15 13:35:59 +0300