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path: root/arch/arm64/boot/dts/renesas/r8a7795.dtsi
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2017-05-14arm64: dts: r8a7795: Mark EthernetAVB device node disabledGeert Uytterhoeven1-0/+1
commit 0d1390ff283f6c38595288e7f74da6829896b8b7 upstream. Device nodes representing I/O devices should be marked disabled in the SoC-specific DTS, and overridden by board-specific DTSes where needed. Fixes: a92843c8a6f8c039 ("arm64: dts: r8a7795: add EthernetAVB device node") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-09-08arm64: dts: r8a7795: remove unnecessary cap-mmc-highspeed propertySimon Horman1-2/+0
Remove cap-mmc-highspeed property from SDHI2 and SDHI3. This property is unnecessary as the driver automatically sets the highspeed capability. Furthermore its use is inconsistent with SDHI0 and SDHI1 which are also highspeed capable but do not have this property present. Found by inspection. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: Add SoC-specific compatible property to audio-dmac nodesGeert Uytterhoeven1-2/+4
The audio-dmac nodes used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add DU device to DTLaurent Pinchart1-0/+46
Add the DU device to r8a7795.dtsi in a disabled state. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add VSP instancesLaurent Pinchart1-0/+90
The r8a7795 has 9 VSP instances. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: renesas: r8a7795: Add FCPV nodesLaurent Pinchart1-0/+63
The FCPs handle the interface between various IP cores and memory. Add the instances related to the VSP2s. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: Add HSUSB device nodeYoshihiro Shimoda1-0/+17
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: set maximum frequency for SDHI clocksWolfram Sang1-0/+4
Define the upper limit otherwise the driver cannot utilize max speeds. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: add FDP1 device nodesKieran Bingham1-0/+27
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-09-06arm64: dts: r8a7795: add FCPF device nodesKieran Bingham1-0/+21
Provide nodes for the FCP devices dedicated to the FDP device channels. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Kieran Bingham <kieran@bingham.xyz> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-07-07arm64: dts: r8a7795: Add CAN FD supportRamesh Shanmugasundaram1-0/+24
Adds CAN FD controller node for r8a7795. Note: CAN FD controller register base address specified in R-Car Gen3 Hardware User Manual v0.5E is incorrect. The correct address is: CAN FD - 0xe66c0000 Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-07-07arm64: dts: r8a7795: Add missing blank lines between cpu nodesGeert Uytterhoeven1-0/+2
For consistency with a57_0/a57_1 cpu nodes, and all other nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: Drop 0x from unit address of gicSimon Horman1-1/+1
Drop 0x from unit address of gic as this is the desired form for a unit address. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-05-30arm64: dts: r8a7795: Fix W=1 dtc warningsGeert Uytterhoeven1-34/+36
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property Move the cache-controller nodes under the cpus node, and make their unit names and reg properties match the MPIDR values. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: Use SYSC "always-on" PM Domain for RWDT nodeGeert Uytterhoeven1-1/+1
Hook up the RWDT device node to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Cfr. commit 38dbb45ee4bc ("arm64: dts: r8a7795: Use SYSC "always-on" PM Domain") Fixes: f43838a7ae014cba ("arm64: dts: r8a7795: Add RWDT node") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: Add RWDT nodeWolfram Sang1-0/+8
This patch adds the RWDT device node for r8a7795. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: enable DMA for I2CNiklas Söderlund1-0/+14
Add DMA properties to the I2C nodes. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30arm64: dts: r8a7795: Increase the size of GIC-400 mapped registersPooya Keshavarzi1-2/+2
There are some requirements about the GIC-400 memory layout and its mapping if using 64k aligned base addresses like on r8a7795. See e.g. http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=21550029f709072aacf3b9 Map the whole memory range instead of only 0x2000. This will fix the issue that some hypervisors, e.g. Xen, fail to handle the interrupts correctly. Signed-off-by: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: r8a7795: Use SYSC "always-on" PM DomainGeert Uytterhoeven1-55/+55
Hook up all devices that are part of the CPG/MSSR Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: r8a7795: Add SYSC PM DomainsGeert Uytterhoeven1-0/+13
Add a device node for the System Controller. Hook up the Cortex-A57 CPU cores and the Cortex-A57 and Cortex A53 L2 caches/SCUs to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: r8a7795: Don't disable referenced optional clocksGeert Uytterhoeven1-4/+1
clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Reported-by: Jürg Billeter <j@bitron.ch> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-27arm64: dts: r8a7795: Add PCIe nodesPhil Edworthy1-0/+57
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28arm64: dts: r8a7795: Use USB3.0 fallback compatibility stringSimon Horman1-2/+2
Use recently added fallback compatibility string in r8a7795 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-03-28arm64: dts: r8a7795: Add CAN supportRamesh Shanmugasundaram1-0/+30
Adds CAN controller nodes for r8a7795. Note: CAN channel register base address mentioned in R-Car Gen3 Hardware User Manual v0.5E is incorrect. The corrected base addresses are: CAN Channel 0 - 0xe6c30000 CAN Channel 1 - 0xe6c38000 Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28arm64: dts: r8a7795: Add CAN external clock supportRamesh Shanmugasundaram1-0/+8
Adds external CAN clock node for r8a7795. This clock can be used as fCAN clock of CAN and CAN FD controller. Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26arm64: dts: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodesYoshihiro Shimoda1-0/+66
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26arm64: dts: r8a7795: add usb2_phy device nodesYoshihiro Shimoda1-0/+28
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-26arm64: dts: r8a7795: use fallback etheravb compatibility stringSimon Horman1-1/+2
Use recently added fallback compatibility string in r8a7795 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26arm64: dts: r8a7795: Add SDHI support to dtsiAi Kyuse1-0/+38
Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [wsa: squashed some fixes and added mmc-caps] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-19arm64: dts: r8a7795: Add GIC-400 virtual interfacesDirk Behme1-1/+3
Besides the distributor and the CPU interface the GIC-400 additionally supports the virtual interface control blocks and the virtual CPU interfaces. Add the physical base addresses and size for these. See http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0471b/index.html -> 3.2. GIC-400 register map and Linux kernel's Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt for more details. For the at GICH Virtual interface control blocks at 0xf1040000 cover the whole 128kB (0x20000) range. This is done based on the advice from Marc Zyngier http://www.spinics.net/lists/arm-kernel/msg483139.html Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17arm64: dts: r8a7795: Add INTC-EX device nodeMagnus Damm1-0/+15
Add a single r8a7795 INTC-EX device node to support external IRQ pins IRQ0 -> IRQ5. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17arm64: dts: r8a7795: Add CA53 L2 cache-controller nodeGeert Uytterhoeven1-0/+6
Add a device node for the Cortex-A53 L2 cache-controller. The L2 cache for the Cortex-A53 CPU cores is 512 KiB large (organized as 32 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-17arm64: dts: r8a7795: Add missing properties to CA57 L2 cache nodeGeert Uytterhoeven1-0/+2
Add the missing "cache-unified" and "cache-level" properties to the Cortex-A57 cache-controller node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-16arm64: dts: r8a7795: use GIC_* definesSimon Horman1-54/+54
Use GIC_* defines for GIC interrupt cells in r8a7795 device tree. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-08arm64: dts: r8a7795: pmu: switch to Cortex specific device nodesDirk Behme1-2/+2
Instead of using the generic armv8-pmuv3 compatibility use the more specific Cortex A57 compatibility. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-05arm64: dts: r8a7795: Add L2 cache-controller nodesGeert Uytterhoeven1-0/+8
Add device nodes for the L2 caches, and link the CPU node to its L2 cache node. The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as 128 KiB x 16 ways). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-03arm64: dts: r8a7795: Add BRG support for (H)SCIFGeert Uytterhoeven1-22/+52
Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depend on the actual board. Add the two optional clock sources (S3D1 and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-03arm64: dts: r8a7795: Rename the serial port clock to fckGeert Uytterhoeven1-11/+11
The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-02arm64: dts: r8a7795: Add SCIF fallback compatibility stringsGeert Uytterhoeven1-11/+27
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-02arm64: dts: r8a7795: Add USB-DMAC device nodesYoshihiro Shimoda1-0/+26
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-26arm64: dts: r8a7795: Add USB3.0 host device nodesYoshihiro Shimoda1-0/+18
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-01-25arm64: dts: r8a7795: Complete SYS-DMAC nodesGeert Uytterhoeven1-3/+90
Complete the dma-controller nodes for SYS-DMAC 0 to 2. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: renesas: r8a7795: fix SATA clock assignmentUlrich Hecht1-1/+1
SATA clock is 815, not 915. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: r8a7795: Add SATA controller nodeKouei Abe1-0/+8
This adds SATA device node to r8a7795.dtsi. Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> [uli: adjusted for new MSTP clock scheme] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: renesas: r8a7795: add internal delay for i2c IPsWolfram Sang1-0/+7
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: r8a7795: Add pmu device nodesYoshifumi Hosoya1-0/+12
Enabling the performance monitor unit on r8a7795. Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: r8a7795: Add Cortex-A57 CPU coresGaku Inami1-6/+25
Add Cortex-A57 CPU cores to r8a7795 SoC for a total of 4 x Cortex-A57. Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Sigend-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-18arm64: dts: r8a7795: Add PSCI nodeGaku Inami1-0/+6
Add PSCI node for r8a7795 SoC, and cpu node enable-method property is set to "psci". Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound DVC supportKuninori Morimoto1-0/+13
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-26arm64: renesas: r8a7795: Sound SRC supportKuninori Morimoto1-0/+61
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-04 04:52:29 +0300