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2022-09-02arm64: dts: renesas: Drop clock-names property from RPC nodeLad Prabhakar1-1/+0
With 'unevaluatedProperties' support implemented, there are a number of warnings when running dtbs_check: arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: spi@ee200000: Unevaluated properties are not allowed ('clock-names' was unexpected) From schema: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml The main problem is that the DT bindings do not allow clock-names. So just drop the clock-names properties from the SoC DTSI files. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220829215128.5983-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29arm64: dts: renesas: r8a774a1: Put I2C aliases to board filesWolfram Sang1-11/+0
I2C aliases are not a property of a SoC. They belong to board files where they are named accordingly in the schematics. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220825071022.7864-7-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add interrupt-names to CANFD nodesGeert Uytterhoeven1-0/+1
The Renesas R-Car CAN-FD Controller on R-Car Gen3 and RZ/G2 SoCs has two interrupts. Add interrupt-names properties to all CAN-FD device nodes to identify the individual interrupts, so we can make this property a required property in the DT bindings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/10eef1e20372af4a156b06df8e5124666ec7c6b6.1651512451.git.geert+renesas@glider.be
2022-05-06arm64: dts: renesas: Remove empty rgb output endpointsLaurent Pinchart1-2/+0
Endpoints node must have a remote-endpoint property, as endpoints only exist to model a link between ports. Drop the empty rgb output endpoints from SoC dtsi files, and declare them in the board dts instead. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220424161228.8147-2-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Remove empty lvds endpointsLaurent Pinchart1-2/+0
Endpoints node must have a remote-endpoint property, as endpoints only exist to model a link between ports. Drop the empty lvds endpoints from SoC dtsi files, they should be instead declared in the board dts or in overlays. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220424161228.8147-1-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodesWolfram Sang1-0/+1
Driver doesn't use it yet, but let's describe the HW properly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220322095512.4707-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-28arm64: dts: renesas: Miscellaneous whitespace fixesGeert Uytterhoeven1-7/+7
Make whitespace and indentation more consistent. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/3f2bcae1253c7a31d3eb6755185092a1f2b99b09.1642524439.git.geert+renesas@glider.be
2021-12-07arm64: dts: renesas: Fix thermal bindingsKieran Bingham1-3/+3
The binding node names for the thermal zones are not successfully validated by the dt-schemas. Fix the validation by changing from sensor-thermalN or thermal-sensor-N to sensorN-thermal. Provide node labels of the form sensorN_thermal to ensure consistency with the other platform implementations. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20211104224033.3997504-1-kieran.bingham+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26arm64: dts: renesas: Fix operating point table node namesGeert Uytterhoeven1-2/+2
Align the node names of device nodes representing operating point v2 tables with the expectations of the DT bindings in Documentation/devicetree/bindings/opp/opp-v2.yaml. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/ac885456ffb00fa4cc4069b9967761df2c98c3d8.1637764588.git.geert+renesas@glider.be
2021-11-19arm64: dts: reneas: rzg2: Add SDnH clocksWolfram Sang1-4/+8
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20211110191610.5664-9-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-10-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-11-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-12-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-07-19arm64: dts: renesas: rzg2: Rename i2c_dvfs to iic_pmicGeert Uytterhoeven1-2/+2
As RZ/G2 SoCs do not support DVFS, the "iic-dvfs" module was renamed to "iic-pmic" in the RZ/G Series, 2nd Generation User’s Manual: Hardware Rev. 1.00. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/3fee803a7464a3243e62a943a6a5dce8f1c65a2d.1624016811.git.geert+renesas@glider.be
2021-05-31arm64: dts: renesas: Add missing opp-suspend propertiesGeert Uytterhoeven1-0/+1
Tag the highest "Power Optimized" (1.5 GHz) Cortex-A57 operating point table entries for the RZ/G2M, R-Car M3-W and M3-W+ SoCs with the "opp-suspend" property. This makes sure the system will enter suspend in the same performance state as it will be resumed by the firmware later, avoiding state inconsistencies after resume. Based on a patch for R-Car M3-W in the BSP by Takeshi Kihara <takeshi.kihara.df@renesas.com>. Fixes: 800037e815b91d8c ("arm64: dts: renesas: r8a774a1: Add operating points") Fixes: da7e3113344fda50 ("arm64: dts: renesas: r8a7796: Add OPPs table for cpu devices") Fixes: f51746ad7d1ff6b4 ("arm64: dts: renesas: Add Renesas R8A77961 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/45a061c3b0463aac7d10664f47c4afdd999da50d.1619699721.git.geert+renesas@glider.be
2021-05-25arm64: dts: renesas: Add fck to etheravb-rcar-gen3 clock-names listAdam Ford1-0/+1
The bindings have been updated to support two clocks. Add a clock-names list in the device tree with fck in it. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210224115146.9131-3-aford173@gmail.com [geert: Update new r8a779a0.dtsi] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-04-27arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsiNiklas Söderlund1-0/+8
The port@0 is a mandatory port, add or move the declaration to the CSI-2 nodes top declared in dtsi files instead of depending on dts files adding them when describing the external connection. This fixes validation warnings for DTB outputs that do not connect all CSI-2 receivers to transmitters and thus declaring all port@0 nodes in dts files. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20210421150221.3202955-3-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-11arm64: dts: renesas: rzg2: Add RPC-IF SupportAdam Ford1-0/+17
The RZ/G2 series contain the SPI Multi I/O Bus Controller (RPC-IF). Add the nodes, but make them disabled by default. Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20210102115412.3402059-4-aford173@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-11arm64: dts: renesas: rzg2: Add usb2_clksel to RZ/G2 M/N/HAdam Ford1-0/+15
Per the reference manual for the RZ/G Series, 2nd Generation, the RZ/G2M, RZ/G2N, and RZ/G2H have a bit that can be set to choose between a crystal oscillator and an external oscillator. Because only boards that need this should enable it, it's marked as disabled by default for backwards compatibility with existing boards. Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20201228202221.2327468-2-aford173@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-10arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handlingGeert Uytterhoeven1-0/+2
Some EtherAVB variants support internal clock delay configuration, which can add larger delays than the delays that are typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps" properties). Historically, the EtherAVB driver configured these delays based on the "rgmii-*id" PHY mode. This was wrong, as these are meant solely for the PHY, not for the MAC. Hence properties were introduced for explicit configuration of these delays. Convert the RZ/G2 DTS files from the old to the new scheme: - Add default "rx-internal-delay-ps" and "tx-internal-delay-ps" properties to the SoC .dtsi files, to be overridden by board files where needed, - Convert board files from "rgmii-*id" PHY modes to "rgmii", adding the appropriate "rx-internal-delay-ps" and/or "tx-internal-delay-ps" overrides. Notes: - RZ/G2E does not support TX internal delay handling. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819134344.27813-8-geert+renesas@glider.be
2020-09-11arm64: dts: renesas: Fix pin controller node namesGeert Uytterhoeven1-1/+1
According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200821112433.5652-1-geert+renesas@glider.be
2020-08-25arm64: dts: renesas: r8a774a1: Add PCIe EP nodesLad Prabhakar1-0/+38
Add PCIe EP nodes to R8A774A1 (RZ/G2M) SoC dtsi. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20200814173037.17822-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-17arm64: dts: renesas: Fix SD Card/eMMC interface device node namesYoshihiro Shimoda1-4/+4
Fix the device node names as "mmc@". Fixes: 663386c3e1aa ("arm64: dts: renesas: r8a774a1: Add SDHI nodes") Fixes: 9b33e3001b67 ("arm64: dts: renesas: Initial r8a774b1 SoC device tree") Fixes: 77223211f44d ("arm64: dts: renesas: r8a774c0: Add SDHI nodes") Fixes: d9d67010e0c6 ("arm64: dts: r8a7795: Add SDHI support to dtsi") Fixes: a513cf1e6457 ("arm64: dts: r8a7796: add SDHI nodes") Fixes: 111cc9ace2b5 ("arm64: dts: renesas: r8a77961: Add SDHI nodes") Fixes: f51746ad7d1f ("arm64: dts: renesas: Add Renesas R8A77961 SoC support") Fixes: df863d6f95f5 ("arm64: dts: renesas: initial R8A77965 SoC device tree") Fixes: 9aa3558a02f0 ("arm64: dts: renesas: ebisu: Add and enable SDHI device nodes") Fixes: 83f18749c2f6 ("arm64: dts: renesas: r8a77995: Add SDHI (MMC) support") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1594382634-13714-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-06-26arm64: dts: renesas: Add HiHope RZ/G2M Rev.3.0/4.0 main board supportLad Prabhakar1-0/+2
Add support for HiHope RZ/G2M Rev.3.0/4.0 main board support based on r8a774a1 SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Link: https://lore.kernel.org/r/1593004330-5039-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-27arm64: dts: renesas: Fix IOMMU device node namesYoshihiro Shimoda1-9/+9
Fix IOMMU device node names as "iommu@". Fixes: 8f507babc617 ("arm64: dts: renesas: r8a774a1: Add IPMMU device nodes") Fixes: 63093a8e58be ("arm64: dts: renesas: r8a774b1: Add IPMMU device nodes") Fixes: 6c7e02178e8f ("arm64: dts: renesas: r8a774c0: Add IPMMU device nodes") Fixes: 3b7e7848f0e8 ("arm64: dts: renesas: r8a7795: Add IPMMU device nodes") Fixes: e4b9a493df45 ("arm64: dts: renesas: r8a7795-es1: Add IPMMU device nodes") Fixes: 389baa409617 ("arm64: dts: renesas: r8a7796: Add IPMMU device nodes") Fixes: 55697cbb44e4 ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes") Fixes: ce3b52a1595b ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes") Fixes: a3901e7398e1 ("arm64: dts: renesas: r8a77995: Add IPMMU device nodes") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/1587461775-13369-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-02-21arm64: dts: renesas: rzg2: Add reset control properties for displayGeert Uytterhoeven1-2/+3
Add reset control properties to the device nodes for the Display Units on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a single reset for each pair of DU channels. Join the clocks lines while at it, to increase uniformity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200218133019.22299-5-geert+renesas@glider.be
2020-02-21arm64: dts: renesas: rcar-gen3: Replace "vsps" by "renesas,vsps"Geert Uytterhoeven1-1/+1
The Renesas-specific "vsps" property lacks a vendor prefix. Add a "renesas," prefix to comply with DT best practises. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20191105183504.21447-4-geert+renesas@glider.be
2019-12-20arm64: dts: renesas: Group tuples in pci ranges and dma-ranges propertiesGeert Uytterhoeven1-8/+8
To improve human readability and enable automatic validation, the tuples in the "ranges" and "dma-ranges" properties of PCI device nodes should be grouped. Fix this by grouping the tuples of the "ranges" and "dma-ranges" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213164115.3697-8-geert+renesas@glider.be Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20arm64: dts: renesas: Group tuples in interrupt propertiesGeert Uytterhoeven1-95/+95
To improve human readability and enable automatic validation, the tuples in the various properties containing interrupt specifiers should be grouped. While "make dtbs_check" does not impose this yet for the "interrupts" property, it does for the "interrupt-map" property. Fix this by grouping the tuples of the "interrupts" and "interrupt-map" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213164115.3697-7-geert+renesas@glider.be Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-10-10arm64: dts: renesas: r8a774a1: Remove audio port nodeBiju Das1-11/+0
This patch removes audio port node from SoC device tree and fixes the below dtb warning Warning (unit_address_vs_reg): /soc/sound@ec500000/ports/port@0: node has a unit name, but no reg property Fixes: e2f04248fcd4 ("arm64: dts: renesas: r8a774a1: Add audio support") Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1570200761-884-1-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-01arm64: dts: renesas: Add LIF channel indices to vsps propertiesJacopo Mondi1-1/+1
According to the Renesas R-Car DU bindings documentation, the 'vsps' property should be composed of a phandle to the VSP instance and the index of the LIF channel assigned to the DU channel. Some SoC device tree source files do not specify any LIF channel index, relying on the driver defaulting to 0 if not specified. Align all device tree files by specifying the LIF channel indices as prescribed by the bindings documentation. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Link: https://lore.kernel.org/r/20190825140135.12150-2-jacopo+renesas@jmondi.org/ Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21arm64: dts: renesas: r8a774a1: Sort nodesYoshihiro Kaneko1-87/+87
Sort nodes. If node address is present * Sort by node address, grouping all nodes with the same compat string and sorting the group alphabetically. Else * Sort alphabetically This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-07-29arm64: dts: renesas: r8a774a1: Add SSIU support for soundFabrizio Castro1-20/+231
Add SSIU support to the SoC DT as the sound driver supports it now, and also since the sound driver can now handle BUSIF0-7 via SSIU remove the no longer needed "rxu" and "txu" properties. Based on similar work from Kuninori Morimoto and Simon Horman in commits 8d14bfa074db ("arm64: dts: renesas: r8a7796: add SSIU support for sound") and 10bd03fa896e ("arm64: dts: renesas: r8a7796: remove BUSIF0 settings from rcar_sound,ssi"). Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-07-29arm64: dts: renesas: r8a774a1: Use extended audio dmac registersFabrizio Castro1-1/+1
Basic audio dmac register only supports busif from 0 to 3, in order to use busif4 ~ busif7 extended audio dmac registers need to be used. Based on similar work from Jiada Wang in commit 7a516e49d975 ("arm64: dts: renesas: use extended audio dmac register"). Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-07-29arm64: dts: renesas: r8a774a1: Add CANFD supportFabrizio Castro1-0/+25
Add CANFD support to the SoC specific dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-07-29arm64: dts: renesas: r8a774a1: Add missing assigned-clocks for CAN[01]Fabrizio Castro1-0/+4
Define "assigned-clocks" and "assigned-clock-rates" properties for CAN[01] DT nodes, as required by the dt-bindings. Fixes: eccc40002972c424 ("arm64: dts: renesas: r8a774a1: Add clkp2 clock to CAN nodes") Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-06-19arm64: dts: renesas: r8a774a1: Add HDMI encoder instanceFabrizio Castro1-0/+32
Add the HDMI encoder to the R8A774A1 DT in disabled state. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-18arm64: dts: renesas: r8a774a1: Add dynamic power coefficientBiju Das1-0/+2
Describe the dynamic power coefficient of A57 and A53 CPUs. Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-18arm64: dts: renesas: r8a774a1: Create thermal zone to support IPABiju Das1-1/+24
Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. Based on work by Dien Pham <dien.pham.ry@renesas.com> for r8a7796 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-18arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhzBiju Das1-0/+6
Set the capacity-dmips-mhz for RZ/G2M(r8a774a1) SoC, that is based on dhrystone. Based on work done by Gaku Inami <gaku.inami.xw@bp.renesas.com> for r8a7796 SoC. The average dhrystone result for 5 iterations is as below: r8a774a1 SoC (CA57x2 + CA53x4) CPU max-freq dhrystone --------------------------------- CA57 1500 MHz 11428571 lps/s CA53 1200 MHz 5000000 lps/s From this, CPU capacity-dmips-mhz for CA57 and CA53 are calculated as follows: r8a774a1 SoC CA57 : 1024 / (11428571 / 1500) * (11428571 / 1500) = 1024 CA53 : 1024 / (11428571 / 1500) * ( 5000000 / 1200) = 560 Since each CPUs have different max frequencies, the final CPU capacities of A53 scaled by the above difference is as below $ cat /sys/devices/system/cpu/cpu*/cpu_capacity 1024 1024 448 448 448 448 Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-18arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoCBiju Das1-0/+26
This patch adds the "cpu-map" into r8a774a1 composed of multi-cluster. This definition is used to parse the cpu topology. Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> for r8a7796 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-17arm64: dts: renesas: r8a774a1: Fix USB 2.0 clocksFabrizio Castro1-8/+8
Similarly to what done for the r8a7796 with commit 737e05bf034e ("arm64: dts: renesas: revise properties for R-Car Gen3 SoCs' usb 2.0"), this patch lists the clock for the USB High-Speed Module (HS-USB) with the USB2.0 Host (EHCI/OHCI) IP DT node, and it lists the clock for the USB2.0 Host IP with the HS-USB module DT node. Fixes: 4c2c2fb99876 ("arm64: dts: renesas: r8a774a1: Add USB2.0 phy and host(EHCI/OHCI) device nodes") Fixes: ed898d4fc19d ("arm64: dts: renesas: r8a774a1: Add USB-DMAC and HSUSB device nodes") Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-12arm64: dts: renesas: r8a774a1: Add TMU device nodesFabrizio Castro1-0/+65
This patch adds TMU[01234] device tree nodes to the r8a774a1 SoC specific DT. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-12arm64: dts: renesas: r8a774a1: Add CMT device nodesFabrizio Castro1-0/+70
This patch adds the CMT[0123] device tree nodes to the r8a774a1 SoC specific DT. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-12arm64: dts: renesas: r8a774a1: Add PCIe device nodesBiju Das1-0/+54
This patch adds PCIe{0,1} device nodes for R8A774A1 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-06arm64: dts: renesas: r8a774a1: Add operating pointsFabrizio Castro1-0/+48
The RZ/G2M (a.k.a. r8a774a1) comes with two clusters of processors, similarly to the r8a7796. The first cluster is made of A57s, the second cluster is made of A53s. The operating points for the cluster with the A57s are: Frequency | Voltage -----------|--------- 500 MHz | 0.82V 1.0 GHz | 0.82V 1.5 GHz | 0.82V The operating points for the cluster with the A53s are: Frequency | Voltage -----------|--------- 800 MHz | 0.82V 1.0 GHz | 0.82V 1.2 GHz | 0.82V This patch adds the definitions for the operating points to the SoC specific DT. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-06arm64: dts: renesas: Revise usb2_phy nodes and phys propertiesYoshihiro Shimoda1-7/+7
Since the commit 233da2c9ec22 ("dt-bindings: phy: rcar-gen3-phy-usb2: Revise #phy-cells property") revised the #phy-cells, this patch follows the updated document for R-Car Gen3 and RZ/A2 SoCs. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20arm64: dts: renesas: r8a774a1: Connect Ethernet-AVB to IPMMU-DS0Biju Das1-0/+1
Add IPMMU-DS0 to the Ethernet-AVB device node. Based on work by Magnus Damm for the r8a7795. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20arm64: dts: renesas: r8a774a1: Tie Audio-DMAC to IPMMU-MPBiju Das1-0/+16
Hook up r8a774a1 Audio-DMAC nodes to the IPMMU-MP. Based on work for the r8a7795 by Magnus Damm. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20arm64: dts: renesas: r8a774a1: Tie SYS-DMAC to IPMMU-DS0/1Biju Das1-0/+24
Hook up r8a774a1 DMAC nodes to the IPMMUs. In particular SYS-DMAC0 gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1. Based on work for the r8a7796 by Magnus Damm. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20arm64: dts: renesas: r8a774a1: Add FDP1 instanceBiju Das1-0/+10
The r8a774a1 has a single FDP1 instance similar to r8a7796. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20arm64: dts: renesas: r8a774a1: Add DU device to DTBiju Das1-0/+63
Add the DU device to r8a774a1.dtsi in a disabled state. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-05-20arm64: dts: renesas: r8a774a1: Add VSP instancesBiju Das1-0/+55
The r8a774a1 soc has 5 VSP instances similar to r8a7796. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-31 20:36:41 +0300