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2024-05-07Merge tag 'mvebu-dt64-6.10-1' of ↵Arnd Bergmann8-67/+88
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt mvebu dt64 for 6.10 (part 1) Few dts fix for dt validation * tag 'mvebu-dt64-6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: dts: marvell: espressobin-ultra: fix Ethernet Switch unit address arm64: dts: marvell: turris-mox: drop unneeded flash address/size-cells arm64: dts: marvell: eDPU: drop redundant address/size-cells arm64: dts: marvell: cn9130-crb: drop unneeded "status" arm64: dts: marvell: cn9130-crb: drop wrong unit-addresses arm64: dts: marvell: cn9130-db: drop wrong unit-addresses arm64: dts: marvell: cn9131-db: drop unneeded flash address/size-cells arm64: dts: marvell: cn9130-db: drop unneeded flash address/size-cells arm64: dts: marvell: ap80x: fix IOMMU unit address Link: https://lore.kernel.org/r/87jzk8ndyy.fsf@BLaptop.bootlin.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-05-05arm64: dts: marvell: espressobin-ultra: fix Ethernet Switch unit addressKrzysztof Kozlowski1-34/+64
The Espressobin Ultra DTS includes Espressobin DTSI which defines ethernet-switch@1 node. The Ultra DTS overrides "reg" to 3, but that leaves still old unit address which conflicts with the new phy@1 node (W=1 dtc warning): armada-3720-espressobin.dtsi:148.29-203.4: Warning (unique_unit_address_if_enabled): /soc/internal-regs@d0000000/mdio@32004/ethernet-switch@1: duplicate unit-address (also used in node /soc/internal-regs@d0000000/mdio@32004/ethernet-phy@1) Fix this by deleting ethernet-switch@1 node and merging original node with code from Ultra DTS into new ethernet-switch@3. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-05-05arm64: dts: marvell: turris-mox: drop unneeded flash address/size-cellsKrzysztof Kozlowski1-2/+0
Flash node uses single "partition" node to describe partitions, so remove deprecated address/size-cells properties to also fix dtc W=1 warnings: armada-3720-turris-mox.dts:218.10-255.4: Warning (avoid_unnecessary_addr_size): /soc/internal-regs@d0000000/spi@10600/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Marek Behún <kabel@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-05-05arm64: dts: marvell: eDPU: drop redundant address/size-cellsKrzysztof Kozlowski1-2/+0
The ethernet-switch node does not have children with unit addresses, so address/size-cells are not really correct, as reported by dtc W=1 warning: armada-3720-eDPU.dts:26.19-60.4: Warning (avoid_unnecessary_addr_size): /soc/internal-regs@d0000000/mdio@32004/switch@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property This probably also fixes dtbs_check warning, but I could not find it, so not sure about that. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-04-29arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usageRob Herring2-2/+2
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily, it doesn't provide any detail on uarch specific events. There's still remaining cases for CPUs without any corresponding PMU definition and for big.LITTLE systems which only have a single PMU node (there should be one per core type). Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Bjorn Andersson <andersson@kernel.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Acked-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-02arm64: dts: marvell: cn9130-crb: drop unneeded "status"Krzysztof Kozlowski1-1/+0
Devices are enabled by default. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-04-02arm64: dts: marvell: cn9130-crb: drop wrong unit-addressesKrzysztof Kozlowski1-6/+6
Top-level nodes, not being on MMIO bus, do not have "reg" properties and should not have unit addresses. Correct their name as well to match "Generic node names" recommendation from Devicetree specification. This also fixes dtc W=1 warnings: cn9130-crb.dtsi:29.35-37.4: Warning (unit_address_vs_reg): /ap0_mmc_vccq@0: node has a unit name, but no reg or ranges property cn9130-crb.dtsi:39.38-46.4: Warning (unit_address_vs_reg): /cp0_usb3_vbus@1: node has a unit name, but no reg or ranges property cn9130-crb.dtsi:57.33-65.4: Warning (unit_address_vs_reg): /cp0_sd_vccq@0: node has a unit name, but no reg or ranges property cn9130-crb.dtsi:67.31-75.4: Warning (unit_address_vs_reg): /cp0_sd_vcc@0: node has a unit name, but no reg or ranges property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-04-02arm64: dts: marvell: cn9130-db: drop wrong unit-addressesKrzysztof Kozlowski3-17/+17
Top-level nodes, not being on MMIO bus, do not have "reg" properties and should not have unit addresses. Correct their name as well to match "Generic node names" recommendation from Devicetree specification. This also fixes dtc W=1 warnings: cn9130-db.dtsi:28.11-31.4: Warning (unique_unit_address_if_enabled): /memory@0: duplicate unit-address (also used in node /ap0_sd_vccq@0) cn9130-db.dtsi:28.11-31.4: Warning (unique_unit_address_if_enabled): /memory@0: duplicate unit-address (also used in node /cp0_usb3_vbus@0) cn9130-db.dtsi:33.33-40.4: Warning (unique_unit_address_if_enabled): /ap0_sd_vccq@0: duplicate unit-address (also used in node /cp0_usb3_vbus@0) cn9130-db.dtsi:28.11-31.4: Warning (unique_unit_address_if_enabled): /memory@0: duplicate unit-address (also used in node /cp0_usb3_phy@0) cn9130-db.dtsi:33.33-40.4: Warning (unit_address_vs_reg): /ap0_sd_vccq@0: node has a unit name, but no reg or ranges property cn9130-db.dtsi:42.38-49.4: Warning (unit_address_vs_reg): /cp0_usb3_vbus@0: node has a unit name, but no reg or ranges property cn9130-db.dtsi:51.34-54.4: Warning (unit_address_vs_reg): /cp0_usb3_phy@0: node has a unit name, but no reg or ranges property cn9130-db.dtsi:56.38-63.4: Warning (unit_address_vs_reg): /cp0_usb3_vbus@1: node has a unit name, but no reg or ranges property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-04-02arm64: dts: marvell: cn9131-db: drop unneeded flash address/size-cellsKrzysztof Kozlowski1-2/+0
Flash node uses single "partition" node to describe partitions, so remove deprecated address/size-cells properties to also fix dtc W=1 warnings: cn9131-db.dtsi:140.10-163.4: Warning (avoid_unnecessary_addr_size): /cp1/config-space@f4000000/spi@700680/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-04-02arm64: dts: marvell: cn9130-db: drop unneeded flash address/size-cellsKrzysztof Kozlowski1-2/+0
Flash node uses single "partition" node to describe partitions, so remove deprecated address/size-cells properties to also fix dtc W=1 warnings: cn9130-db.dtsi:313.10-336.4: Warning (avoid_unnecessary_addr_size): /cp0/config-space@f2000000/spi@700680/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-04-02arm64: dts: marvell: ap80x: fix IOMMU unit addressKrzysztof Kozlowski1-1/+1
Correct the IOMMU device node unit address to match "reg" and fix dtc W=1 warnings: armada-ap80x.dtsi:64.24-80.6: Warning (simple_bus_reg): /ap807/config-space@f0000000/iommu@5000000: simple-bus unit address format error, expected "100000" Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-03-04Merge tag 'mvebu-dt64-6.9-1' of ↵Arnd Bergmann5-11/+47
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt mvebu dt64 for 6.9 (part 1) Add mmc support for AC5 Reorder crypto interrupts on Armada 3720 Use the correct thermal coefficients for the Armada AP807 dies * tag 'mvebu-dt64-6.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: dts: armada-ap807: update thermal compatible arm64: dts: marvell: reorder crypto interrupts on Armada SoCs arm64: dts: ac5: add mmc node and clock Link: https://lore.kernel.org/r/87a5nihr8g.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-02-27arm64: dts: armada-ap807: update thermal compatibleAlex Leibovich1-0/+3
Use the correct thermal coefficients for the Armada AP807 dies. Signed-off-by: Alex Leibovich <alexl@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Tested-by: Stefan Chulski <stefanc@marvell.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Stefan Eichenberger <eichest@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-02-27arm64: dts: marvell: reorder crypto interrupts on Armada SoCsRafał Miłecki2-10/+10
Match order specified in binding documentation. It says "mem" should be the last interrupt. This fixes: arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:0: 'ring0' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:1: 'ring1' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:2: 'ring2' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:3: 'ring3' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:4: 'eip' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:5: 'mem' was expected from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-02-27arm64: dts: ac5: add mmc node and clockElad Nachman2-1/+34
Add mmc and mmc clock nodes to ac5 and ac5x device tree files Signed-off-by: Elad Nachman <enachman@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-02-20arm64: dts: Fix dtc interrupt_provider warningsRob Herring1-1/+0
The dtc interrupt_provider warning is off by default. Fix all the warnings so it can be enabled. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> # Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom Acked-by: Chanho Min <chanho.min@lge.com> Link: https://lore.kernel.org/r/20240213-arm-dt-cleanups-v1-3-f2dee1292525@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-12-15arm64: dts: cn913x: add device trees for COM Express boardsElad Nachman5-0/+283
Add support for CN9130 and CN9131 COM Express Type 7 CPU module boards by Marvell. Define these COM Express CPU modules as dtsi and provide a dtsi file for a carrier board (Marvell AC5X RD COM Express type 7 carrier board). This Carrier board only utilizes the PCIe link, hence no special device / driver support is provided by this dtsi file. Finally, provide a dts file for the com express carrier and CPU module combination. These COM Express boards differ from the existing CN913x DB boards by the type of ethernet connection (RGMII), the type of voltage regulators (not i2c expander based) and the USB phy (not UTMI based). Note - PHY + RGMII connector is OOB on CPU module. CN9131 COM Express board is basically CN9130 COM Express board with an additional CP115 I/O co-processor, which in this case provides an additional USB host controller on the board. Signed-off-by: Elad Nachman <enachman@marvell.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-12-15arm64: dts: armada-3720-turris-mox: set irq type for RTCSjoerd Simons1-1/+1
The rtc on the mox shares its interrupt line with the moxtet bus. Set the interrupt type to be consistent between both devices. This ensures correct setup of the interrupt line regardless of probing order. Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Cc: <stable@vger.kernel.org> # v6.2+ Fixes: 21aad8ba615e ("arm64: dts: armada-3720-turris-mox: Add missing interrupt for RTC") Reviewed-by: Marek Behún <kabel@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-12-15ARM64: dts: Add special compatibles for the Turris MoxLinus Walleij1-6/+6
These special compatibles are added to the Marvell Armada 3720 Turris Mox in order to be able to special-case and avoid warnings on the non-standard nodenames that are ABI on this one board due to being used in deployed versions of U-Boot. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-12-15ARM64: dts: marvell: Fix some common switch mistakesLinus Walleij7-112/+115
Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be ethernet-switch@0. - ports should be ethernet-ports - port@0 should be ethernet-port@0 - PHYs should be named ethernet-phy@ Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-11-02Merge tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds5-10/+57
Pull SoC DT updates from Arnd Bergmann: "There are a couple new SoCs that are supported for the first time: - AMD Pensando Elba is a data processing unit based on Cortex-A72 CPU cores - Sophgo makes RISC-V based chips, and we now support the CV1800B chip used in the milkv-duo board and the massive sg2042 chip in the milkv-pioneer, a 64-core developer workstation. - Qualcomm Snapdragon 720G (sm7125) is a close relative of Snapdragon 7c and gets added with some Xiaomi phones - Renesas gains support for the R8A779F4 (R-Car S4-8) automotive SoC and the RZ/G3S (R9A08G045) embedded SoC. There are also a bunch of newly supported machines that use already supported chips. On the 32-bit side, we have: - USRobotics USR8200 is a NAS/Firewall/router based on the ancient Intel IXP4xx platform - A couple of machines based on the NXP i.MX5 and i.MX6 platforms - One machine each for Allwinner V3s, Aspeed AST2600, Microchip sama5d29 and ST STM32mp157 The other ones all use arm64 cores on chips from allwinner, amlogic, freescale, mediatek, qualcomm and rockchip" * tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (641 commits) ARM: dts: BCM5301X: Set switch ports for Linksys EA9200 ARM: dts: BCM5301X: Set fixed-link for extra Netgear R8000 CPU ports ARM: dts: BCM5301X: Explicitly disable unused switch CPU ports ARM: dts: BCM5301X: Relicense Vivek's code to the GPL 2.0+ / MIT ARM: dts: BCM5301X: Relicense Felix's code to the GPL 2.0+ / MIT ARM: dts: BCM5301X: Set MAC address for Asus RT-AC87U arm64: dts: socionext: add missing cache properties riscv: dts: thead: convert isa detection to new properties arm64: dts: Update cache properties for socionext arm64: dts: ti: k3-am654-idk: Add ICSSG Ethernet ports arm64: dts: ti: k3-am654-icssg2: add ICSSG2 Ethernet support arm64: dts: ti: k3-am65-main: Add ICSSG IEP nodes arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM arm64: dts: ti: k3-am62p: Add nodes for more IPs arm64: dts: rockchip: Add Turing RK1 SoM support dt-bindings: arm: rockchip: Add Turing RK1 dt-bindings: vendor-prefixes: add turing arm64: dts: rockchip: Add DFI to rk3588s arm64: dts: rockchip: Add DFI to rk356x arm64: dts: rockchip: Always enable DFI on rk3399 ...
2023-10-25Revert "Merge branch 'mv88e6xxx-dsa-bindings'"Jakub Kicinski7-164/+167
This reverts the following commits: commit 53313ed25ba8 ("dt-bindings: marvell: Add Marvell MV88E6060 DSA schema") commit 0f35369b4efe ("dt-bindings: marvell: Rewrite MV88E6xxx in schema") commit 605a5f5d406d ("ARM64: dts: marvell: Fix some common switch mistakes") commit bfedd8423643 ("ARM: dts: nxp: Fix some common switch mistakes") commit 2b83557a588f ("ARM: dts: marvell: Fix some common switch mistakes") commit ddae07ce9bb3 ("dt-bindings: net: mvusb: Fix up DSA example") commit b5ef61718ad7 ("dt-bindings: net: dsa: Require ports or ethernet-ports") As repoted by Vladimir, it breaks boot on the Turris MOX board. Link: https://lore.kernel.org/all/20231025093632.fb2qdtunzaznd73z@skbuf/ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-10-25ARM64: dts: marvell: Fix some common switch mistakesLinus Walleij7-167/+164
Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be ethernet-switch@0. - ports should be ethernet-ports - port@0 should be ethernet-port@0 - PHYs should be named ethernet-phy@ Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-10-24net: dsa: Use conduit and user termsFlorian Fainelli1-1/+1
Use more inclusive terms throughout the DSA subsystem by moving away from "master" which is replaced by "conduit" and "slave" which is replaced by "user". No functional changes. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Hemminger <stephen@networkplumber.org> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20231023181729.1191071-2-florian.fainelli@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-10-23Merge tag 'mvebu-dt64-6.7-1' of ↵Arnd Bergmann4-8/+55
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt mvebu dt64 for 6.7 (part 1) Declare switch on eDPU (Armada 3720 based) Use proper suffix -gpios for SFP GPIO properties on uDPU (Armada 3720 based) Use appropriate label for spi1 pins on cn9310 boards * tag 'mvebu-dt64-6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: dts: marvell: eDPU: add support for version with external switch arm64: dts: marvell: uDPU: rename the SFP GPIO properties ARM64: dts: marvell: cn9310: Use appropriate label for spi1 pins Link: https://lore.kernel.org/r/8734y6aaqb.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-09-24arm64: dts: marvell: minor whitespace cleanup around '='Krzysztof Kozlowski1-2/+2
The DTS code coding style expects exactly one space before and after '=' sign. Link: https://lore.kernel.org/r/20230702185301.44505-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-20arm64: dts: marvell: eDPU: add support for version with external switchRobert Marko1-0/+47
New revision of eDPU uses an Marvell MV88E6361 switch to connect the SFP cage and G.hn IC instead of connecting them directly to the ethernet controllers. U-Boot will enable the switch node and disable the unused ethernet controller. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-09-20arm64: dts: marvell: uDPU: rename the SFP GPIO propertiesRobert Marko1-4/+4
Rename the GPIO related SFP properties to include the preffered -gpios suffix as defined in the SFP schema. This fixes the following warning: arch/arm64/boot/dts/marvell/armada-3720-eDPU.dtb: sfp-eth1: 'los-gpio', 'mod-def0-gpio', 'tx-disable-gpio', 'tx-fault-gpio' do not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/net/sff,sfp.yaml# Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-09-20ARM64: dts: marvell: cn9310: Use appropriate label for spi1 pinsChris Packham2-4/+4
Both the CN9130-CRB and CN9130-DB use the SPI1 interface but had the pinctrl node labelled as "cp0_spi0_pins". Use the label "cp0_spi1_pins" and update the node name to "cp0-spi-pins-1" to avoid confusion with the pinctrl options for SPI0. Fixes: 4c43a41e5b8c ("arm64: dts: cn913x: add device trees for topology B boards") Fixes: 5c0ee54723f3 ("arm64: dts: add support for Marvell cn9130-crb platform") Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-07-13arm64: dts: marvell: Add NAND flash controller to AC5Chris Packham1-0/+16
The AC5/AC5X SoC has a NAND flash controller (NFC). Add this to the base SoC dtsi file as a disabled node. The NFC integration on the AC5/AC5X only supports SDR timing modes up to 3 so requires a dedicated compatible property so this limitation can be enforced. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-07-13arm64: dts: marvell: add missing space before {Krzysztof Kozlowski2-3/+3
Add missing whitespace between node name/label and opening {. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-06-16arm64: dts: marvell: Fix espressobin-ultra boot failure and wifiBen Schneider1-0/+3
Boot hangs on EspressoBIN Ultra (Armada 3720) after a message that device vcc_sd1 had been disabled. The device manufacturer patched this issue in their kernel fork noting that vcc_sd1 is used by the EspressoBIN model but not the EspressoBIN Ultra. Removing the device from the tree fixes the boot hang and wifi. Signed-off-by: Ben Schneider <ben@bens.haus> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-06-16arm64: dts: marvell: Fix pca954x i2c-mux node namesGeert Uytterhoeven2-2/+2
"make dtbs_check": arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtb: i2c-switch@70: $nodename:0: 'i2c-switch@70' does not match '^(i2c-?)?mux' From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtb: i2c-switch@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2' were unexpected) From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml ... Fix this by renaming PCA954x nodes to "i2c-mux", to match the I2C bus multiplexer/switch DT bindings and the Generic Names Recommendation in the Devicetree Specification. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-06-16arm64: dts: marvell: cp11x: Fix nand_controller node name according to YAMLVadym Kochan1-1/+1
Marvell NAND controller has now YAML to validate it's DT bindings, so change the node name of cp11x DTSI as it is required by nand-controller.yaml Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-05-17arm64: dts: marvell: add missing cache propertiesKrzysztof Kozlowski4-0/+6
As all level 2 and level 3 caches are unified, add required cache-unified properties to fix warnings like: ac5-98dx35xx-rd.dtb: l2-cache: 'cache-unified' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-18Merge tag 'mvebu-dt64-6.4-1' of ↵Arnd Bergmann6-7/+249
git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt mvebu dt64 for 6.4 (part 1) Enlarge PCI memory window on Machiatobin (Armada 7040 based) Add supoport for the GL.iNet GL-MV1000 (Armada 3700 based) Add missing phy-mode on the cn9310 Align thermal node names with bindings * tag 'mvebu-dt64-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM64: dts: marvell: cn9310: Add missing phy-mode arm64: dts: marvell: add DTS for GL.iNet GL-MV1000 arm64: dts: marvell: align thermal node names with bindings arm64: dts: marvell: mochabin: enlarge PCI memory window Link: https://lore.kernel.org/r/87bkjlzfcw.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-07ARM64: dts: marvell: cn9310: Add missing phy-modeAndrew Lunn1-1/+2
The DSA framework has got more picky about always having a phy-mode for the CPU port. The SoC Ethernet is being configured to 10gbase-r. Set the switch phy-mode based on this. Additionally, the SoC Ethernet is using in-band signalling to determine the link speed, so add same parameter to the switch. Additionally, the cpu label has never actually been used in the binding, so remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-07arm64: dts: marvell: add DTS for GL.iNet GL-MV1000Enrico Mioso2-0/+240
The GL-MV1000 (Brume) is a small form-factor gateway router. It is based on the Marvell Armada 88F3720 SOC (1GHz), has 3 gigabit ethernet ports, 1 GB RAM, 16M SPI flash, 8GB eMMC and an uSD slot, as well as an USB 2.0 type A and an USB 3.0 type C port. Signed-off-by: Enrico Mioso <mrkiko.rs@gmail.com> CC: Pali <pali@kernel.org> Reviewed-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-07arm64: dts: marvell: align thermal node names with bindingsKrzysztof Kozlowski2-6/+6
Bindings expect thermal node names to end with '-thermal': armada-8040-db.dtb: thermal-zones: 'ap-thermal-cpu0', ... do not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-07arm64: dts: marvell: mochabin: enlarge PCI memory windowRobert Marko1-0/+1
Armada 7040 uses a rather small 15MB memory window for every PCI adapter, however this is not sufficient for Qualcomm QCA6390 802.11ax cards that are shipped along with the OpenWrt WLAN model of MOCHAbin as ath11k requires at least 16MB of memory. So, similar to what MACCHIATOBin has been doing for years, lets move to using the second PCIe 2 memory window and expand it to 128MB to make it future proof. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-03-14arm64: dts: marvell: armada-ap810: Fix GICv3 ITS node nameRob Herring1-1/+1
The GICv3 ITS is an MSI controller, therefore its node name should be 'msi-controller'. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230207234735.201812-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-02-21Merge tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds8-8/+8
Pull SoC DT updates from Arnd Bergmann: "About a quarter of the changes are for 32-bit arm, mostly filling in device support for existing machines and adding minor cleanups, mostly for Qualcomm and Samsung based machines. Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from Rockchips that have been around for a while but were lacking kernel support so far: RV1126 is a Vision SoC with an NPU and is used in the Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design for TV boxes and so far only comes with a dts for its refernece design. The other 32-bit boards that were added are two ASpeed AST2600 based BMC boards, the Microchip sam9x60_curiosity development board (Armv5 based!), the Enclustra PE1 FPGA-SoM baseboard, and a few more boards for i.MX53 and i.MX6ULL. On the RISC-V side, there are fewer patches, but a total of ten new single-board computers based on variations of the Allwinner D1/T113 chip, plus one more board based on Microchip Polarfire. As usual, arm64 has by far the most changes here, with over 700 non-merge changesets, among them over 400 alone for Qualcomm. The newly added SoCs this time are all recent high-end embedded SoCs for various markets, each on comes with support for its reference board: - Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones - Qualcomm QDU1000/QRU1000 5G RAN platform - Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs - TI J784S4 for industrial and automotive applications In total, there are 46 new arm64 machines: - Reference platforms for each of the five new SoCs - Three Amlogic based development boards - Six embedded machines based on NXP i.MX8MM and i.MX8MP - The Mediatek mt7986a based Banana Pi R3 router - Six tablets based on Qualcomm MSM8916 (Snapdragon 410), SM6115 (Snapdragon 662) and SM8250 (Snapdragon 865) - Two LTE dongles, also based on MSM8916 - Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610), SDM450 and SDM632 - Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c) - Nine development boards based on Rockchips RK3588, RK3568, RK3566 and RK3328. - Five development machines based on TI K3 (AM642/AM654/AM68/AM69) The cleanup of dtc warnings continues across all platforms, adding to the total number of changes" * tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1035 commits) dt-bindings: riscv: correct starfive visionfive 2 compatibles ARM: dts: socfpga: Add enclustra PE1 devicetree dt-bindings: altera: Add enclustra mercury PE1 arm64: dts: qcom: msm8996: align RPM G-Link clock-controller node with bindings arm64: dts: qcom: qcs404: align RPM G-Link node with bindings arm64: dts: qcom: ipq6018: align RPM G-Link node with bindings arm64: dts: qcom: sm8550: remove invalid interconnect property from cryptobam arm64: dts: qcom: sc7280: Adjust zombie PWM frequency arm64: dts: qcom: sc8280xp-pmics: Specify interrupt parent explicitly arm64: dts: qcom: sm7225-fairphone-fp4: enable remaining i2c busses arm64: dts: qcom: sm7225-fairphone-fp4: move status property down arm64: dts: qcom: pmk8350: Use the correct PON compatible arm64: dts: qcom: sc8280xp-x13s: Enable external display arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks arm64: dts: qcom: sm8350-hdk: enable GPU arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes arm64: dts: qcom: sm8350: finish reordering nodes arm64: dts: qcom: sm8350: move more nodes to correct place arm64: dts: qcom: sm8350: reorder device nodes ...
2023-02-01arm64: dts: marvell: Fix compatible strings for Armada 3720 boardsPali Rohár8-8/+8
All Armada 3720 boards have Armada 3720 processor which is of Armada 3700 family and do not have Armada 3710 processor. So none of them should have compatible string for Armada 3710 processor. Fix compatible string for all these boards by removing wrong processor string "marvell,armada3710" and adding family string "marvell,armada3700" as the last one. (Note that this is same way how are defined Armada 3710 DTS files). [gclement: fix conflict for v6.2] Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-01-10arm64: dts: marvell: AC5/AC5X: Fix address for UART1Chris Packham1-1/+1
The correct address offset is 0x12100. Fixes: 31be791e26cf ("arm64: dts: marvell: Add UART1-3 for AC5/AC5X") Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-12-14Merge tag 'net-next-6.2' of ↵Linus Torvalds1-6/+11
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Paolo Abeni: "Core: - Allow live renaming when an interface is up - Add retpoline wrappers for tc, improving considerably the performances of complex queue discipline configurations - Add inet drop monitor support - A few GRO performance improvements - Add infrastructure for atomic dev stats, addressing long standing data races - De-duplicate common code between OVS and conntrack offloading infrastructure - A bunch of UBSAN_BOUNDS/FORTIFY_SOURCE improvements - Netfilter: introduce packet parser for tunneled packets - Replace IPVS timer-based estimators with kthreads to scale up the workload with the number of available CPUs - Add the helper support for connection-tracking OVS offload BPF: - Support for user defined BPF objects: the use case is to allocate own objects, build own object hierarchies and use the building blocks to build own data structures flexibly, for example, linked lists in BPF - Make cgroup local storage available to non-cgroup attached BPF programs - Avoid unnecessary deadlock detection and failures wrt BPF task storage helpers - A relevant bunch of BPF verifier fixes and improvements - Veristat tool improvements to support custom filtering, sorting, and replay of results - Add LLVM disassembler as default library for dumping JITed code - Lots of new BPF documentation for various BPF maps - Add bpf_rcu_read_{,un}lock() support for sleepable programs - Add RCU grace period chaining to BPF to wait for the completion of access from both sleepable and non-sleepable BPF programs - Add support storing struct task_struct objects as kptrs in maps - Improve helper UAPI by explicitly defining BPF_FUNC_xxx integer values - Add libbpf *_opts API-variants for bpf_*_get_fd_by_id() functions Protocols: - TCP: implement Protective Load Balancing across switch links - TCP: allow dynamically disabling TCP-MD5 static key, reverting back to fast[er]-path - UDP: Introduce optional per-netns hash lookup table - IPv6: simplify and cleanup sockets disposal - Netlink: support different type policies for each generic netlink operation - MPTCP: add MSG_FASTOPEN and FastOpen listener side support - MPTCP: add netlink notification support for listener sockets events - SCTP: add VRF support, allowing sctp sockets binding to VRF devices - Add bridging MAC Authentication Bypass (MAB) support - Extensions for Ethernet VPN bridging implementation to better support multicast scenarios - More work for Wi-Fi 7 support, comprising conversion of all the existing drivers to internal TX queue usage - IPSec: introduce a new offload type (packet offload) allowing complete header processing and crypto offloading - IPSec: extended ack support for more descriptive XFRM error reporting - RXRPC: increase SACK table size and move processing into a per-local endpoint kernel thread, reducing considerably the required locking - IEEE 802154: synchronous send frame and extended filtering support, initial support for scanning available 15.4 networks - Tun: bump the link speed from 10Mbps to 10Gbps - Tun/VirtioNet: implement UDP segmentation offload support Driver API: - PHY/SFP: improve power level switching between standard level 1 and the higher power levels - New API for netdev <-> devlink_port linkage - PTP: convert existing drivers to new frequency adjustment implementation - DSA: add support for rx offloading - Autoload DSA tagging driver when dynamically changing protocol - Add new PCP and APPTRUST attributes to Data Center Bridging - Add configuration support for 800Gbps link speed - Add devlink port function attribute to enable/disable RoCE and migratable - Extend devlink-rate to support strict prioriry and weighted fair queuing - Add devlink support to directly reading from region memory - New device tree helper to fetch MAC address from nvmem - New big TCP helper to simplify temporary header stripping New hardware / drivers: - Ethernet: - Marvel Octeon CNF95N and CN10KB Ethernet Switches - Marvel Prestera AC5X Ethernet Switch - WangXun 10 Gigabit NIC - Motorcomm yt8521 Gigabit Ethernet - Microchip ksz9563 Gigabit Ethernet Switch - Microsoft Azure Network Adapter - Linux Automation 10Base-T1L adapter - PHY: - Aquantia AQR112 and AQR412 - Motorcomm YT8531S - PTP: - Orolia ART-CARD - WiFi: - MediaTek Wi-Fi 7 (802.11be) devices - RealTek rtw8821cu, rtw8822bu, rtw8822cu and rtw8723du USB devices - Bluetooth: - Broadcom BCM4377/4378/4387 Bluetooth chipsets - Realtek RTL8852BE and RTL8723DS - Cypress.CYW4373A0 WiFi + Bluetooth combo device Drivers: - CAN: - gs_usb: bus error reporting support - kvaser_usb: listen only and bus error reporting support - Ethernet NICs: - Intel (100G): - extend action skbedit to RX queue mapping - implement devlink-rate support - support direct read from memory - nVidia/Mellanox (mlx5): - SW steering improvements, increasing rules update rate - Support for enhanced events compression - extend H/W offload packet manipulation capabilities - implement IPSec packet offload mode - nVidia/Mellanox (mlx4): - better big TCP support - Netronome Ethernet NICs (nfp): - IPsec offload support - add support for multicast filter - Broadcom: - RSS and PTP support improvements - AMD/SolarFlare: - netlink extened ack improvements - add basic flower matches to offload, and related stats - Virtual NICs: - ibmvnic: introduce affinity hint support - small / embedded: - FreeScale fec: add initial XDP support - Marvel mv643xx_eth: support MII/GMII/RGMII modes for Kirkwood - TI am65-cpsw: add suspend/resume support - Mediatek MT7986: add RX wireless wthernet dispatch support - Realtek 8169: enable GRO software interrupt coalescing per default - Ethernet high-speed switches: - Microchip (sparx5): - add support for Sparx5 TC/flower H/W offload via VCAP - Mellanox mlxsw: - add 802.1X and MAC Authentication Bypass offload support - add ip6gre support - Embedded Ethernet switches: - Mediatek (mtk_eth_soc): - improve PCS implementation, add DSA untag support - enable flow offload support - Renesas: - add rswitch R-Car Gen4 gPTP support - Microchip (lan966x): - add full XDP support - add TC H/W offload via VCAP - enable PTP on bridge interfaces - Microchip (ksz8): - add MTU support for KSZ8 series - Qualcomm 802.11ax WiFi (ath11k): - support configuring channel dwell time during scan - MediaTek WiFi (mt76): - enable Wireless Ethernet Dispatch (WED) offload support - add ack signal support - enable coredump support - remain_on_channel support - Intel WiFi (iwlwifi): - enable Wi-Fi 7 Extremely High Throughput (EHT) PHY capabilities - 320 MHz channels support - RealTek WiFi (rtw89): - new dynamic header firmware format support - wake-over-WLAN support" * tag 'net-next-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (2002 commits) ipvs: fix type warning in do_div() on 32 bit net: lan966x: Remove a useless test in lan966x_ptp_add_trap() net: ipa: add IPA v4.7 support dt-bindings: net: qcom,ipa: Add SM6350 compatible bnxt: Use generic HBH removal helper in tx path IPv6/GRO: generic helper to remove temporary HBH/jumbo header in driver selftests: forwarding: Add bridge MDB test selftests: forwarding: Rename bridge_mdb test bridge: mcast: Support replacement of MDB port group entries bridge: mcast: Allow user space to specify MDB entry routing protocol bridge: mcast: Allow user space to add (*, G) with a source list and filter mode bridge: mcast: Add support for (*, G) with a source list and filter mode bridge: mcast: Avoid arming group timer when (S, G) corresponds to a source bridge: mcast: Add a flag for user installed source entries bridge: mcast: Expose __br_multicast_del_group_src() bridge: mcast: Expose br_multicast_new_group_src() bridge: mcast: Add a centralized error path bridge: mcast: Place netlink policy before validation functions bridge: mcast: Split (*, G) and (S, G) addition into different functions bridge: mcast: Do not derive entry type from its filter mode ...
2022-11-28arm64: dts: marvell: add optee FW definitionsKonstantin Porotchkin2-0/+10
Add reserved memory and ARM firmware definitions for optee memory region in Marvell Armada SoCs to avoid protected memory access. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@bootlin.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28arm64: dts: Update cache properties for marvellPierre Gondois4-0/+6
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The recently added init_of_cache_level() function checks these properties. Add them if missing. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28arm64: dts: armada-3720-turris-mox: Add missing interrupt for RTCPali Rohár1-0/+3
MCP7940MT-I/MNY RTC has connected interrupt line to GPIO2_5. Fixes: 7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIePali Rohár1-0/+1
PCIe Slot Power Limit on Turris Mox is 10W. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-10-19arm64: dts: marvell: Update network description to match schemaMarcin Wojtas1-6/+11
Update the PP2 ethernet ports subnodes' names to match schema enforced by the marvell,pp2.yaml contents. Add new required properties ('reg') which contains information about the port ID, keeping 'port-id' ones for backward compatibility. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: David S. Miller <davem@davemloft.net>
generated by cgit v1.2.3 (git 2.39.0) at 2025-08-28 01:52:50 +0300