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2018-05-15arm64: dts: hisi: Enable Hisi LPC node for hip06John Garry1-0/+8
The patch enables the HiSi LPC node for hip06, with IPMI and UART child devices. Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-10-20arm64: dts: fix unit-address leading 0sRob Herring1-1/+1
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*' Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-11-15arm64: dts: hisi: disable sas0 and sas2 for d03John Garry1-8/+0
The SAS nodes sas0 and sas2 are not available on d03, so disable them. Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-08-24arm64: dts: hip06: Append sas nodeKefeng Wang1-0/+12
This patch adds sas and relevant nodes for Hip06 D03 board. Cc: Xiang Chen <chenxiang66@hisilicon.com> Cc: John Garry <john.garry@huawei.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-08-24arm64: dts: hip06: Append hns nodeKefeng Wang1-0/+16
There are four ports(2 GE, 2 XGE) in D03 board, append relevant nodes for them. Cc: Kejian Yan <yankejian@huawei.com> Cc: Yisen Zhuang <yisen.zhuang@huawei.com> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-04-27arm64: dts: Add initial dts for Hisilicon Hip06 D03 boardKefeng Wang1-0/+34
The Hip06 soc has same cpu topology compared with Hip05, four clusters and each cluster has quard Cortex-A57, but with different IO part, like HNS, SAS and PCI, they are all upgraded. There are also not same in ITS, MBIGEN and SMMU, etc. This patch adds the initial dts for hip06 d03 board. Note, there is no serial, because the soc use LPC uart, the serial node is not needed. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>