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2014-05-30ARM: l2c: add automatic enable of early BRESPRussell King1-3/+22
2014-05-30ARM: l2c: move L2 cache register saving to a more sensible locationRussell King1-12/+22
2014-05-30ARM: l2c: check that DT files specify the required "cache-unified" propertyRussell King1-0/+4
2014-05-30ARM: l2c: fix register namingRussell King1-28/+29
2014-05-30ARM: l2c: implement L2C-310 erratum 752271 in core L2C codeRussell King1-1/+17
2014-05-30ARM: l2c: provide generic hook to intercept writes to secure registersRussell King1-12/+30
2014-05-30ARM: l2c: move errata configuration options to arch/arm/mm/KconfigRussell King1-0/+51
2014-05-30ARM: l2c: move way size calculation data into l2c_init_dataRussell King1-9/+20
2014-05-30ARM: l2c: add decode for L2C-220 cache waysRussell King1-0/+1
2014-05-30ARM: l2c: move type string into l2c_init_data structureRussell King1-7/+13
2014-05-30ARM: l2c: remove obsolete l2x0 ops for non-OF initRussell King1-206/+0
2014-05-30ARM: l2c: convert Broadcom L2C-310 to new codeRussell King1-16/+11
2014-05-30ARM: l2c: add L2C-220 specific handlersRussell King1-10/+157
2014-05-30ARM: l2c: use L2C-210 handlers for L2C-310 errata-less implementationsRussell King1-22/+36
2014-05-30ARM: l2c: implement L2C-310 erratum 588369 as a method overrideRussell King1-0/+69
2014-05-30ARM: l2c: implement L2C-310 erratum 727915 as a method overrideRussell King1-0/+20
2014-05-30ARM: l2c: add L2C-210 specific handlersRussell King1-1/+122
2014-05-30ARM: l2c: move pl310_set_debug() into l2c-310 codeRussell King1-8/+6
2014-05-30ARM: l2c: simplify l2x0 unlocking codeRussell King1-17/+8
2014-05-30ARM: l2c: clean up save/resume functionsRussell King1-57/+52
2014-05-30ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OFRussell King1-74/+77
2014-05-30ARM: l2c: clean up L2 cache initialisation messagesRussell King1-3/+4
2014-05-30ARM: l2c: implement fixups for L2 cache controller quirks/errataRussell King1-11/+101
2014-05-30ARM: l2c: move aurora broadcast setup to enable functionRussell King1-13/+15
2014-05-30ARM: l2c: only write the auxiliary control register if requiredRussell King1-1/+3
2014-05-30ARM: l2c: write auxctrl register before unlockingRussell King1-5/+5
2014-05-30ARM: l2c: provide enable methodRussell King1-18/+62
2014-05-30ARM: l2c: group implementation specific code togetherRussell King1-251/+251
2014-05-30ARM: l2c: move l2c save function to __l2c_init()Russell King1-3/+7
2014-05-30ARM: l2c: pass iomem address into data->save functionRussell King1-16/+16
2014-05-30ARM: l2c: clean up OF initialisation a bitRussell King1-26/+40
2014-05-30ARM: l2c: add and use L2C revision constantsRussell King1-5/+5
2014-05-30ARM: l2c: rename cache_wait_way()Russell King1-3/+3
2014-05-30ARM: l2c: provide generic helper for way-based operationsRussell King1-6/+9
2014-05-30ARM: l2c: split out cache unlock codeRussell King1-7/+16
2014-05-30ARM: l2c: provide generic function for calling set_debug methodRussell King1-1/+11
2014-05-30ARM: l2c: rename OF specific things, making l2x0_of_data available to allRussell King1-32/+32
2014-05-30ARM: l2c: tidy up l2x0_of_data declarationsRussell King1-16/+14
2014-05-30ARM: l2c: add helper for L2 cache controller DT IDsRussell King1-13/+10
2014-05-30ARM: outer cache: add WARN_ON() to outer_disable()Russell King2-0/+21
2014-05-26ARM: 8043/1: uprobes need icache flush after xol writeVictor Kamensky1-5/+28
2014-05-26ARM: 8055/1: cacheflush: use -st dsb option for ensuring completionWill Deacon2-7/+7
2014-05-26ARM: 8046/1: proc: add support for the Cortex-A17 processorWill Deacon1-0/+11
2014-05-26ARM: 8048/1: fix v7-M setup stack locationRabin Vincent1-3/+5
2014-05-23Merge tag 'dt-dma-properties-for-arm' of git://git.kernel.org/pub/scm/linux/k...Russell King1-2/+2
2014-05-22ARM: dma-mapping: avoid calling dma_cache_maint_page() on dev=>cpuRussell King1-3/+4
2014-05-22ARM: use get_cr() rather than cr_alignmentRussell King1-1/+1
2014-05-22ARM: l2c: remove outer_inv_all() methodRussell King2-6/+0
2014-05-22arm: dma-mapping: add checking cma area initializedGioh Kim1-3/+3
2014-05-20arm: dma-iommu: Clean up redundant variableRitesh Harjani1-5/+6
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