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2011-07-24Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds57-2297/+838
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (237 commits) ARM: 7004/1: fix traps.h compile warnings ARM: 6998/2: kernel: use proper memory barriers for bitops ARM: 6997/1: ep93xx: increase NR_BANKS to 16 for support of 128MB RAM ARM: Fix build errors caused by adding generic macros ARM: CPU hotplug: ensure we migrate all IRQs off a downed CPU ARM: CPU hotplug: pass in proper affinity mask on IRQ migration ARM: GIC: avoid routing interrupts to offline CPUs ARM: CPU hotplug: fix abuse of irqdesc->node ARM: 6981/2: mmci: adjust calculation of f_min ARM: 7000/1: LPAE: Use long long printk format for displaying the pud ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanence ARM: ARM_DMA_ZONE_SIZE is no more ARM: mach-shark: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-sa1100: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-pxa: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-ixp4xx: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-h720x: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ...
2011-07-23Merge branch 'perf-core-for-linus' of ↵Linus Torvalds1-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (123 commits) perf: Remove the nmi parameter from the oprofile_perf backend x86, perf: Make copy_from_user_nmi() a library function perf: Remove perf_event_attr::type check x86, perf: P4 PMU - Fix typos in comments and style cleanup perf tools: Make test use the preset debugfs path perf tools: Add automated tests for events parsing perf tools: De-opt the parse_events function perf script: Fix display of IP address for non-callchain path perf tools: Fix endian conversion reading event attr from file header perf tools: Add missing 'node' alias to the hw_cache[] array perf probe: Support adding probes on offline kernel modules perf probe: Add probed module in front of function perf probe: Introduce debuginfo to encapsulate dwarf information perf-probe: Move dwarf library routines to dwarf-aux.{c, h} perf probe: Remove redundant dwarf functions perf probe: Move strtailcmp to string.c perf probe: Rename DIE_FIND_CB_FOUND to DIE_FIND_CB_END tracing/kprobe: Update symbol reference when loading module tracing/kprobes: Support module init function probing kprobes: Return -ENOENT if probe point doesn't exist ...
2011-07-23Merge branch 'devel-stable' into for-nextRussell King40-2045/+560
Conflicts: arch/arm/kernel/entry-armv.S
2011-07-23Merge branches 'btc', 'dma', 'entry', 'fixes', 'linker-layout', 'misc', ↵Russell King24-256/+308
'mmci', 'suspend' and 'vfp' into for-next
2011-07-21ARM: Fix build errors caused by adding generic macrosRussell King8-21/+5
Commit 66a625a (ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macros) introduced build errors when PM_SLEEP is not enabled. The per-CPU do_suspend/do_resume functions are defined via the preprocessor to constant 0. However, the macros which use these were converted to assembly, resulting in undefined references to these functions. Fix that by moving the ! ifdef section into proc-macros.S and deleting it from all effected proc-*.S files. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-19ARM: 7000/1: LPAE: Use long long printk format for displaying the pudCatalin Marinas1-1/+1
Currently using just long but this is not enough for the LPAE format (64-bit entries). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-19ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanenceRussell King3-12/+2
Kernel space needs very little in the way of BTC maintanence as most mappings which are created and destroyed are non-executable, and so could never enter the instruction stream. The case which does warrant BTC maintanence is when a module is loaded. This creates a new executable mapping, but at that point the pages have not been initialized with code and data, so at that point they contain unpredictable information. Invalidating the BTC at this stage serves little useful purpose. Before we execute module code, we call flush_icache_range(), which deals with the BTC maintanence requirements. This ensures that we have a BTC maintanence operation before we execute code via the newly created mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-19Merge branch 'dma' of http://git.linaro.org/git/people/nico/linux into ↵Russell King3-10/+57
devel-stable
2011-07-18ARM: ARM_DMA_ZONE_SIZE is no moreNicolas Pitre1-5/+0
One less dependency on mach/memory.h. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-18ARM: change ARM_DMA_ZONE_SIZE into a variableNicolas Pitre1-9/+16
Having this value defined at compile time prevents multiple machines with conflicting definitions to coexist. Move it to a variable in preparation for having a per machine value selected at run time. This is relevant only when CONFIG_ZONE_DMA is selected. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-15Merge branch 'kprobes-thumb' of git://git.yxit.co.uk/linux into devel-stableRussell King3-8/+20
2011-07-12ARM: dma: replace ISA_DMA_THRESHOLD with a variableRussell King3-3/+48
ISA_DMA_THRESHOLD has been unused by non-arch code, so lets now get rid of it from ARM by replacing it with arm_dma_zone_mask. Move dma_supported() and dma_set_mask() out of line, and have dma_supported() check this new variable instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-08ARM: 6995/2: mm: remove unnecessary cache flush on v6 copypageHeechul Yun1-1/+0
Originally introduced to maintain coherency between icache and dcache in v6 nonaliasing mode. This is now handled by __sync_icache_dcache since c0177800, therefore unnecessary in this function. Signed-off-by: Heechul Yun <heechul@illinois.edu> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-08ARM: 6996/1: mm: Poison freed init memoryStephen Boyd1-1/+16
Poisoning __init marked memory can be useful when tracking down obscure memory corruption bugs. Therefore, poison init memory with 0xe7fddef0 to catch bugs earlier. The poison value is an undefined instruction in ARM mode and branch to an undefined instruction in Thumb mode. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-08ARM: vmlinux.lds: move init sections between text and data sectionsRussell King1-2/+2
Place the init sections between the text and data sections. This means all code is grouped together at the beginning of the kernel image, and all data is at the end of the image. This avoids problems with the 24-bit branch instruction relocations becoming invalid with large initramfs images. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-07ARM: proc: add definition of cpu_reset for ARMv6 and ARMv7 coresWill Deacon2-0/+12
This patch adds simple definitions of cpu_reset for ARMv6 and ARMv7 cores, which disable the MMU via the SCTLR. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07ARM: proc: add proc info for Cortex-A15MP using classic page tablesWill Deacon1-2/+18
Multicore implementations of the Cortex-A15 require bit 6 of the auxiliary control register to be set in order for cache and TLB maintenance operations to be broadcast between CPUs. This patch adds a new proc_info structure for Cortex-A15, which enables the SMP bit during setup and includes the new HWCAP for integer division. Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07ARM: proc: add Cortex-A5 proc infoPawel Moll1-0/+11
This patch adds processor info for ARM Ltd. Cortex A5, which has SCU initialisation procedure identical to A9. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07ARM: proc: convert v7 proc infos into a common macroPawel Moll1-43/+24
As most of the proc info content is common across all v7 processors, this patch converts existing A9 and generic v7 descriptions into a macro (allowing extra flags in future). Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-07-07ARM: mm: tlb-v7: Use the new processor struct macrosDave Martin1-7/+2
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: tlb-v6: Use the new processor struct macrosDave Martin1-6/+2
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: tlb-v4wbi: Use the new processor struct macrosDave Martin1-6/+2
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: tlb-v4wb: Use the new processor struct macrosDave Martin1-6/+2
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: tlb-v4: Use the new processor struct macrosDave Martin1-6/+2
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: tlb-v3: Use the new processor struct macrosDave Martin1-6/+2
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: tlb-fa: Use the new processor struct macrosDave Martin1-6/+2
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-xscale: Use new generic struct definition macrosDave Martin1-431/+76
Without this patch, xscale_80200_A0_A1 is missing the icache_flush_all entry, which would result in the wrong functions being called at run-time. This patch re-uses xscale_icache_flush_all for xscale_80200_A0_A1_cache_fns. Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-xsc3: Use new generic struct definition macrosDave Martin1-73/+17
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-v7: Use the new processor struct macrosDave Martin1-26/+5
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-v6: Use the new processor struct macrosDave Martin1-29/+5
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-sa1100: Use the new processor struct macrosDave Martin1-67/+17
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-sa110: Use the new processor struct macrosDave Martin1-34/+5
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-mohawk: Use the new processor struct macrosDave Martin1-43/+18
This patch also defines a suitable flush_icache_all implementation which would otherwise be missing, resulting in a link failure. Thanks to Nicolas Pitre for suggesting the code for this. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-07ARM: mm: proc-feroceon: Use the new processor struct macrosDave Martin1-153/+49
Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-07ARM: mm: proc-fa526: Use the new processor struct macrosDave Martin1-33/+5
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm9tdmi: Use the new processor struct macrosDave Martin1-60/+18
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm946: Use the new processor struct macrosDave Martin1-46/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm940: Use the new processor struct macrosDave Martin1-44/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm926: Use the new processor struct macrosDave Martin1-44/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm925: Use the new processor struct macrosDave Martin1-72/+16
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm922: Use the new processor struct macrosDave Martin1-46/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm920: Use the new processor struct macrosDave Martin1-46/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm7tdmi: Use the new processor struct macrosDave Martin1-177/+39
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm740: Use the new processor struct macrosDave Martin1-35/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm720: Use the new processor struct macrosDave Martin1-68/+17
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm6_7: Use the new processor struct macrosDave Martin1-134/+32
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm1026: Use the new processor struct macrosDave Martin1-46/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm1022: Use the new processor struct macrosDave Martin1-45/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm1020e: Use the new processor struct macrosDave Martin1-45/+7
Signed-off-by: Dave Martin <dave.martin@linaro.org>
2011-07-07ARM: mm: proc-arm1020: Use the new processor struct macrosDave Martin1-39/+6
Signed-off-by: Dave Martin <dave.martin@linaro.org>
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