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path: root/arch/arm/mm/proc-v7.S
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2016-08-23ARM: 8599/1: mm: pull asm/memory.h explicitlyVladimir Murzin1-0/+1
2016-07-14ARM: 8560/1: errata: Workaround errata A12 825619 / A17 852421Doug Anderson1-0/+11
2016-07-14ARM: 8559/1: errata: Workaround erratum A12 821420Doug Anderson1-0/+5
2016-07-14ARM: 8558/1: errata: Workaround errata A12 818325/852422 A17 852423Doug Anderson1-0/+27
2016-04-02ARM: SMP enable of cache maintanence broadcastRussell King1-5/+5
2016-02-17ARM: make the physical-relative calculation more obviousRussell King1-1/+1
2016-02-16ARM: 8512/1: proc-v7.S: Adjust stack address when XIP_KERNELNicolas Pitre1-1/+1
2016-01-05Merge branches 'misc' and 'misc-rc6' into for-linusRussell King1-7/+16
2015-12-17ARM: 8453/2: proc-v7.S: don't locate temporary stack space in .text sectionNicolas Pitre1-7/+16
2015-12-15ARM: 8471/1: need to save/restore arm register(r11) when it is corruptedAnson Huang1-2/+2
2015-07-17ARM: invalidate L1 before enabling coherencyRussell King1-5/+9
2015-06-12Merge branch 'for-arm-soc' into for-nextRussell King1-1/+1
2015-06-02ARM: proc-v7: sanitise and document registers around errataRussell King1-30/+38
2015-06-02ARM: proc-v7: clean up MIDR accessRussell King1-5/+4
2015-06-02ARM: proc-v7: move CPU errata out of lineRussell King1-65/+78
2015-06-02ARM: redo TTBR setup code for LPAERussell King1-13/+13
2015-06-01ARM: v7 setup function should invalidate L1 cacheRussell King1-1/+1
2015-04-15ARM: proc-v7: avoid errata 430973 workaround for non-Cortex A8 CPUsRussell King1-0/+28
2015-03-28ARM: 8314/1: replace PROCINFO embedded branch with relative offsetArd Biesheuvel1-14/+14
2014-12-05Merge branches 'fixes', 'misc', 'pm' and 'sa1100' into for-nextRussell King1-2/+3
2014-11-27ARM: 8222/1: mvebu: enable strex backoff delayThomas Petazzoni1-2/+0
2014-11-21ARM: 8196/1: vfp: Workaround bad MVFR1 register on some KraitsStephen Boyd1-2/+3
2014-09-12ARM: 8138/1: drop ISAR0 workaround for B15Brian Norris1-1/+1
2014-07-24ARM: 8110/1: do CPU-specific init for Broadcom Brahma15 coresMarc Carino1-0/+11
2014-07-18ARM: 8103/1: save/restore Cortex-A9 CP15 registers on suspend/resumeShawn Guo1-1/+36
2014-07-18ARM: 8089/1: cpu_pj4b_suspend_size should base on cpu_v7_suspend_sizeShawn Guo1-6/+6
2014-07-18ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+Russell King1-7/+7
2014-05-26ARM: 8046/1: proc: add support for the Cortex-A17 processorWill Deacon1-0/+11
2014-04-23ARM: 8013/1: PJ4B: Add cpu_suspend/cpu_resume hooks for PJ4BGregory CLEMENT1-3/+25
2014-04-04Merge branches 'amba', 'fixes', 'misc', 'mmci', 'unstable/omap-dma' and 'unst...Russell King1-1/+12
2014-02-10ARM: 7940/1: add support for the Cortex-A12 processorJonathan Austin1-0/+11
2014-02-10ARM: 7953/1: mm: ensure TLB invalidation is complete before enabling MMUWill Deacon1-1/+1
2013-11-14ARM: 7885/1: Save/Restore 64-bit TTBR registers on LPAE suspend/resumeMahesh Sivasubramanian1-5/+12
2013-10-19ARM: asm: Add ARM_BE8() assembly helperBen Dooks1-3/+1
2013-09-05Merge branches 'debug-choice', 'devel-stable' and 'misc' into for-linusRussell King1-2/+14
2013-09-02ARM: 7823/1: errata: workaround Cortex-A15 erratum 773022Will Deacon1-1/+13
2013-08-12ARM: mm: use inner-shareable barriers for TLB and user cache operationsWill Deacon1-1/+1
2013-07-22ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2Will Deacon1-5/+6
2013-07-15arm: delete __cpuinit/__CPUINIT usage from all ARM usersPaul Gortmaker1-2/+0
2013-06-29Merge branch 'devel-stable' into for-nextRussell King1-6/+21
2013-06-24ARM: 7773/1: PJ4B: Add support for errata 4742Gregory CLEMENT1-3/+31
2013-06-17ARM: 7754/1: Fix the CPU ID and the mask associated to the PJ4BGregory CLEMENT1-2/+2
2013-06-07ARM: add Cortex-R7 Processor InfoJonathan Austin1-1/+12
2013-06-07ARM: suspend: fix CPU suspend code for !CONFIG_MMU configurationsWill Deacon1-5/+9
2013-05-03Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'sm...Russell King1-5/+21
2013-04-17ARM: 7695/1: mvebu: Enable pj4b on LPAE compilationsGregory CLEMENT1-1/+2
2013-04-03ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP insteadWill Deacon1-2/+2
2013-03-22ARM: 7678/1: Work around faulty ISAR0 register in some Krait CPUsStepan Moskovchenko1-0/+15
2013-03-22ARM: 7680/1: Detect support for SDIV/UDIV from ISAR0 registerStephen Boyd1-2/+2
2013-01-06ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4bHaojian Zhuang1-0/+1