Age | Commit message (Expand) | Author | Files | Lines |
2012-08-25 | ARM: 7502/1: contextidr: avoid using bfi instruction during notifier | Will Deacon | 1 | -3/+4 |
2012-07-09 | ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process | Will Deacon | 1 | -0/+35 |
2012-04-17 | ARM: Remove current_mm per-cpu variable | Catalin Marinas | 1 | -11/+1 |
2012-04-17 | ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs | Catalin Marinas | 1 | -2/+2 |
2012-04-17 | ARM: Use TTBR1 instead of reserved context ID | Will Deacon | 1 | -18/+27 |
2011-12-08 | ARM: LPAE: Add context switching support | Catalin Marinas | 1 | -2/+17 |
2011-09-13 | locking, ARM: Annotate low level hw locks as raw | Thomas Gleixner | 1 | -7/+7 |
2011-06-09 | Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks" | Russell King | 1 | -3/+3 |
2011-06-09 | Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID" | Russell King | 1 | -6/+5 |
2011-05-26 | ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks | Will Deacon | 1 | -3/+3 |
2011-05-26 | ARM: 6943/1: mm: use TTBR1 instead of reserved context ID | Will Deacon | 1 | -5/+6 |
2010-02-16 | ARM: 5905/1: ARM: Global ASID allocation on SMP | Catalin Marinas | 1 | -14/+110 |
2009-10-29 | ARM: Fix errata 411920 workarounds | Russell King | 1 | -4/+1 |
2009-09-24 | cpumask: use mm_cpumask() wrapper: arm | Rusty Russell | 1 | -1/+1 |
2007-05-09 | Merge branches 'armv7', 'at91', 'misc' and 'omap' into devel | Russell King | 1 | -3/+7 |
2007-05-09 | [ARM] armv7: add support for asid-tagged VIVT I-cache | Catalin Marinas | 1 | -0/+7 |
2007-05-08 | [ARM] Fix ASID version switch | Russell King | 1 | -3/+7 |
2007-02-08 | [ARM] 4128/1: Architecture compliant TTBR changing sequence | Catalin Marinas | 1 | -2/+10 |
2006-09-20 | [ARM] Move mmu.c out of the way | Russell King | 1 | -0/+45 |