| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-03-09 | ARM: 9059/1: cache-v7: get rid of mini-stack | Ard Biesheuvel | 1 | -5/+5 |
| 2021-03-09 | ARM: 9058/1: cache-v7: refactor v7_invalidate_l1 to avoid clobbering r5/r6 | Ard Biesheuvel | 1 | -26/+25 |
| 2021-03-09 | ARM: 9057/1: cache-v7: add missing ISB after cache level selection | Ard Biesheuvel | 1 | -3/+4 |
| 2019-12-08 | sched/rt, ARM: Use CONFIG_PREEMPTION | Thomas Gleixner | 1 | -2/+2 |
| 2019-07-09 | Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm | Linus Torvalds | 1 | -0/+16 |
| 2019-06-21 | ARM: 8862/1: errata: 814220-B-Cache maintenance by set/way operations can exe... | Benjamin Gaignard | 1 | -0/+3 |
| 2019-06-21 | ARM: 8864/1: Add workaround for I-Cache line size mismatch between CPU cores | Marek Szyprowski | 1 | -0/+13 |
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner | 1 | -4/+1 |
| 2018-12-05 | ARM: 8814/1: mm: improve/fix ARM v7_dma_inv_range() unaligned address handling | Chris Cole | 1 | -3/+5 |
| 2017-12-18 | ARM: 8729/1: Hook B15 readahead cache functions based on processor | Florian Fainelli | 1 | -0/+21 |
| 2017-02-28 | scripts/spelling.txt: add "swith" pattern and fix typo instances | Masahiro Yamada | 1 | -1/+1 |
| 2015-04-15 | ARM: cache-v7: optimise test for Cortex A9 r0pX devices | Russell King | 1 | -4/+3 |
| 2015-04-15 | ARM: cache-v7: optimise branches in v7_flush_cache_louis | Russell King | 1 | -9/+10 |
| 2015-04-15 | ARM: cache-v7: consolidate initialisation of cache level index | Russell King | 1 | -2/+2 |
| 2015-04-15 | ARM: cache-v7: shift CLIDR to extract appropriate field before masking | Russell King | 1 | -7/+6 |
| 2015-04-15 | ARM: cache-v7: use movw/movt instructions | Russell King | 1 | -5/+6 |
| 2014-07-18 | ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ | Russell King | 1 | -15/+15 |
| 2014-05-26 | ARM: 8055/1: cacheflush: use -st dsb option for ensuring completion | Will Deacon | 1 | -6/+6 |
| 2013-12-29 | ARM: 7919/1: mm: refactor v7 cache cleaning ops to use way/index sequence | Lorenzo Pieralisi | 1 | -7/+7 |
| 2013-08-12 | ARM: mm: use inner-shareable barriers for TLB and user cache operations | Will Deacon | 1 | -2/+2 |
| 2013-06-17 | ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect | Jon Medhurst | 1 | -0/+8 |
| 2013-02-12 | arm: Add v7_invalidate_l1 to cache-v7.S | Dinh Nguyen | 1 | -0/+46 |
| 2012-12-20 | ARM: 7606/1: cache: flush to LoUU instead of LoUIS on uniprocessor CPUs | Will Deacon | 1 | -2/+4 |
| 2012-10-11 | Merge branch 'fixes' into for-linus | Russell King | 1 | -0/+3 |
| 2012-09-29 | ARM: 7541/1: Add ARM ERRATA 775420 workaround | Simon Horman | 1 | -0/+3 |
| 2012-09-25 | ARM: mm: rename jump labels in v7_flush_dcache_all function | Lorenzo Pieralisi | 1 | -7/+7 |
| 2012-09-25 | ARM: mm: implement LoUIS API for cache maintenance ops | Lorenzo Pieralisi | 1 | -0/+36 |
| 2012-05-02 | ARM: 7408/1: cacheflush: return error to userspace when flushing syscall fails | Will Deacon | 1 | -6/+4 |
| 2012-02-16 | ARM: 7325/1: fix v7 boot with lockdep enabled | Rabin Vincent | 1 | -1/+1 |
| 2012-02-09 | ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR | Stephen Boyd | 1 | -0/+6 |
| 2011-09-17 | ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed | Will Deacon | 1 | -0/+20 |
| 2011-07-07 | ARM: mm: cache-v7: Use the new processor struct macros | Dave Martin | 1 | -13/+2 |
| 2011-05-26 | ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area | Will Deacon | 1 | -0/+2 |
| 2011-03-31 | Fix common misspellings | Lucas De Marchi | 1 | -1/+1 |
| 2010-12-13 | ARM: 6528/1: Use CTR for the I-cache line size on ARMv7 | Catalin Marinas | 1 | -10/+17 |
| 2010-10-04 | ARM: 6405/1: Handle __flush_icache_all for CONFIG_SMP_ON_UP | Tony Lindgren | 1 | -0/+16 |
| 2010-10-04 | ARM: Allow SMP kernels to boot on UP systems | Russell King | 1 | -10/+4 |
| 2010-05-21 | ARM: 6139/1: ARMv7: Use the Inner Shareable I-cache on MP | Santosh Shilimkar | 1 | -0/+4 |
| 2010-05-08 | ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP | Catalin Marinas | 1 | -0/+4 |
| 2010-02-15 | ARM: dma-mapping: fix for speculative prefetching | Russell King | 1 | -4/+6 |
| 2010-02-15 | ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range | Russell King | 1 | -4/+2 |
| 2010-02-15 | ARM: dma-mapping: provide per-cpu type map/unmap functions | Russell King | 1 | -0/+26 |
| 2009-12-14 | ARM: add size argument to __cpuc_flush_dcache_page | Russell King | 1 | -6/+7 |
| 2009-10-07 | ARM: 5746/1: Handle possible translation errors in ARMv6/v7 coherent_user_range | Catalin Marinas | 1 | -2/+17 |
| 2009-07-24 | Thumb-2: Implement the unified arch/arm/mm support | Catalin Marinas | 1 | -5/+11 |
| 2008-11-06 | ARMv7: Add extra barriers for flush_cache_all compressed/head.S | Catalin Marinas | 1 | -0/+2 |
| 2008-09-01 | [ARM] 5227/1: Add the ENDPROC declarations to the .S files | Catalin Marinas | 1 | -0/+10 |
| 2007-05-09 | [ARM] armv7: add support for ARMv7 cores. | Catalin Marinas | 1 | -0/+253 |
