Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2009-11-27 | ARM: Add Tauros2 L2 cache controller support | Lennert Buytenhek | 1 | -0/+263 | |
Support for the Tauros2 L2 cache controller as used with the PJ1 and PJ4 CPUs. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> |