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2011-01-07Merge branch 'devel-stable' into develRussell King38-727/+1787
Conflicts: arch/arm/mach-pxa/clock.c arch/arm/mach-pxa/clock.h
2011-01-07Merge branch 'misc' into develRussell King5-70/+30
Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
2011-01-07Merge branch 'smp' into miscRussell King5-71/+32
Conflicts: arch/arm/kernel/entry-armv.S arch/arm/mm/ioremap.c
2010-12-30ux500: add TC35893 keypad platform dataSundar Iyer1-1/+64
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-24ARM: 6539/1: ux500: remove unnecessary barrier from the secondary startupSrinidhi Kasagar1-1/+0
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-22ux500: rename modem IRQ and MBOX filesLinus Walleij4-3/+3
Suffix the U5500 modem IRQ and MBOX files with *-db5500* so that we clearly know the SoC they belong to, in line with the rest of the files in mach-ux500. Cc: Stefan Nilsson <stefan.xk.nilsson@stericsson.com> Cc: Martin Persson <martin.persson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-20ARM: Fix subtle race in CPU pen_release hotplug codeRussell King1-7/+15
There is a subtle race in the CPU hotplug code, where a CPU which has been offlined can online itself before being requested, which results in things going astray on the next online/offline cycle. What happens in the normal online/offline/online cycle is: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads -1 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 However, as the write of -1 of pen_release is not fully flushed back to memory, and the checking of pen_release is done with caches disabled, this allows CPU3 the opportunity to read the old value of pen_release: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads 3 starts boot pen_release = -1 requests boot of CPU3 pen_release = 3 flush cache line Fix this by grouping the write of pen_release along with its cache line flushing code to ensure that any update to pen_release is always pushed out to physical memory. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: SMP: remove smp_mpidr.hRussell King1-1/+0
With "ARM: CPU hotplug: remove bug checks in platform_cpu_die()", we now do not use hard_smp_processor_id(), we no longer need to read the hardware processor ID. Remove the include providing this function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: CPU hotplug: remove bug checks in platform_cpu_die()Russell King1-10/+0
platform_cpu_die() is entered from the CPU's own idle thread, which can not be migrated to other CPUs. Moreover, the 'cpu' argument comes from the thread info, which will always be the 'current' CPU. So remove this useless bug check. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: CPU hotplug: move cpu_killed completion to core codeRussell King1-7/+1
We always need to wait for the dying CPU to reach a safe state before taking it down, irrespective of the requirements of the platform. Move the completion code into the ARM SMP hotplug code rather than having each platform re-implement this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: SMP: consolidate trace_hardirqs_off() into common SMP codeRussell King1-2/+0
All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: SMP: consolidate the common parts of smp_prepare_cpus()Russell King1-21/+3
There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: SMP: get rid of get_core_count()Russell King1-6/+3
We don't need this small function as well as scu_get_core_count() Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: SMP: Clean up ncores sanity checksRussell King1-6/+0
scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ARM: SMP: move CPU number sanity checks to smp_init_cpus()Russell King1-13/+13
Ensure that the number of CPUs is sanity checked before setting the number of possible CPUs. This avoids any chance of overflowing the cpu_possible bitmap. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20ux500: add debugfs support for powerdebugVincent Guittot2-1/+198
Signed-off-by: Vincent Guittot <vincent.guittot@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19ux500: platsmp: Fix section mismatchJonas Aaberg1-1/+1
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19mach-ux500: add STMPE1601 platform dataSundar Iyer3-2/+49
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> [Minor fixups to GPIO enumerators] Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19mach-ux500: move keymaps to new fileSundar Iyer5-111/+140
Move keylayouts to a dedicated file and plug these keylayouts for input platform data. This will make addition of new and custom keylayouts localized. Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19mfd/tc3589x: add block identifier for multiple child devicesSundar Iyer1-0/+1
Add block identifier to be able to add multiple mfd clients to the mfd core Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19mfd/tc3589x: rename tc35892 structs/registers to tc359xSundar Iyer1-7/+5
Most of the register layout, client IRQ numbers on the TC35892 is shared also by other variants. Make this generic as tc3589x Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-19mach-ux500: deprecate spi support for ab8500Sundar Iyer1-35/+1
Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-14ARM: GIC: private a standard get_irqnr_preamble assembler macroRussell King1-0/+1
Provide a standard get_irqnr_preamble assembler macro for platforms to use, which retrieves the base address of the GIC CPU interface from gic_cpu_base_addr. Allow platforms to override this by defining HAVE_GET_IRQNR_PREAMBLE. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_initRussell King1-1/+1
We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: provide a single initialization function for boot CPURussell King1-2/+2
Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-09ux500: Add cpufreq support for u8500Martin Persson3-0/+213
Signed-off-by: Martin Persson <martin.persson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-09ux500: Add prcmu support for operating pointsMartin Persson4-8/+202
Adds support in PRCMU driver to handle CPU and APE operating points. Signed-off-by: Martin Persson <martin.persson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: fix 5500 PER6 clock rateRabin Vincent1-1/+0
The DB5500 PER6 clock rate is the same as the DB8500 one, i.e. 133.33 MHz. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: remove ambiguous irq macrosRabin Vincent3-48/+5
Remove the irq number macros which don't specify which SoC they're for. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: rework gpio registrationRabin Vincent9-139/+93
Rework gpio registration to remove build-time changing macros. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: fix uncompressor UART address for U5500Carl-Johan Irekvist1-9/+14
The uncompress code for zImage uses the UART to print status messages, this was hard coded to use UART2 for the U8500 platform. This patch checks at run time which platform it is run on. U5500 uses UART0 as console UART. Signed-off-by: Carl-Johan Irekvist <carl-johan.irekvist@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: Add DMA support for U5500Per Forlin5-1/+129
Add basic DMA configuration for u5500 supporting memcpy. Make way for SDI0 dma support by setting SDI0 to -1, indicating it will be configured in runtime. Signed-off-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: Add eMMC support in U5500.Per Forlin5-2/+57
U5500 now boots from sdi0 (onboard eMMC). Change machine type to U5500. Adjust uart and sdi0 clock rates for u5500. All necessary clocks must be enabled before Linux starts because there is no clock tree support in u5500 yet. Signed-off-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: Call prmcu_init only for u8500Per Forlin1-1/+2
PRCMU driver only supports u8500. Don't initialize prcmu if running on u5500. Signed-off-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08mach-ux500: clean up checkpatch spitsSundar Iyer1-59/+59
Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08mach-ux500: explicit enable MTU TCR in the kernelSundar Iyer1-40/+9
PRCM_TCR enables the various timers in the system. This must be achieved before any of the MTUs are usable for kernel usage. Explicit enabling of this in the kernel makes it independent of bootloader actions. Signed-off-by: Sundar Iyer <sundar.iyer@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: minor revision to the eMMC/SD configLinus Walleij1-1/+10
A small fixup for the v1(.0) ASIC. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08mach-ux500: AB8500 irqs is taken from header fileMattias Wallin1-1/+2
This patch removes the dublicated define for number of interrupts and instead include the needed header file. Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ARM: ux500: prcmu db8500 v2 supportMattias Wallin5-12/+37
This patch adds support for db8500 chip version 2. The TCDM memory address of the PRCMU is changed and dynamic detection of that is added. Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: rework device registrationRabin Vincent15-263/+395
Change the Ux500 devices to be dynamically allocated and added by calling functions instead of referencing structures, thereby allowing 5500 and other derivatives' support to be added without having to duplicate structures, use fixup functions, or use compile-time macros. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: use _cansleep GPIO functionsLinus Walleij1-2/+2
Similar to the patch to MMCI this silences similar messages from the platform code. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-08ux500: mop500: add TC35892 and MicroSD slot supportRabin Vincent4-1/+118
Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
2010-12-07ARM: 6479/1: Use shared GIC entry macros on UX500Magnus Damm1-66/+1
Use the GIC demux code in asm/hardware/entry-macro-gic.S on the UX500 subarchitecture. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-03ARM: SMP: pass an ipi number to smp_cross_call()Russell King2-3/+3
This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-26ARM: 6483/1: arm & sh: factorised duplicated clkdev.cJean-Christop PLAGNIOL-VILLARD1-2/+1
factorise some generic infrastructure to assist looking up struct clks for the ARM & SH architecture. as the code is identical at 99% put the arch specific code for allocation as example in asm/clkdev.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-22ARM: 6473/1: Small update to ux500 specific L2 cache codePer Fransson1-3/+3
This change updates the ux500 specific outer cache code to use the new *_relaxed() I/O accessors. Signed-off-by: Per Fransson <per.xx.fransson@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-30Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds1-0/+45
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (215 commits) ARM: memblock: setup lowmem mappings using memblock ARM: memblock: move meminfo into find_limits directly ARM: memblock: convert free_highpages() to use memblock ARM: move freeing of highmem pages out of mem_init() ARM: memblock: convert memory detail printing to use memblock ARM: memblock: use memblock to free memory into arm_bootmem_init() ARM: memblock: use memblock when initializing memory allocators ARM: ensure membank array is always sorted ARM: 6466/1: implement flush_icache_all for the rest of the CPUs ARM: 6464/2: fix spinlock recursion in adjust_pte() ARM: fix memblock breakage ARM: 6465/1: Fix data abort accessing proc_info from __lookup_processor_type ARM: 6460/1: ixp2000: fix type of ixp2000_timer_interrupt ARM: 6449/1: Fix for compiler warning of uninitialized variable. ARM: 6445/1: fixup TCM memory types ARM: imx: Add wake functionality to GPIO ARM: mx5: Add gpio-keys to mx51 babbage board ARM: imx: Add gpio-keys to plat-mxc mx31_3ds: Fix spi registration mx31_3ds: Fix the logic for detecting the debug board ...
2010-10-28Merge branch 'l2x0-pull-rmk' of ↵Russell King1-0/+45
git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into devel-stable
2010-10-28Merge branch 'next' of ↵Linus Torvalds1-12/+1
git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits) DMAENGINE: move COH901318 to arch_initcall dma: imx-dma: fix signedness bug dma/timberdale: simplify conditional ste_dma40: remove channel_type ste_dma40: remove enum for endianess ste_dma40: remove TIM_FOR_LINK option ste_dma40: move mode_opt to separate config ste_dma40: move channel mode to a separate field ste_dma40: move priority to separate field ste_dma40: add variable to indicate valid dma_cfg async_tx: make async_tx channel switching opt-in move async raid6 test to lib/Kconfig.debug dmaengine: Add Freescale i.MX1/21/27 DMA driver intel_mid_dma: change the slave interface intel_mid_dma: fix the WARN_ONs intel_mid_dma: Add sg list support to DMA driver intel_mid_dma: Allow DMAC2 to share interrupt intel_mid_dma: Allow IRQ sharing intel_mid_dma: Add runtime PM support DMAENGINE: define a dummy filter function for ste_dma40 ...
2010-10-26ARM: ux500 specific L2 cache codePer Fransson1-0/+45
The generic version of l2x0_inv_all is only called just after disabling the L2 cache and is surrounded by a spinlock. However, we're not really turning off the L2 cache right now, and the PL310 does not support exclusive accesses (used to implement the spinlock). So, the invalidation needs to be done without the spinlock. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Hans-Juergen Koch <hjk@linutronix.de> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Per Fransson <per.xx.fransson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>