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path: root/arch/arm/mach-tegra/tegra2_clocks.c
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2011-07-13arm: tegra: remove generic disp clock divisor flagRobert Morell1-2/+2
Although disp1 and disp2 have 7.1 divisors, their corresponding registers in the clk_rst block are not the interface to program the divisors. Setting the generic DIV_U71 flag may cause the code to attempt to program the clock at a different divisor, which will confuse any code attempting to use that clock since it isn't actually being divided. Signed-off-by: Robert Morell <rmorell@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
2011-04-26Merge branch 'master' into for-nextJiri Kosina1-4/+5
Fast-forwarded to current state of Linus' tree as there are patches to be applied for files that didn't exist on the old branch.
2011-04-10treewide: remove extra semicolonsJustin P. Mattock1-1/+1
Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-04-02arm: tegra: fix error check in tegra2_clocks.cNicolas Kaiser1-4/+5
Checking 'rate < 0' doesn't work because 'rate' is unsigned. Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-24ARM: Tegra: Rename clk_dev1/2 to cdev1/2Stephen Warren1-6/+6
The ASoC machine driver was written assuming my previous patch to add complete support for these clocks, which named them cdev1/2. Rename the clocks to match that, to avoid churn in the ASoC driver. This rename also makes the clocks more consistent with other Tegra clocks irrespective of any of that. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-24ARM: Tegra: Rename I2S clocks to match driver nameStephen Warren1-2/+2
The driver is tegra-i2s not just i2s. Rename the clocks to match, so that clk_get_sys can look up by driver name. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-22ARM: tegra: clock: prevent accidental disables of cpu clockColin Cross1-0/+25
Peripheral clocks that have no clock enable bit in the enable registers have their clk_num set to 0. Bit 0 in the clock enable registers is the CPU clock. Prevent disables on these peripheral clocks from accidentally disabling the CPU clock. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
2011-02-22ARM: tegra: clock: Round rate before setting rateColin Cross1-4/+4
Call the clock's round_rate op, if it exists, before calling the set_rate op. This will help later when dvfs is added, dvfs needs to know what the final rate will be before the frequency changes. Also requires fixes to the round rate functions to ensure calling round rate and then set rate will not cause the frequency to be rounded down twice. When picking clock divider values, the clock framework picks the closest frequency that is lower than the requested frequency. If the new frequency calculated from the divider value is rounded down, and then passed to set_rate, it will get rounded down again, possibly resulting in a frequency two steps lower than the original requested frequency. Fix the problem by rounding up when calculating the frequency coming out of a clock divider, so if that frequency is requested again, the same divider value will be picked. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
2011-02-22ARM: tegra: clock: Refcount periph clock enablesColin Cross1-6/+31
Some peripheral clocks share enable bits. Refcount the enables so that calling clk_disable on one clock will not turn off another clock. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
2011-02-21ARM: tegra: clock: Miscellaneous clock updatesColin Cross1-31/+67
Correct max rates for pclk and sclk (Originally fixed by Dima Zavin <dima@android.com>) Correct max rate for plla (Originally fixed by Stephen Warren <swarren@nvidia.com>) Remove unnecessary no-op set_rate on audio clocks Add clock lookup entries for grhost, bsea, and vde clocks Update clock clookup entries for vcp, bsea, and vde clocks Add shared clock entries for sclk and emc Add a virtual cop clock to provide a reset op (Originally fixed by Dima Zavin <dima@android.com>) Pass set_rate on super clocks through to parent Fix pllx frequency table entry for 608 MHz Remove incorrect plla frequency table entries Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Fix clock issues in suspendColin Cross1-10/+20
The PLLP registers are now being restored by the low-level resume code, and the CPU may be running off PLLP, so don't touch them during clock resume. Save plld, plls, pllu, and audio clock during suspend (originally fixed by Mayuresh Kulkarni <mkulkarni@nvidia.com>) The lock time for plld is 1000 us, so increase the delay after setting the PLLs. Add a BUG_ON to ensure the size of the suspend context area is correct. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Add function to set SDMMC tap delayColin Cross1-0/+19
The SDMMC controllers have extra bits in the clock source register that adjust the delay between the clock and data to compenstate for delays on the PCB. The values need to be set from the clock code so the clock can be locked during the read-modify-write on the clock source register. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clocks: Add emc scalingColin Cross1-1/+63
Add clock ops on the emc peripheral clock that call into the emc driver to update the memory controller registers for the new frequency. Tegra has an interlock between the clock controller and the memory controller that prevents the new register values from taking effect until the clock frequency update occurs. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Minor cleanupsColin Cross1-2/+0
Remove unnecessary uses of #ifdef CONFIG_DEBUG_FS Convert bool assignments from 1 to true Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Add shared bus clock typeColin Cross1-0/+116
Some clocks may have multiple downstream users that need to request a higher clock rate. Shared bus clocks provide a unique shared_bus_user clock to each user. The frequency of the bus is set to the highest enabled shared_bus_user clock, with a minimum value set by the shared bus. Drivers can use clk_enable and clk_disable to enable or disable their requirement, and clk_set_rate to set the minimum rate. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: cpufreq: Take an extra reference to pllxColin Cross1-4/+11
During cpu frequency changes, take an extra reference to pllx so that it doesn't turn off and on while the cpu is temporarily on pllp. If the cpu is moved to pllp permanently, pllx will be turned off. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Convert global lock to a lock per clockColin Cross1-34/+85
Give each clock its own lock, and remove all lock traversals from parent to child clocks to prevent AB-BA deadlocks. This brings the locking in line with the common struct clk patches and should make conversion simple. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Move unshared clk struct members into unionColin Cross1-102/+132
Creates a union of a struct for each type of clock to reduce memory usage and clarify which members are used by all clocks and which are used by a single type. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Rearrange static clock tablesColin Cross1-55/+51
Make the static clocks look more like the array of clocks so they can all be initalized with the same helper function. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Drop CPU dvfsColin Cross1-2/+0
The existing version did not extend well to core dvfs, drop it for now until the new clk api with clk_prepare and clk_unprepare is ready and non-atomic clocks are possible. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Don't use PLL lock bitsColin Cross1-22/+9
The PLL lock bits are not reliable, use per-PLL timeouts instead. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: Don't BUG on changing an enabled PLLColin Cross1-1/+0
When updating the CPU PLL frequency, keeping the PLL enabled avoids ramping the PLL all the way down and back up again. Remove the BUG_ON in tegra2_pll_clk_set_rate to allow the rate to change while the PLL is enabled. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: clock: enable clk reset for non-peripheral clocksDima Zavin1-11/+18
Add a new 'reset' clk op. This can be provided for any clock, not just peripherals. Signed-off-by: Dima Zavin <dima@android.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-21ARM: tegra: APB DMA: Enable clock and remove reset.Stephen Warren1-0/+6
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-10ARM: tegra: clock: Suspend fixes, and add new clocksColin Cross1-19/+244
Save and restore pll and osc state during suspend Add digital audio clocks Update clk dev associations Correct max clock frequencies Add pll_p as additional cpu clock state Add values to plld table Fix register offset for sdmmc4 clock Add blink timer to tegra2_clocks Signed-off-by: Colin Cross <ccross@android.com>
2011-02-10ARM: tegra: Add prototypes for subsystem suspend functionsColin Cross1-0/+1
Signed-off-by: Colin Cross <ccross@android.com>
2010-11-26ARM: 6483/1: arm & sh: factorised duplicated clkdev.cJean-Christop PLAGNIOL-VILLARD1-2/+1
factorise some generic infrastructure to assist looking up struct clks for the ARM & SH architecture. as the code is identical at 99% put the arch specific code for allocation as example in asm/clkdev.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-22tegra: add PCI Express clocksMike Rapoport1-0/+48
Signed-off-by: Mike Rapoport <mike@compulab.co.il> CC: Gary King <GKing@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
2010-10-22[ARM] tegra: clock: Add dvfs support, bug fixes, and cleanupsColin Cross1-171/+607
- Add drivers to clock lookup table - Add new pll_m entries - Support I2C U16 divider - Fix rate reporting on 32.768kHz clock - Call propagate rate only if set_rate succeeds - Add support for audio_sync clock - Add 24MHz to PLLA frequency list - Correct i2s1/2/spdifout mux - Add suspend support - Fix enable/disable parent clocks in set_parent - Add max_rate parameter to all clocks - DVFS support - Add virtual cpu clock with dvfs - Support clk_round_rate - Fix requesting very high periph frequencies - Add quirks for PLLU: PLLU is slightly different from the rest of the PLLs. The lock enable bit is at bit 22 instead of 18 in the MISC register, and the post divider field is a single bit with reversed values from other PLLs. - Simplify recalculating clock rates - Fix UART divider flags - Remove unused clock ops Signed-off-by: Colin Cross <ccross@android.com>
2010-08-06[ARM] tegra: Add clock supportColin Cross1-0/+1359
v2: fixes from Russell King: - include linux/io.h instead of asm/io.h - fix whitespace in Kconfig - Use spin_lock_init to initialize lock - Return -ENOSYS instead of BUG for unimplemented clock ops - Use proper return values in tegra2 clock ops additional changes: - Rename some clocks to match dev_ids - add rate propagation - add debugfs entries - add support for clock listed in clk_lookup under multiple dev_ids v3: - Replace per-clock locking with global clock lock - Autodetect clock state on init - Let clock dividers pick next lower possible frequency - Add support for clock init tables - Minor bug fixes - Fix checkpatch issues Signed-off-by: Colin Cross <ccross@android.com>
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