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path: root/arch/arm/mach-omap2/prm-regbits-34xx.h
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2012-11-13ARM: OMAP3: clock: Add 3xxx data using common struct clkRajendra Nayak1-0/+1
The patch is the output from a python script which converts from the old OMAP clk format to COMMON clk format using a JSON parser in between which was developed by Paul Walmsley. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: AM3517/05: dropped bogus hsotgusb "ick" and "fck" clkdev aliases; added hsotgusb_fck alias; added emac_ick and emac_fck aliases; replace omap2_init_clksel_parent() with omap2_clksel_find_parent_index(); reflow macros and parent name lists; add clkdm_name argument to DEFINE_STRUCT_CLK_HW_OMAP macros] Signed-off-by: Mike Turquette <mturquette@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-10-21ARM: OMAP2+: PRM: create PRM reset source API for the watchdog timer driverPaul Walmsley1-0/+10
The OMAP watchdog timer driver needs to determine what caused the SoC to reset for its GETBOOTSTATUS ioctl. So, define a set of standard reset sources across OMAP SoCs. For OMAP2xxx, 3xxx, and 4xxx SoCs, define mappings from the SoC-specific reset source register bits to the standardized reset source IDs. Create SoC-specific PRM functions that read the appropriate per-SoC register and use the mapping to return the standardized reset bits. Register the SoC-specific PRM functions with the common PRM code via prm_register(). Create a function in the common PRM code, prm_read_reset_sources(), that calls the SoC-specific function, registered during boot. This patch does not yet handle some SoCs, such as AM33xx. Those SoCs were not handled by the code this will replace. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-10-21ARM: OMAP2+: PRM: split PRM functions into OMAP2, OMAP3-specific filesPaul Walmsley1-1/+1
Move OMAP3xxx-specific PRM functions & macros into prm3xxx.[ch] and OMAP2xxx-specific macros into prm2xxx.h. (prm2xxx.c will be created by a subsequent patch when it's needed.) Move basic PRM register access functions into static inline functions in prm2xxx_3xxx.h, leaving only OMAP2/3 hardreset functions in prm2xxx_3xxx.c. Also clarify the initcall function naming to reinforce that this code is specifically for the PRM IP block. This is in preparation for the upcoming powerdomain series and the upcoming move of this code to drivers/. Signed-off-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-12-22OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific filesPaul Walmsley1-4/+4
In preparation for adding OMAP4-specific PRCM accessor/mutator functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific files. Most of what was in mach-omap2/{cm,prm}.{c,h} has now been moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was OMAP2xxx/3xxx-specific. This process also requires the #includes in each of these files to be changed to reference the new file name. As part of doing so, add some comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use "sideways includes", to indicate that these users of the PRM/CM includes should not be doing so. Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Acked-by: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Rajendra Nayak <rnayak@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2010-11-09OMAP3: hwmod: add I2C hwmods for OMAP3430Rajendra Nayak1-0/+3
Add hwmod structures for I2C controllers on OMAP3430. This patch was developed in collaboration with Paul Walmsley <paul@pwsan.com>. OMAP3 fixes for correct IDLEST bit monitoring from G, Manjunath Kondaiah <manjugk@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: G, Manjunath Kondaiah <manjugk@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-09-29OMAP3: PRCM: Consider UART4 for 3630 chip in prcm_setup_regsGovindraj.R1-0/+1
To standarize among other uarts (1 to 3), we shall now: - Enable uart4 autodile bit. - Enable uart4 wakeup in PER. - Allow uart4 to wakeup the MPU. Signed-off-by: Sergio Aguirre <saaguirre@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-05-20OMAP3 PRCM: convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixesPaul Walmsley1-180/+180
Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-12OMAP3: PM: Enable IO-CHAIN wakeupKalle Jokiniemi1-0/+2
OMAP 3430 ES3.1 chips have a separate bit for IO daisy-chain wake up enabling. It needs to be enabled when entering retention or off state, otherwise waking up might not work in all situations. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-05-16ARM: OMAP3: Fix HW SAVEANDRESTORE shift defineKalle Jokiniemi1-1/+1
The OMAP3430ES2_SAVEANDRESTORE_SHIFT macro is used by powerdomain code in "1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT" manner, but the definition was also (1 << 4), meaning we actually modified bit 16. So the definition needs to be 4. This fixes also a cold reset HW bug in OMAP3430 ES3.x where some of the efuse bits are not isolated during wake-up from off mode. This can cause randomish cold resets with off mode. Enabling the USBTLL hardware SAVEANDRESTORE causes the core power up assert to be delayed in a way that we will not get faulty values when boot ROM is reading the unisolated registers. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2009-02-08[ARM] OMAP34XX: Add miscellaneous definitions related to 34xxJouni Hogander1-0/+9
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-19ARM: OMAP: Powerdomain: Add OMAP3 powerdomainsPaul Walmsley1-4/+7
Add OMAP3-specific powerdomains. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-04-14ARM: OMAP2: Add register access for 34xxTony Lindgren1-0/+582
This patch adds register access for 34xx power and clock management. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>