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path: root/arch/arm/mach-omap2/dpll3xxx.c
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2010-06-16fix typos concerning "hierarchy"Uwe Kleine-König1-1/+1
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-02-24OMAP2/3/4 clock: fix DPLL multiplier value errors; also copyrights, ↵Paul Walmsley1-4/+0
includes, documentation The maximum DPLL multiplier (M) values for OMAP2xxx and OMAP3xxx are one increment higher than they should be. See for example the OMAP242x TRM Rev X Section 5.10.6 "Clock Generator Registers" and the OMAP36xx TRM Rev C Table 3-202 "CM_CLKSEL1_PLL". Programming a 0 into the DPLL's M register bitfield is valid for OMAP2/3 and indicates that the DPLL should enter MN-bypass mode. Also, increase the minimum multiplier (M) value for the DPLL rate rounding code from 1 to 2, to ensure that it does not inadvertently put the DPLL into bypass. Note that the register documentation in the OMAP2xxx and OMAP3xxx TRMs does not make clear that the actual DPLL divider value (the "N") is the content of the appropriate register bitfield for the N value, _plus one_. (In other words, an N register bitfield of 0 indicates a DPLL divider value of 1.) This is only clearly documented in the OMAP4430 TRM, in, for example, OMAP4430 TRM Rev A Table 3-1167 "CM_CLKSEL_DPLL_USB". While here, update copyrights, add kerneldoc for struct dpll_data, drop the unused struct dpll_data.max_tolerance field, remove some unnecessary #includes in DPLL-related code, and replace the #include of <linux/module.h> with <linux/list.h>, which is what was really needed. The OMAP4 clock autogenerator script has been updated accordingly. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
2010-02-24OMAP3 clock: introduce DPLL4 JtypeRichard Woodruff1-4/+63
DPLL4 for 3630 introduces a changed block called j type dpll, requiring special divisor bits and additional reg fields. To allow for silicons to use this, this is introduced as a flag and is enabled for 3630 silicon. OMAP4 also has j type dpll for usb. Tested with 3630 ZOOM3 and OMAP3430 ZOOM2 Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vishwanath BS <Vishwanath.bs@ti.com> [paul@pwsan.com: added some comments; updated copyrights and credits; fixed some style issues] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-02-24OMAP3 clock: Remove FreqSel for 3630Vishwanath BS1-4/+7
DPLL_FREQSEL field in CLKEN_PLL register is no longer valid for OMAP3630. So remove references to that. Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> [paul@pwsan.com: added comment fix from Sergei Shtylyov] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-01-29OMAP3 DPLL: reorganize static functionsPaul Walmsley1-55/+58
Move all static functions up to the top of the file to match the practice in other OMAP clock code. Make omap3_noncore_dpll_program() static (noted by sparse) and prepend an underscore to the function name to mark that it is file-local. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2010-01-27OMAP3 clock: move OMAP3-specific DPLL functions to dpll3xxx.cPaul Walmsley1-0/+538
Mark the OMAP3-specific DPLL functions as being OMAP3-specific by moving them from mach-omap2/dpll.c to mach-omap2/dpll3xxx.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>