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2011-10-23Merge branch 'ppi-irq-core-for-rmk' of ↵Russell King4-112/+47
git://github.com/mzyngier/arm-platforms into devel-stable
2011-10-23ARM: gic, local timers: use the request_percpu_irq() interfaceMarc Zyngier1-29/+40
This patch remove the hardcoded link between local timers and PPIs, and convert the PPI users (TWD, MCT and MSM timers) to the new *_percpu_irq interface. Also some collateral cleanup (local_timer_ack() is gone, and the interrupt handler is strictly private to each driver). PPIs are now useable for more than just the local timers. Additional testing by David Brown (msm8250 and msm8660) and Shawn Guo (imx6q). Cc: David Brown <davidb@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2011-10-23ARM: gic: consolidate PPI handlingMarc Zyngier2-83/+1
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2011-10-21ARM: smp: fix clipping of number of CPUsRussell King1-0/+6
Rather than clipping the number of CPUs using the compile-time NR_CPUS constant, use the runtime nr_cpu_ids value instead. This allows the nr_cpus command line option to work as expected. Cc: <stable@kernel.org> Reported-by: Mark Salter <msalter@redhat.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-13ARM: mach-msm: remove mach/memory.hNicolas Pitre1-35/+0
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-09-26ARM: add an extra temp register to the low level debugging addruart macroNicolas Pitre1-2/+2
Some platforms (like OMAP not to name it) are doing rather complicated hacks just to determine the base UART address to use. Let's give their addruart macro some slack by providing an extra work register which will allow for much needed cleanups. This is basically a no-op as this commit is only adding the extra argument to the macro but no one is using it yet. Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-08-29Merge the enabling by default of ARM_PATCH_PHYS_VIRTNicolas Pitre4-3/+72
Conflicts: arch/arm/mach-msm/board-msm7x30.c
2011-08-22ARM: mach-msm: convert boot_params to atag_offsetNicolas Pitre7-13/+13
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-08-13ARM: 7012/1: Set proper TEXT_OFFSET for newer MSMsStephen Boyd4-3/+72
MSMs post 8x50 have 2Mb at the beginning of RAM reserved for shared memory. Since the kernel hasn't typically been told this RAM exists, PHYS_OFFSET has been set to 0xN0200000 and the memory atags passed to the kernel have matched. This doesn't play nicely with things such as AUTO_ZRELADDR, which doesn't work at all, and dynamic phys to virt, which requires an MSM specific workaround. Work around these issues by telling the kernel RAM starts at 0xN0000000 (it actually does) and fixup the atags from the bootloader (if necessary) to say the same. In addition, make sure to set TEXT_OFFSET at least 2Mb beyond the start of RAM so that the kernel doesn't end up being decompressed into shared memory. After doing this, AUTO_ZRELADDR should work on MSM with no problems and ARM_PATCH_PHYS_VIRT_16BIT should no longer be necessary. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-01Merge branch 'msm-move-gpio' of ↵Grant Likely12-1135/+63
git://codeaurora.org/quic/kernel/davidb/linux-msm into gpio/next Conflicts: drivers/gpio/Kconfig drivers/gpio/Makefile
2011-08-01gpio_msm: Move Qualcomm MSM v2 gpio driver into driversDavid Brown3-439/+1
Migrate the driver for the v7-based MSM chips into drivers/gpio. The driver is unchanged, only moved. Change-Id: I810db5b50b71cdca4e869aa0d0310f7f48781a55 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-08-01gpio_msm: Move Qualcomm v6 MSM driver into driversDavid Brown3-639/+3
Migrate the driver for the v6-based MSM chips into drivers/gpio. The driver is unchanged, only moved. Change-Id: I03ba597b95b4d62b42da112a8efac88d67aa40f9 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-08-01msm: gpio: Fold register defs into C fileDavid Brown2-273/+250
No need to have a separate header file containing only register definitions that are used by a single driver. Fold these into the gpio driver. Signed-off-by: David Brown <davidb@codeaurora.org>
2011-08-01msm: gpiomux: Move public API to public headerDavid Brown3-17/+40
The gpiomux.h header contains some SOC ifdefs. However, the API that is actually used by the GPIO driver only uses two functions that are general. Move these general definitions into a public header file. Change-Id: Ia5df8af87dba268225598d56908e523bcfc24ef6 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-08-01msm: gpio: Remove ifdefs on gpio chip registersDavid Brown1-7/+26
Select the GPIO register configuration at runtime rather than through idefs. Change-Id: I02ea0a3d61bc81669f32097c32420f0688552231 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-08-01msm: gpio: Remove chip-specific register definitionsDavid Brown2-226/+220
Put an SOC prefix on each GPIO register definition, eliminating the need to have SOC ifdefs around the definitions. Change-Id: I5a01fd328a89ce1be610847934d6e118f5465e42 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-08-01msm: Remove chip-ifdefs for GPIO io mappingsDavid Brown5-24/+20
The two GPIO controllers are always mapped to the same virtual address across all MSM devices. Instead of selecting this at compile time, determine the physical address at runtime, eliminating yet something else preventing multiple MSM targets from being compiled into the same kernel. Change-Id: I1672219d978ab6243526adeda6badf49472baa27 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-08-01msm: gpio: Remove unsupported devicesDavid Brown1-7/+0
The MSM7x25 and MSM7x27 devices are not yet supported in the kernel. Remove #ifdef-based tables supporting these chips for now. Change-Id: I4d9f5abc4cc0942ce75a067097b072489493c1b8 Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
2011-07-27Merge branch 'next/cross-platform' of ↵Linus Torvalds1-19/+0
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/cross-platform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: ARM: Consolidate the clkdev header files ARM: set vga memory base at run-time ARM: convert PCI defines to variables ARM: pci: make pcibios_assign_all_busses use pci_has_flag ARM: remove unnecessary mach/hardware.h includes pci: move microblaze and powerpc pci flag functions into asm-generic powerpc: rename ppc_pci_*_flags to pci_*_flags Fix up conflicts in arch/microblaze/include/asm/pci-bridge.h
2011-07-25Merge branch 'next/fixes' of ↵Linus Torvalds1-2/+9
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (35 commits) ARM: msm: platsmp: determine number of CPU cores at boot time ARM: Tegra: Seaboard: Fix I2C bus numbering for ADT7461 ARM: Tegra: Trimslice: Tri-state DAP3 pinmux ARM: orion5x: fixup 5181 MPP mask check ARM: mxs-dma: include <linux/dmaengine.h> ARM: i.MX53: consistently use MX53_UART_PAD_CTRL for uart txd/rxd/rts/cts ARM: i.MX53: UARTn_CTS pin should not change RTS input select ARM: i.MX53: UARTn_TXD pin should not change RXD input select ARM: mx25: Fix typo on CAN1_RX pad setting iomux-mx53: add missing 'IOMUX_CONFIG_SION' for some I2C pad definitions ARM: NUC93X: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: LPC32XXX: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: CNS3XXX: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: i.MX53: Fix IOMUX type o's ARM i.MX dma: Fix burstsize settings mach-mx5: fix the I2C clock parents ARM: mxs/tx28: according to the TX28's datasheet D4-D7 are not used for MMC0 ARM i.MX23/28: platform-mxsfb: Add missing include of linux/dma-mapping.h ARM: mx53: Fix some interrupts marked as reserved. MXC: iomux-v3: correct NO_PAD_CTRL definition ... Fix up trivial conflict in arch/arm/mach-imx/mach-mx31_3ds.c
2011-07-24Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds1-8/+0
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (237 commits) ARM: 7004/1: fix traps.h compile warnings ARM: 6998/2: kernel: use proper memory barriers for bitops ARM: 6997/1: ep93xx: increase NR_BANKS to 16 for support of 128MB RAM ARM: Fix build errors caused by adding generic macros ARM: CPU hotplug: ensure we migrate all IRQs off a downed CPU ARM: CPU hotplug: pass in proper affinity mask on IRQ migration ARM: GIC: avoid routing interrupts to offline CPUs ARM: CPU hotplug: fix abuse of irqdesc->node ARM: 6981/2: mmci: adjust calculation of f_min ARM: 7000/1: LPAE: Use long long printk format for displaying the pud ARM: 6999/1: head, zImage: Always Enter the kernel in ARM state ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanence ARM: ARM_DMA_ZONE_SIZE is no more ARM: mach-shark: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-sa1100: move ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-realview: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-pxa: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-ixp4xx: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-h720x: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size ...
2011-07-23Merge branches 'btc', 'dma', 'entry', 'fixes', 'linker-layout', 'misc', ↵Russell King2-11/+11
'mmci', 'suspend' and 'vfp' into for-next
2011-07-21ARM: msm: platsmp: determine number of CPU cores at boot timeJeff Ohlstein1-2/+9
Previously we just assumed there were CONFIG_NR_CPUS cpus present in the system. Instead, figure out the number of cpus from the MIDR register. Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> [arnd: clarified patch title] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-07-19ARM: Consolidate the clkdev header filesKyungmin Park1-19/+0
Now most of ARM machines has the alsmot same __clk_get/put() macro So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config Now there are only 3 caese. 1) define the clk structure with clkdev macro => Need to move clk structure to proper header file arch/arm/mach-versatile/include/mach/clkdev.h arch/arm/mach-realview/include/mach/clkdev.h arch/arm/mach-vexpress/include/mach/clkdev.h arch/arm/mach-integrator/include/mach/clkdev.h 2) export the __clk_get/put function at clock.c arch/arm/mach-shmobile/include/mach/clkdev.h 3) demuxing the clk source arch/arm/mach-u300/include/mach/clkdev.h Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2011-07-07ARM: 6993/1: platsmp: Allow secondary cpu hotplug with maxcpus=1Stephen Boyd1-8/+0
If an ARM system has multiple cpus in the same socket and the kernel is booted with maxcpus=1, secondary cpus are possible but not present due to how platform_smp_prepare_cpus() is called. Since most typical ARM processors don't actually support physical hotplug, initialize the present map to be equal to the possible map in generic ARM SMP code. Also, always call platform_smp_prepare_cpus() as long as max_cpus is non-zero (0 means no SMP) to allow platform code to do any SMP setup. After applying this patch it's possible to boot an ARM system with maxcpus=1 on the command line and then hotplug in secondary cpus via sysfs. This is more in line with how x86 does things. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-06-21Merge branches 'amd/transparent-bridge' and 'core'Joerg Roedel4-1173/+1
Conflicts: arch/x86/include/asm/amd_iommu_types.h arch/x86/kernel/amd_iommu.c Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-06-21msm: iommu: move to drivers/iommu/Ohad Ben-Cohen4-1170/+1
This should ease finding similarities with different platforms, with the intention of solving problems once in a generic framework which everyone can use. Compile-tested for MSM8X60. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-06-21msm: timer: Fix DGT rate on 8960 and 8660Stephen Boyd1-2/+4
The DGT runs at 27 MHz divided by 4 on 8660 and 8960. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-06-18msm: timer: compensate for timer shift in msm_read_timer_countJeff Ohlstein1-1/+5
Some msm targets have timers whose lower bits are unreliable. So, we present our timers as lower frequency than they actually are, and ignore the bottom 5 bits on such targets. This compensation was erroneously removed from the msm_read_timer_count function, so restore it. This was broken by 94790ec25 "msm: timer: SMP timer support for msm". Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
2011-06-14drivers: iommu: move to a dedicated folderOhad Ben-Cohen1-3/+0
Create a dedicated folder for iommu drivers, and move the base iommu implementation over there. Grouping the various iommu drivers in a single location will help finding similar problems shared by different platforms, so they could be solved once, in the iommu framework, instead of solved differently (or duplicated) in each driver. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-06-01msm: timer: Fix SMP build errorStephen Boyd1-0/+2
Fix build breakage on SMP=y builds due to 0f7b332 (ARM: consolidate SMP cross call implementation, 2011-04-03) arch/arm/mach-msm/timer.c: In function 'local_timer_setup': arch/arm/mach-msm/timer.c:295: error: implicit declaration of function 'gic_enable_ppi' Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-05-24Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds3-26/+11
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits) ARM: bcmring: convert to use sp804 clockevents ARM: bcmring: convert to sp804 clocksource ARM: 6912/1: bcmring: Add clkdev table in init_early clockevents: ARM sp804: obtain sp804 timer rate via clks clockevents: ARM sp804: allow clockevent name to be specified clocksource: ARM sp804: obtain sp804 timer rate via clks clocksource: ARM sp804: allow clocksource name to be specified clocksource: convert OMAP1 to 32-bit down counting clocksource clocksource: convert MXS timrotv2 to 32-bit down counting clocksource clocksource: convert SPEAr platforms 16-bit up counting clocksource clocksource: convert Integrator/AP 16-bit down counting clocksource clocksource: convert W90x900 24-bit down counting clocksource clocksource: convert ARM 32-bit down counting clocksources clocksource: convert ARM 32-bit up counting clocksources clocksource: add common mmio clocksource ARM: update sa1100 to reflect PXA updates ARM: omap1: convert to using readl/writel instead of volatile struct ARM: omap1: delete useless interrupt handler ARM: s5p: consolidate selection of timer register ARM: 6939/1: fix missing 'cpu_relax()' declaration ...
2011-05-23Merge branch 'devel-stable' into for-linusRussell King1-2/+8
Conflicts: arch/arm/Kconfig arch/arm/mach-ns9xxx/include/mach/uncompress.h
2011-05-23Merge branches 'consolidate-clksrc', 'consolidate-flash', ↵Russell King2-24/+3
'consolidate-generic', 'consolidate-smp', 'consolidate-stmp' and 'consolidate-zones' into consolidate
2011-05-23ARM: consolidate SMP cross call implementationRussell King2-24/+3
Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-11ARM: msm: update GPIO chained IRQ handler to use entry/exit functionsWill Deacon1-2/+8
This patch updates the MSM gpio chained IRQ handler to use the chained IRQ enter/exit functions in order to function correctly on primary controllers with different methods of flow control. Tested-and-reviewed-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-05-10treewide: fix a few typos in commentsJustin P. Mattock1-1/+1
- kenrel -> kernel - whetehr -> whether - ttt -> tt - sss -> ss Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-04-19Merge branch 'for-39-rc4' of git://codeaurora.org/quic/kernel/davidb/linux-msmLinus Torvalds2-5/+2
* 'for-39-rc4' of git://codeaurora.org/quic/kernel/davidb/linux-msm: msm: timer: fix missing return value msm: Remove extraneous ffa device check
2011-04-01msm: timer: fix missing return valueDavid Brown1-1/+1
Change af90f10d38 "ARM: 6759/1: smp: Select local timers vs broadcast timer support runtime" missed a return statement, causing a compile warning: arch/arm/mach-msm/timer.c:272: warning: 'return' with no value, in function returning non-void Trivially return 0 for success when running on cpu 0 (to match the comment and previous behavior). Signed-off-by: David Brown <davidb@codeaurora.org>
2011-04-01msm: Remove extraneous ffa device checkDavid Brown1-4/+1
The qsd8x50 board file contains a few references to machine_is_... macros that are otherwise unused, and contain no machine definition. The recent purge of unused machine definitions breaks the compilation of this target. Since the machine cannot ever be used, just remove the bogus checks. Signed-off-by: David Brown <davidb@codeaurora.org>
2011-03-31Fix common misspellingsLucas De Marchi2-2/+2
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-29arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner6-12/+9
Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29arm: Cleanup the irq namespaceThomas Gleixner9-29/+29
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29arm: msm: Use proper irq accessor functionsThomas Gleixner5-10/+10
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29arm: msm: Convert to new irq chip functionsThomas Gleixner1-16/+17
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-24Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds1-1/+2
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (35 commits) ARM: Update (and cut down) mach-types ARM: 6771/1: vexpress: add support for multiple core tiles ARM: 6797/1: hw_breakpoint: Fix newlines in WARNings ARM: 6751/1: vexpress: select applicable errata workarounds in Kconfig ARM: 6753/1: omap4: Enable ARM local timers with OMAP4430 es1.0 exception ARM: 6759/1: smp: Select local timers vs broadcast timer support runtime ARM: pgtable: add pud-level code ARM: 6673/1: LPAE: use phys_addr_t instead of unsigned long for start of membanks ARM: Use long long format when printing meminfo physical addresses ARM: integrator: add Integrator/CP sched_clock support ARM: realview/vexpress: consolidate SMP bringup code ARM: realview/vexpress: consolidate localtimer support ARM: integrator/versatile: consolidate FPGA IRQ handling code ARM: rationalize versatile family Kconfig/Makefile ARM: realview: remove old AMBA device DMA definitions ARM: versatile: remove old AMBA device DMA definitions ARM: vexpress: use new init_early for clock tree and sched_clock init ARM: realview: use new init_early for clock tree and sched_clock init ARM: versatile: use new init_early for clock tree and sched_clock init ARM: integrator: use new init_early for clock tree init ...
2011-03-20Merge branches 'fixes', 'pgt-next' and 'versatile' into develRussell King1-1/+2
2011-03-17Merge remote branch 'rmk/for-linus' into for-linusDavid Brown5-17/+17
* rmk/for-linus: (1557 commits) ARM: 6806/1: irq: introduce entry and exit functions for chained handlers ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas ARM: 6747/1: P2V: Thumb2 support ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9 ARM: 6772/1: errata: possible fault MMU translations following an ASID switch ARM: 6776/1: mach-ux500: activate fix for errata 753970 ARM: 6794/1: SPEAr: Append UL to device address macros. ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files. ARM: 6681/1: SPEAr: add debugfs support to clk API ARM: 6703/1: SPEAr: update clk API support ARM: 6679/1: SPEAr: make clk API functions more generic ARM: 6737/1: SPEAr: formalized timer support ... Conflicts: arch/arm/mach-msm/board-msm7x27.c arch/arm/mach-msm/board-msm7x30.c arch/arm/mach-msm/board-qsd8x50.c arch/arm/mach-msm/board-sapphire.c arch/arm/mach-msm/include/mach/memory.h
2011-03-10msm: scm: Check for interruption immediatelyStephen Boyd1-24/+27
When we're interrupted on the secure side, we should just issue another smc instruction again instead of replaying the arguments to smc. Fix it. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-03-10msm: scm: Fix improper register assignmentStephen Boyd1-2/+5
Assign the registers used in the inline assembly immediately before the inline assembly block. This ensures the compiler doesn't optimize away dead register assignments when it shouldn't. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: David Brown <davidb@codeaurora.org>
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