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2011-03-17Merge remote branch 'rmk/for-linus' into for-linusDavid Brown1-6/+6
* rmk/for-linus: (1557 commits) ARM: 6806/1: irq: introduce entry and exit functions for chained handlers ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas ARM: 6747/1: P2V: Thumb2 support ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9 ARM: 6772/1: errata: possible fault MMU translations following an ASID switch ARM: 6776/1: mach-ux500: activate fix for errata 753970 ARM: 6794/1: SPEAr: Append UL to device address macros. ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files. ARM: 6681/1: SPEAr: add debugfs support to clk API ARM: 6703/1: SPEAr: update clk API support ARM: 6679/1: SPEAr: make clk API functions more generic ARM: 6737/1: SPEAr: formalized timer support ... Conflicts: arch/arm/mach-msm/board-msm7x27.c arch/arm/mach-msm/board-msm7x30.c arch/arm/mach-msm/board-qsd8x50.c arch/arm/mach-msm/board-sapphire.c arch/arm/mach-msm/include/mach/memory.h
2011-03-09msm: iommu: Don't read from write-only registersStepan Moskovchenko1-28/+0
Don't read from V2Pxx command registers when doing iova-to-phys operations. These registers are write-only and reading the value before modifying the VA bits is unnecessary. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-03-09msm: iommu: Remove dependency on IDRStepan Moskovchenko1-0/+4
Remove the depencency on the IOMMU IDR register, as it may not be accessible depending on the security configuraton. This involves moving the NCB field of IDR into the platform data. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-03-09msm: iommu: Use ASID tagging instead of VMID taggingStepan Moskovchenko1-1/+3
Use ASID tags in the TLB instead of VMID tags in preparation for changes to the secure environment. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-03-09msm: iommu: Rework clock logic and add IOMMU bus clock controlStepan Moskovchenko1-5/+0
Clean up the clock control code in the probe calls, and add support for controlling the clock for the IOMMU bus interconnect. With the (proper) clock driver in place, the clock control logic in the probe function can be made much cleaner since it does not have to deal with the placeholder driver anymore. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Reviewed-by: Trilok Soni <tsoni@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-03-09msm: iommu: Clock control for the IOMMU driverStepan Moskovchenko1-2/+7
Add clock control to the IOMMU driver. The IOMMU bus clock (and potentially an AXI clock) need to be on to gain access to IOMMU registers. Actively control these clocks when needed instead of leaving them on. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-02-28msm: clock: Migrate to clkdevStephen Boyd2-2/+21
Migrating to clkdev has several advantages: * Less code in mach-msm/clock.c * A more robust clk_get() implementation * clk_add_alias() support * clk_get_sys() support In general, this will help board authors setup clock aliases and break the dependency on device pointers in the clock tables. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-02-28msm: Use explicit GPLv2 licensesDavid Brown6-142/+42
Replace a BSD-style license in Code Aurora Forum authored files with an explicit GPLv2. Signed-off-by: David Brown <davidb@codeaurora.org>
2011-02-18ARM: P2V: separate PHYS_OFFSET from platform definitionsRussell King1-5/+5
This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-15Merge branch 'msm-core' into for-nextDavid Brown1-36/+0
* msm-core: msm: iommu: Enable IOMMU support for MSM8960 msm: iommu: Generalize platform data for multiple targets msm: iommu: Create a Kconfig item for the IOMMU driver
2011-02-15msm: iommu: Generalize platform data for multiple targetsStepan Moskovchenko1-36/+0
Make the IOMMU platform data target-independent in preparation for adding MSM8960 IOMMU support. The IOMMU configuration on MSM8x60 and MSM8960 is identical and the same platform data can be used for both. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-28Merge branch 'msm-core' into for-nextDavid Brown1-6/+0
* msm-core: msm: Clean up useless ifdefs msm: clock: Add support for more proc_comm clocks msm: clock: Invert debugfs directory layout msm: clock: Move debugfs code from clock.c to clock-debug.c msm: clock: Remove 7x30 and pcom includes from clock.h msm: clock: Remove unused code and definitions msm: Warning fix in trout gpio board file msm: Remove broken register definition from trout
2011-01-28msm: Clean up useless ifdefsStepan Moskovchenko1-6/+0
Remove ifdefs that do nothing, either from having the code between them previously removed, or from having been accidentally added to the wrong file. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-25Merge branch 'msm-sdcc' into for-nextDavid Brown2-4/+15
* msm-sdcc: msm: 8x50: Add initial support for SDCC mmc: msm_sdcc: Add gpio handling function to driver drivers: mmc: msm: remove clock disable in probe mmc: msm: fix dma usage not to use internal APIs
2011-01-22msm: 8x50: Add initial support for SDCCSahitya Tummala1-4/+4
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
2011-01-22mmc: msm_sdcc: Add gpio handling function to driverSahitya Tummala1-0/+11
Configure SDCC GPIOs when the host is powered up or powered off. Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
2011-01-22msm: Add MSM 8960 cpu_is checkDavid Brown1-0/+6
Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-22msm: irqs-8960: Interrupt map for MSM8960Stepan Moskovchenko2-0/+296
Add the interrupt map for the Qualcomm MSM8960 chip. This chip has an interrupt map that is different from previous targets. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-22msm: Physical offset for MSM8960Stepan Moskovchenko1-0/+2
Add the physical memory offset value for the Qualcomm MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-22msm: io: I/O register definitions for MSM8960Stepan Moskovchenko3-0/+51
Add the register address definitions for the basic hardware blocks on the Qualcomm MSM8960 chip. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-22msm: Generalize QGIC registersDavid Brown2-6/+6
The QGIC registers are mapped to the same virtual addresses across targets, only the physical address changes. Move the BASE address out of target-specific files, and add a SOC name to the base addresses. Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-22msm: Generalize timer register mappingsDavid Brown5-41/+19
Allow the timer register to be determined dynamically instead of at compile time. Use common virtual addresses for the registers across all MSM chips, and select the register mappings based on the detected CPU. Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-22msm: Add CPU queriesDavid Brown1-0/+48
Create runtime queries to distinguish the various MSM targets. Although these would probably be better named soc_is..., use cpu_is... to match convention in the rest of the kernel. Hard code the tests based on config options for now. When runtime device detection is implemented, these can be made dynamic. Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-13Merge branch 'for-next' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits) Documentation/trace/events.txt: Remove obsolete sched_signal_send. writeback: fix global_dirty_limits comment runtime -> real-time ppc: fix comment typo singal -> signal drivers: fix comment typo diable -> disable. m68k: fix comment typo diable -> disable. wireless: comment typo fix diable -> disable. media: comment typo fix diable -> disable. remove doc for obsolete dynamic-printk kernel-parameter remove extraneous 'is' from Documentation/iostats.txt Fix spelling milisec -> ms in snd_ps3 module parameter description Fix spelling mistakes in comments Revert conflicting V4L changes i7core_edac: fix typos in comments mm/rmap.c: fix comment sound, ca0106: Fix assignment to 'channel'. hrtimer: fix a typo in comment init/Kconfig: fix typo anon_inodes: fix wrong function name in comment fix comment typos concerning "consistent" poll: fix a typo in comment ... Fix up trivial conflicts in: - drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c) - fs/ext4/ext4.h Also fix missed 'diabled' typo in drivers/net/bnx2x/bnx2x.h while at it.
2011-01-08msm: timer: SMP timer support for msmJeff Ohlstein1-1/+5
The msm provides timer hardware that is private to each core. Each timer has separate counter and match registers, so we create separate clock_event_devices for each core. For the global clocksource, use cpu 0's counter. Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-07Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds1-2/+2
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (416 commits) ARM: DMA: add support for DMA debugging ARM: PL011: add DMA burst threshold support for ST variants ARM: PL011: Add support for transmit DMA ARM: PL011: Ensure IRQs are disabled in UART interrupt handler ARM: PL011: Separate hardware FIFO size from TTY FIFO size ARM: PL011: Allow better handling of vendor data ARM: PL011: Ensure error flags are clear at startup ARM: PL011: include revision number in boot-time port printk ARM: vexpress: add sched_clock() for Versatile Express ARM i.MX53: Make MX53 EVK bootable ARM i.MX53: Some bug fix about MX53 MSL code ARM: 6607/1: sa1100: Update platform device registration ARM: 6606/1: sa1100: Fix platform device registration ARM i.MX51: rename IPU irqs ARM i.MX51: Add ipu clock support ARM: imx/mx27_3ds: Add PMIC support ARM: DMA: Replace page_to_dma()/dma_to_page() with pfn_to_dma()/dma_to_pfn() mx51: fix usb clock support MX51: Add support for usb host 2 arch/arm/plat-mxc/ehci.c: fix errors/typos ...
2010-12-22Merge branch 'master' into for-nextJiri Kosina1-1/+1
Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
2010-12-17MSM: Add USB support for MSM7x30Pavankumar Kondeti1-0/+3
Add USB OTG, peripheral and host devices. This patch also adds usb_phy_clk which is required for resetting the PHY. VBUS power up and shutdown routines depends on PMIC module. As PMIC driver is unavailable, configure USB in peripheral only mode. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2010-12-10fix comment typos concerning "consistent"Uwe Kleine-König1-1/+1
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-12-03ARM: SMP: pass an ipi number to smp_cross_call()Russell King1-2/+2
This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-01msm: iommu: Definitions for extended memory attributesStepan Moskovchenko2-1/+34
Add the register field definitions and memory attribute definitions that will be needed to support IOMMU transactions with cache-coherent memory access. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-12-01msm: iomap: Addresses and IRQs for 2nd GFX core IOMMUStepan Moskovchenko2-1/+9
Add register addresses and IRQ numbers for the IOMMU used for the second 2D graphics core. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-12-01msm: iommu: Increase maximum MID size to 5 bitsStepan Moskovchenko1-1/+1
On msm8x60, the MID field on the AXI connection to the IOMMU can be up to five bits wide. Thus, allow the IOMMU context platform data to map up to 32 MIDs. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-11-22ARM: 6484/1: fix compile warning in mm/init.cAnand Gadiyar1-1/+1
Commit 7c63984b86 (ARM: do not define VMALLOC_END relative to PAGE_OFFSET) changed VMALLOC_END to be an explicit value. Before this, it was relative to PAGE_OFFSET and therefore converted to unsigned long as PAGE_OFFSET is an unsigned long. This introduced the following build warning. Fix this by changing the explicit defines of VMALLOC_END to be unsigned long. CC arch/arm/mm/init.o arch/arm/mm/init.c: In function 'mem_init': arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int' Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Acked-by: Uwe Kleine-K <u.kleine-koenig@pengutronix.dee> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-16msm: make constant unsigned long to correct format warningDavid Brown1-1/+1
Define VMALLOC_END as an unsigned long to match expected type. Eliminates a warning: arch/arm/mm/init.c: In function 'mem_init': arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int' Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-30msm: fix compile failure when no debug uart is selectedDaniel Walker1-1/+1
If the board has a debug uart the user is given a choice of which uart to use. The user can also select NONE, which means not to use one. In most of our header files when NONE is selected nothing is defined for MSM_DEBUG_UART_PHYS or MSM_DEBUG_UART_BASE. This causes a compile failure in debug-macro.S which expect something to be defined there. Example of the failure, arch/arm/kernel/built-in.o: In function `hexbuf': linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_PHYS' linux-2.6/arch/arm/kernel/debug.S:186: undefined reference to `MSM_DEBUG_UART_BASE' This fixes the compile failure by adding an ifdef to debug-macro.S that removes all the debug uart code in the case of NONE. Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-30msm: fix debug-macro.S build failureDaniel Walker1-1/+12
Originally there was an ifdef case to handle when no debug uart was selected. In commit 0ea1293009826da45e1019f45dfde1e557bb30df that case was removed which causes the following build failure, linux-2.6/arch/arm/kernel/debug.S: Assembler messages: linux-2.6/arch/arm/kernel/debug.S:174: Error: bad instruction `addruart r1,r2' linux-2.6/arch/arm/kernel/debug.S:176: Error: bad instruction `waituart r2,r3' linux-2.6/arch/arm/kernel/debug.S:177: Error: bad instruction `senduart r1,r3' linux-2.6/arch/arm/kernel/debug.S:178: Error: bad instruction `busyuart r2,r3' linux-2.6/arch/arm/kernel/debug.S:190: Error: bad instruction `addruart r1,r2' This is a partial revert to add back the case which was removed with two caveats. First the API for the addruart macro was updated, and the new addruart case now return 0xfff00000 so that a know IO mapping is created instead of a random one. Cc: Jeremy Kerr <jeremy.kerr@canonical.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Jason Wang <jason77.wang@gmail.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-20arm: return both physical and virtual addresses from addruartJeremy Kerr1-16/+4
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-10-19Merge branch 'msm-core' of ↵Russell King16-154/+2527
git://codeaurora.org/quic/kernel/dwalker/linux-msm into devel-stable
2010-10-09msm: Platform data for msm8x60 IOMMUsStepan Moskovchenko1-0/+33
Add the platform data for the IOMMUs found on the Qualcomm msm8x60 SoC. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: Add MSM IOMMU supportStepan Moskovchenko2-0/+1974
Add support for the IOMMUs found on the upcoming Qualcomm MSM8x60 chips. These IOMMUs allow virtualization of the address space used by most of the multimedia cores on these chips. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: physical offset for MSM8X60Jeff Ohlstein1-0/+2
The MSM8x60 has a different physical memory offset than other targets. Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: allow uart to be conditionally disabledDaniel Walker1-1/+1
Some MSM targets don't select the debug UART in this way. For those we need to disable this selection mechanism. Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: dma: add stub functions for dma features not yet present on 8x60Daniel Walker1-1/+9
Signed-off-by: Daniel Walker <dwalker@codeaurora.org> Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: irq: rename existing entry-macro to entry-macro-vicSteve Muckle4-29/+178
The existing MSM irq entry macro is specific to a VIC implementation. Renaming this makes room for irq support based on other interrupt controllers. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: MSM8X60 RUMI3 board supportSteve Muckle1-0/+2
Board configuration for MSM8X60 emulation on RUMI3. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: timer: support 8x60 timersJeff Ohlstein1-0/+7
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: irqs-8x60: interrupt mapAbhijeet Dharmapurikar1-0/+225
Define the interrupt map in irq-8x60.h Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: initial irq definitions for MSM8X60Steve Muckle2-0/+30
IRQ assignments are different for MSM8X60 than other existing MSMs. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-10-09msm: io: MSM8X60 io supportSteve Muckle3-0/+22
MSM8X60 has different IO mappings than previous MSMs. Signed-off-by: Steve Muckle <smuckle@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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