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path: root/arch/arm/mach-mmp/irq-mmp2.c
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2012-05-05ARM: mmp: support DT in irqHaojian Zhuang1-158/+0
Merge irq-pxa168 and irq-mmp2. And support device tree also. Since CONFIG_SPARSE_IRQ is enabled in arch-mmp, base irq starts from NR_IRQS_LEGACY. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-01-26ARM: mmp: remove NR_IRQSRob Herring1-0/+1
Remove NR_IRQS and add a per machine .nr_irqs setting. Clean-up namespace replacing usage of IRQ_BOARD_START with MMP_NR_IRQS. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2011-03-29arm: Cleanup the irq namespaceThomas Gleixner1-9/+9
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-01-13ARM: mmp: irq_data conversion.Lennert Buytenhek1-22/+24
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
2010-08-05[ARM] mmp: move declarations into SoC specific header file from common.hEric Miao1-0/+1
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02[ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded ↵Eric Miao1-1/+5
IRQs The irq_chip is not yet registered, so no default irq_chip.mask_ack(), which we have to handle it correctly manually here. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02[ARM] mmp2: add handling on PMIC IRQHaojian Zhuang1-1/+11
Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs to be cleared after PMIC IRQ occured. Now append the clear operation in irq chip handler. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02[ARM] mmp2: add gpio initializationHaojian Zhuang1-1/+1
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02[ARM] mmp2: add mask function in irq-mmp2.cHaojian Zhuang1-0/+2
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-03-02[ARM] mmp: add support for Marvell MMP2Haojian Zhuang1-0/+138
Marvell MMP2 (aka ARMADA610) is a SoC based on PJ4 core. It's ARMv6 compatible. Support basic interrupt handler and timer, and basic support for MMP2 based FLINT platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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