| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
PrPMC1100 is handled by IXDP425 platform code, there is no need for
duplicate set of macros. Remove them.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
IXP4xx CPUs can indirectly access the whole 4 GB PCI MMIO address space (using
the non-prefetch registers). Previously the available space depended on the CPU
variant, since one of the IXP43x platforms needed more than the usual 128 MB.
1 GB should be enough for everyone, and if not, we can trivially increase it.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Instead of including the heavy linux/mm.h for VMALLOC_START, test the addresses
against PCI MIN and MAX addresses. Indirect PCI uses 1:1 mapping for MMIO space
making this change possible.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
clarity.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
The indexes were signed, so negatives were possible.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
The repetitive in/out functions must preserve order, not value.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Clock generators used by IXP4xx processors are usually 33.333 MHz, sometimes
33.33 MHz and few platforms use 33 MHz. The timers tick twice as fast,
that means 66.666, 66.66 or 66 MHz. Current 66.666666 MHz means 10 ppm
offset from the usual 66.666 MHz.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
The body of the mach-ixp4xx arch_idle() is mysteriously
disabled by an #if 0 .. #endif. Normally one would expect
to find a call to cpu_do_idle() there, but that call is
disabled, even though cpu_do_idle() is implemented for
XScale cores (and ixp4xx is one).
The explanation can be found in the ixp42x developer's manual
which states that the XScale core clock and power management
registers aren't implemented on ixp42x [3.5.2.2].
Also, the disabled code has suffered from bit rot:
- it checks hlt_counter which is obsolete, as that variable
and all related code now is private to kernel/process.c
- it passes too many parameters to cpu_do_idle()
So this patch:
- adds a comment before the #if 0 to explain why
cpu_do_idle() mustn't be called on ixp4xx
- removes the obsolete test of hlt_counter and the
obsolete parameter to cpu_do_idle()
This is purely a documentation fixup and changes no
generated code. Even so, it has been tested on an
ixp420 machine (ds101).
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
This patch does a few simple cleanups of the ixp4xx timer
and clocksource/clockevent code in mach-ixp4xx/common.c:
- ixp4xx_clocksource_init() is static and always returns 0,
which is ignored by its only caller: make it return void
- ixp4xx_clockevent_init(): ditto
- ixp4xx_get_cycles() is only referenced locally: make it static
- use the ixp4xx_timer_irq.dev_id field to pass &clockevent_ixp4xx
to ixp4xx_timer_interrupt() via its dev_id parameter, allowing
the code in ixp4xx_timer_interrupt() to be smaller and faster
Tested on an ixp420 machine (ds101).
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1623 commits)
netxen: update copyright
netxen: fix tx timeout recovery
netxen: fix file firmware leak
netxen: improve pci memory access
netxen: change firmware write size
tg3: Fix return ring size breakage
netxen: build fix for INET=n
cdc-phonet: autoconfigure Phonet address
Phonet: back-end for autoconfigured addresses
Phonet: fix netlink address dump error handling
ipv6: Add IFA_F_DADFAILED flag
net: Add DEVTYPE support for Ethernet based devices
mv643xx_eth.c: remove unused txq_set_wrr()
ucc_geth: Fix hangs after switching from full to half duplex
ucc_geth: Rearrange some code to avoid forward declarations
phy/marvell: Make non-aneg speed/duplex forcing work for 88E1111 PHYs
drivers/net/phy: introduce missing kfree
drivers/net/wan: introduce missing kfree
net: force bridge module(s) to be GPL
Subject: [PATCH] appletalk: Fix skb leak when ipddp interface is not loaded
...
Fixed up trivial conflicts:
- arch/x86/include/asm/socket.h
converted to <asm-generic/socket.h> in the x86 tree. The generic
header has the same new #define's, so that works out fine.
- drivers/net/tun.c
fix conflict between 89f56d1e9 ("tun: reuse struct sock fields") that
switched over to using 'tun->socket.sk' instead of the redundantly
available (and thus removed) 'tun->sk', and 2b980dbd ("lsm: Add hooks
to the TUN driver") which added a new 'tun->sk' use.
Noted in 'next' by Stephen Rothwell.
|
|
HSS usually uses external clocks, so it's not a big deal. Internal clock
is used for direct DTE-DTE connections and when the DCE doesn't provide
it's own clock.
This also depends on the oscillator frequency. Intel seems to have
calculated the clock register settings for 33.33 MHz (66.66 MHz timer
base). Their settings seem quite suboptimal both in terms of average
frequency (60 ppm is unacceptable for G.703 applications, their primary
intended usage(?)) and jitter.
Many (most?) platforms use a 33.333 MHz oscillator, a 10 ppm difference
from Intel's base.
Instead of creating static tables, I've created a procedure to program
the HSS clock register. The register consists of 3 parts (A, B, C).
The average frequency (= bit rate) is:
66.66x MHz / (A + (B + 1) / (C + 1))
The procedure aims at the closest average frequency, possibly at the
cost of increased jitter. Nobody would be able to directly drive an
unbufferred transmitter with a HSS anyway, and the frequency error is
what it really counts.
I've verified the above with an oscilloscope on IXP425. It seems IXP46x
and possibly IXP43x use a bit different clock generation algorithm - it
looks like the avg frequency is:
(on IXP465) 66.66x MHz / (A + B / (C + 1)).
Also they use much greater precomputed A and B - on IXP425 it would
simply result in more jitter, but I don't know how does it work on
IXP46x (perhaps 3 least significant bits aren't used?).
Anyway it looks that they were aiming for exactly +60 ppm or -60 ppm,
while <1 ppm is typically possible (with a synchronized clock, of
course).
The attached patch makes it possible to set almost any bit rate
(my IXP425 533 MHz quits at > 22 Mb/s if a single port is used, and the
minimum is ca. 65 Kb/s).
This is independent of MVIP (multi-E1/T1 on one HSS) mode.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
2.6.31-rc kernels don't boot on my ixp4xx box (ds101), because the libata
driver doesn't find the PCI IDE controller any more. 2.6.30 was fine.
I traced this to a PCI update (1f82de10d6b1d845155363c895c552e61b36b51a)
in 2.6.30-git19. Diffing the kernel boot logs from 2.6.30-git18 and
2.6.30-git19 illustrates the breakage:
> --- dmesg-2.6.30-git18 2009-08-04 01:45:22.000000000 +0200
> +++ dmesg-2.6.30-git19 2009-08-04 01:45:46.000000000 +0200
> @@ -26,6 +26,13 @@
> pci 0000:00:02.2: PME# supported from D0 D1 D2 D3hot
> pci 0000:00:02.2: PME# disabled
> PCI: bus0: Fast back to back transfers disabled
> +pci 0000:00:01.0: BAR 0: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 1: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 2: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 3: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:01.0: BAR 4: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:02.0: BAR 4: can't allocate I/O resource [0x10000-0xffff]
> +pci 0000:00:02.1: BAR 4: can't allocate I/O resource [0x10000-0xffff]
> bio: create slab <bio-0> at 0
> SCSI subsystem initialized
> NET: Registered protocol family 2
> @@ -44,11 +51,7 @@
> console [ttyS0] enabled
> serial8250.0: ttyS1 at MMIO 0xc8001000 (irq = 13) is a XScale
> Driver 'sd' needs updating - please use bus_type methods
> -PCI: enabling device 0000:00:01.0 (0140 -> 0141)
> -scsi0 : pata_artop
> -scsi1 : pata_artop
> -ata1: PATA max UDMA/100 cmd 0x1050 ctl 0x1060 bmdma 0x1040 irq 28
> -ata2: PATA max UDMA/100 cmd 0x1058 ctl 0x1064 bmdma 0x1048 irq 28
> +pata_artop 0000:00:01.0: no available native port
> Using configured DiskOnChip probe address 0x50000000
> DiskOnChip found at 0x50000000
> NAND device: Manufacturer ID: 0x98, Chip ID: 0x73 (Toshiba NAND 16MiB 3,3V 8-bit)
The specific change in 1f82de10d6b1d845155363c895c552e61b36b51a responsible
for this failure turned out to be the following:
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -193,7 +193,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
> res->flags |= pci_calc_resource_flags(l) | IORESOURCE_SIZEALIGN;
> if (type == pci_bar_io) {
> l &= PCI_BASE_ADDRESS_IO_MASK;
> - mask = PCI_BASE_ADDRESS_IO_MASK & 0xffff;
> + mask = PCI_BASE_ADDRESS_IO_MASK & IO_SPACE_LIMIT;
> } else {
> l &= PCI_BASE_ADDRESS_MEM_MASK;
> mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
Every arch except arm's ixp4xx defines IO_SPACE_LIMIT as an all-bits-one
bitmask, typically -1UL but sometimes only a 16-bit 0x0000ffff. But ixp4xx
defines it as 0xffff0000, which is now causing the PCI failures.
Russell King noted that ixp4xx has 64KB PCI IO space, so IO_SPACE_LIMIT
should be 0x0000ffff. This patch makes that change, which fixes the PCI
failures on my ixp4xx box.
Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
comments.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (26 commits)
bonding: fix panic if initialization fails
IXP4xx: complete Ethernet netdev setup before calling register_netdev().
IXP4xx: use "ENODEV" instead of "ENOSYS" in module initialization.
ipvs: Fix IPv4 FWMARK virtual services
ipv4: Make INET_LRO a bool instead of tristate.
net: remove stale reference to fastroute from Kconfig help text
net: update skb_recycle_check() for hardware timestamping changes
bnx2: Fix panic in bnx2_poll_work().
net-sched: fix bfifo default limit
igb: resolve panic on shutdown when SR-IOV is enabled
wimax: oops: wimax_dev_add() is the only one that can initialize the state
wimax: fix oops if netlink fails to add attribute
Bluetooth: Move dev_set_name() to a context that can sleep
netfilter: ctnetlink: fix wrong message type in user updates
netfilter: xt_cluster: fix use of cluster match with 32 nodes
netfilter: ip6t_ipv6header: fix match on packets ending with NEXTHDR_NONE
netfilter: add missing linux/types.h include to xt_LED.h
mac80211: pid, fix memory corruption
mac80211: minstrel, fix memory corruption
cfg80211: fix comment on regulatory hint processing
...
|
|
ENOSYS makes modutils complain about missing kernel module support.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Pass clocksource pointer to the read() callback for clocksources. This
allows us to share the callback between multiple instances.
[hugh@veritas.com: fix powerpc build of clocksource pass clocksource mods]
[akpm@linux-foundation.org: cleanup]
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
|
OMAP wishes to pass state to the boot loader upon reboot in order to
instruct it whether to wait for USB-based reflashing or not. There is
already a facility to do this via the reboot() syscall, except we ignore
the string passed to machine_restart().
This patch fixes things to pass this string to arch_reset(). This means
that we keep the reboot mode limited to telling the kernel _how_ to
perform the reboot which should be independent of what we request the
boot loader to do.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Map unused registers at the end of DMA region at 64 MB to allow PCI masters
to cross the boundary when prefetching data from SDRAM.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (66 commits)
x86: export vector_used_by_percpu_irq
x86: use logical apicid in x2apic_cluster's x2apic_cpu_mask_to_apicid_and()
sched: nominate preferred wakeup cpu, fix
x86: fix lguest used_vectors breakage, -v2
x86: fix warning in arch/x86/kernel/io_apic.c
sched: fix warning in kernel/sched.c
sched: move test_sd_parent() to an SMP section of sched.h
sched: add SD_BALANCE_NEWIDLE at MC and CPU level for sched_mc>0
sched: activate active load balancing in new idle cpus
sched: bias task wakeups to preferred semi-idle packages
sched: nominate preferred wakeup cpu
sched: favour lower logical cpu number for sched_mc balance
sched: framework for sched_mc/smt_power_savings=N
sched: convert BALANCE_FOR_xx_POWER to inline functions
x86: use possible_cpus=NUM to extend the possible cpus allowed
x86: fix cpu_mask_to_apicid_and to include cpu_online_mask
x86: update io_apic.c to the new cpumask code
x86: Introduce topology_core_cpumask()/topology_thread_cpumask()
x86: xen: use smp_call_function_many()
x86: use work_on_cpu in x86/kernel/cpu/mcheck/mce_amd_64.c
...
Fixed up trivial conflict in kernel/time/tick-sched.c manually
|
|
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (407 commits)
[ARM] pxafb: add support for overlay1 and overlay2 as framebuffer devices
[ARM] pxafb: cleanup of the timing checking code
[ARM] pxafb: cleanup of the color format manipulation code
[ARM] pxafb: add palette format support for LCCR4_PAL_FOR_3
[ARM] pxafb: add support for FBIOPAN_DISPLAY by dma braching
[ARM] pxafb: allow pxafb_set_par() to start from arbitrary yoffset
[ARM] pxafb: allow video memory size to be configurable
[ARM] pxa: add document on the MFP design and how to use it
[ARM] sa1100_wdt: don't assume CLOCK_TICK_RATE to be a constant
[ARM] rtc-sa1100: don't assume CLOCK_TICK_RATE to be a constant
[ARM] pxa/tavorevb: update board support (smartpanel LCD + keypad)
[ARM] pxa: Update eseries defconfig
[ARM] 5352/1: add w90p910-plat config file
[ARM] s3c: S3C options should depend on PLAT_S3C
[ARM] mv78xx0: implement GPIO and GPIO interrupt support
[ARM] Kirkwood: implement GPIO and GPIO interrupt support
[ARM] Orion: share GPIO IRQ handling code
[ARM] Orion: share GPIO handling code
[ARM] s3c: define __io using the typesafe version
[ARM] S3C64XX: Ensure CPU_V6 is selected
...
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
|
|
Impact: change calling convention of existing clock_event APIs
struct clock_event_timer's cpumask field gets changed to take pointer,
as does the ->broadcast function.
Another single-patch change. For safety, we BUG_ON() in
clockevents_register_device() if it's not set.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: Ingo Molnar <mingo@elte.hu>
|
|
As Al did for Versatile in 2ad4f86b60b649fd7428265c08d73a3bd360c81b,
add a typesafe __io implementation for platforms to use. Convert
platforms to use this new simple typesafe implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
When ISA_DMA_API is unset, we're not implementing the ISA DMA API,
so there's no point in publishing the prototypes via asm/dma.h, nor
including the machine dependent parts of that API.
This allows us to remove a lot of mach/dma.h files which don't contain
any useful code. Unfortunately though, some platforms put their own
private non-ISA definitions into mach/dma.h, so we leave these behind
and fix the appropriate #include statments.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h,
thereby placing it along side its relative, ISA_DMA_THRESHOLD.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
mach/io.h doesn't need linux/mm.h.
mach/dma.h doesn't need linux/device.h, asm/page.h or mach/hardware.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Let's provide an overridable default instead of having every machine
class define __virt_to_bus and __bus_to_virt to the same thing. What
most platforms are using is bus_addr == phys_addr so such is the default.
One exception is ebsa110 which has no DMA what so ever, so the actual
definition is not important except only for proper compilation. Also
added a comment about the special footbridge bus translation.
Let's also remove comments alluding to set_dma_addr which is not
(and should not) be commonly used.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/wireless/p54/p54common.c
|
