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2011-08-22ARM: mach-cns3xxx: convert boot_params to atag_offsetNicolas Pitre1-1/+1
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
2011-07-30Merge branch 'linux-next' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: PCI: remove printks about disabled bridge windows PCI: fold pci_calc_resource_flags() into decode_bar() PCI: treat mem BAR type "11" (reserved) as 32-bit, not 64-bit, BAR PCI: correct pcie_set_readrq write size PCI: pciehp: change wait time for valid configuration access x86/PCI: Preserve existing pci=bfsort whitelist for Dell systems PCI: ARI is a PCIe v2 feature x86/PCI: quirks: Use pci_dev->revision PCI: Make the struct pci_dev * argument of pci_fixup_irqs const. PCI hotplug: cpqphp: use pci_dev->vendor PCI hotplug: cpqphp: use pci_dev->subsystem_{vendor|device} x86/PCI: config space accessor functions should not ignore the segment argument PCI: Assign values to 'pci_obff_signal_type' enumeration constants x86/PCI: reduce severity of host bridge window conflict warnings PCI: enumerate the PCI device only removed out PCI hieratchy of OS when re-scanning PCI PCI: PCIe AER: add aer_recover_queue x86/PCI: select direct access mode for mmconfig option PCI hotplug: Rename is_ejectable which also exists in dock.c
2011-07-27Merge branch 'next/devel' of ↵Linus Torvalds3-0/+51
ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits) ARM: S5P64X0: External Interrupt Support ARM: EXYNOS4: Enable MFC on Samsung NURI ARM: EXYNOS4: Enable MFC on universal_c210 ARM: S5PV210: Enable MFC on Goni ARM: S5P: Add support for MFC device ARM: EXYNOS4: Add support FIMD on SMDKC210 ARM: EXYNOS4: Add platform device and helper functions for FIMD ARM: EXYNOS4: Add resource definition for FIMD ARM: EXYNOS4: Change devname for FIMD clkdev ARM: SAMSUNG: Add IRQ_I2S0 definition ARM: SAMSUNG: Add platform device for idma ARM: EXYNOS4: Add more registers to be saved and restored for PM ARM: EXYNOS4: Add more register addresses of CMU ARM: EXYNOS4: Add platform device for dwmci driver ARM: EXYNOS4: configure rtc-s3c on NURI ARM: EXYNOS4: configure MAX8903 secondary charger on NURI ARM: EXYNOS4: configure ADC on NURI ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs ... Fix up tons of silly conflicts: - arch/arm/mach-davinci/include/mach/psc.h - arch/arm/mach-exynos4/Kconfig - arch/arm/mach-exynos4/mach-smdkc210.c - arch/arm/mach-exynos4/pm.c - arch/arm/mach-imx/mm-imx1.c - arch/arm/mach-imx/mm-imx21.c - arch/arm/mach-imx/mm-imx25.c - arch/arm/mach-imx/mm-imx27.c - arch/arm/mach-imx/mm-imx31.c - arch/arm/mach-imx/mm-imx35.c - arch/arm/mach-mx5/mm.c - arch/arm/mach-s5pv210/mach-goni.c - arch/arm/mm/Kconfig
2011-07-27Merge branch 'next/cross-platform' of ↵Linus Torvalds3-23/+3
git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/cross-platform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: ARM: Consolidate the clkdev header files ARM: set vga memory base at run-time ARM: convert PCI defines to variables ARM: pci: make pcibios_assign_all_busses use pci_has_flag ARM: remove unnecessary mach/hardware.h includes pci: move microblaze and powerpc pci flag functions into asm-generic powerpc: rename ppc_pci_*_flags to pci_*_flags Fix up conflicts in arch/microblaze/include/asm/pci-bridge.h
2011-07-27atomic: use <linux/atomic.h>Arun Sharma2-2/+2
This allows us to move duplicated code in <asm/atomic.h> (atomic_inc_not_zero() for now) to <linux/atomic.h> Signed-off-by: Arun Sharma <asharma@fb.com> Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Cc: Eric Dumazet <eric.dumazet@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-07-22PCI: Make the struct pci_dev * argument of pci_fixup_irqs const.Ralf Baechle1-1/+1
Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> To: Anton Vorontsov <avorontsov@mvista.com> To: Chris Metcalf <cmetcalf@tilera.com> To: Colin Cross <ccross@android.com> Acked-by: "David S. Miller" <davem@davemloft.net> To: Eric Miao <eric.y.miao@gmail.com> To: Erik Gilling <konkers@android.com> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> To: "H. Peter Anvin" <hpa@zytor.com> To: Imre Kaloz <kaloz@openwrt.org> To: Ingo Molnar <mingo@redhat.com> To: Ivan Kokshaysky <ink@jurassic.park.msu.ru> To: Jesse Barnes <jbarnes@virtuousgeek.org> To: Krzysztof Halasa <khc@pm.waw.pl> To: Lennert Buytenhek <kernel@wantstofly.org> To: Matt Turner <mattst88@gmail.com> To: Nicolas Pitre <nico@fluxnic.net> To: Olof Johansson <olof@lixom.net> Acked-by: Paul Mundt <lethal@linux-sh.org> To: Richard Henderson <rth@twiddle.net> To: Russell King <linux@arm.linux.org.uk> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-07-12ARM: convert PCI defines to variablesRob Herring2-21/+3
Convert PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to variables to allow multi-platform builds. This also removes the requirement for a platform to have a mach/hardware.h. The default values for i/o and mem are 0x1000 and 0x01000000, respectively. Per Arnd Bergmann, other values are likely to be incorrect, but this commit does not try to address that issue. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-12ARM: pci: make pcibios_assign_all_busses use pci_has_flagRob Herring1-1/+0
Convert pcibios_assign_all_busses from a define to inline so platforms can control this setting. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-12ARM: remove unnecessary mach/hardware.h includesRob Herring1-1/+0
Remove some includes of mach/hardware.h which are not needed. hardware.h will be removed completely for tegra and cns3xxx in follow on patch. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-08ARM: CNS3XXX: add UL suffix to VMALLOC_END to ensure it is properly typedBarry Song1-1/+1
Signed-off-by: Barry Song <baohua.song@csr.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-07-07ARM: cns3xxx: Add support for L2 Cache ControllerAnton Vorontsov3-0/+51
CNS3xxx SOCs have L310-compatible cache controller, so let's use it. With this patch benchmarking with 'gzip' shows that performance is doubled, and I'm still able to boot full-fledged userland over NFS (using PCIe NIC), so the support should be pretty robust. p.s. While CNS3xxx reports that it has PL310, it still needs to wait on cache line operations, so we should not select 'CACHE_PL310', which is a micro-optimization that removes these waits for v7 CPUs. Someday we'd better rename CACHE_PL310 Kconfig option into NO_CACHE_WAIT or something less ambiguous. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2011-02-18ARM: P2V: separate PHYS_OFFSET from platform definitionsRussell King1-1/+1
This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Magnus Damm <damm@opensource.se> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-01-07Merge branch 'devel-stable' into develRussell King6-4/+101
Conflicts: arch/arm/mach-pxa/clock.c arch/arm/mach-pxa/clock.h
2011-01-07Merge branch 'misc' into develRussell King1-0/+1
Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
2011-01-03Merge branch 'master' of git://git.infradead.org/users/cbou/linux-cns3xxx ↵Russell King6-4/+101
into devel-stable
2010-12-14ARM: GIC: private a standard get_irqnr_preamble assembler macroRussell King1-5/+0
Provide a standard get_irqnr_preamble assembler macro for platforms to use, which retrieves the base address of the GIC CPU interface from gic_cpu_base_addr. Allow platforms to override this by defining HAVE_GET_IRQNR_PREAMBLE. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: consolidate gic_cpu_base_addr to common GIC codeRussell King2-5/+1
Every architecture using the GIC has a gic_cpu_base_addr pointer for GIC 0 for their entry assembly code to use to decode the cause of the current interrupt. Move this into the common GIC code. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: GIC: provide a single initialization function for boot CPURussell King1-2/+2
Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-07ARM: 6476/1: Use shared GIC entry macros on CNS3XXXMagnus Damm1-60/+1
Use the GIC demux code in asm/hardware/entry-macro-gic.S on the CNS3XXX subarchitecture. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-05ARM: 6520/1: Kconfig: add new symbol MIGHT_HAVE_PCIHans Ulli Kroll1-0/+1
Today more boards with arm cpu have selectable pci bus. This patch makes this more scalable and remove line continuations in Kconfig Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-29ARM: cns3xxx: Fix build with CONFIG_PCI=yAnton Vorontsov1-1/+1
commit 6338a6aa7c082f11d55712251e14178c68bf5869 ("ARM: 6269/1: Add 'code' parameter for hook_fault_code()") breaks CNS3xxx build: CC arch/arm/mach-cns3xxx/pcie.o pcie.c: In function 'cns3xxx_pcie_init': pcie.c:373: warning: passing argument 4 of 'hook_fault_code' makes integer from pointer without a cast pcie.c:373: error: too few arguments to function 'hook_fault_code' This commit fixes the small issue. Cc: stable@kernel.org [36] Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
2010-11-26ARM: cns3xxx: Add architecture definition for EHCI/OHCI controllerMac Lin4-2/+62
This patch add plateform_device for EHCI and OHCI controller on CNS3XXX. Power reference count (usb_pwr_ref) is used to control enabling and disabling the single clock control for both EHCI and OHCI controller. It also removes EHCI/OHCI unused virtual address definitions. Signed-off-by: Mac Lin <mkl0301@gmail.com> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
2010-11-26ARM: cns3xxx: Add new and export the old power management functionsMac Lin4-2/+38
This patch adds cns3xxx_pwr_clk_dis, and exports these power management functions that may be used by many other device drivers on CNS3XXX. Signed-off-by: Mac Lin <mkl0301@gmail.com> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
2010-11-26ARM: cns3xxx: Make cns3xxx_pwr_soft_rst_force() to actually reset blocksAnton Vorontsov1-0/+1
commit 6eb5d146d4535 ("ARM: cns3xxx: Use IO memory accessors everywhere") breaks cns3xxx_pwr_soft_rst_force() function, so that it doesn't write cleared bit into the register. This patch fixes the issue by adding the necessary __raw_writel(). Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
2010-10-20arm: remove machine_desc.io_pg_offst and .phys_ioNicolas Pitre1-2/+0
Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
2010-10-20arm: return both physical and virtual addresses from addruartJeremy Kerr1-6/+4
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
2010-06-08ARM: cns3xxx: Add support for AHCI controllersAnton Vorontsov3-0/+54
CNS3xxx chips have AHCI-compatible SATA controller. This patch adds the support using generic ahci_platform driver. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2010-06-08ARM: cns3xxx: Add support for SDHCI controllersAnton Vorontsov4-1/+82
CNS3xxx chips have SDHCI-compatible SDIO/SD/MMC controller. This patch adds the support using sdhci-cns3xxx driver. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2010-06-08ARM: cns3xxx: Add support for PCI Express portsAnton Vorontsov2-0/+390
This patch adds PCIe support for CNS3xxx-based boards. The support was tested with a directly attached SKY2 NIC, and EHCI USB controller behind the PLX PEX8112 P2P bridge (to make sure that type1 cfg cycles work as expected). Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2010-06-08ARM: cns3xxx: Use IO memory accessors everywhereAnton Vorontsov2-54/+68
Before it isn't too late let's switch to IO memory accessors. This patch converts all current _REG users and _REG definitions. There should be no functional changes. Suggested-by: Ben Dooks <ben-linux@fluff.org> Suggested-by: Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2010-05-02ARM: cns3xxx: Add CNS3420 Validation Board supportAnton Vorontsov3-0/+157
This patch adds support for CNS3420VB rev 1.3 boards. With this patch CNS3420VB boards are able to boot up to the userspace, with a console available on UART0. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2010-05-02ARM: cns3xxx: Add basic support for Cavium Networks CNS3xxx processorsAnton Vorontsov17-0/+1300
This patch adds very basic support for ECONA CNS3xxx ARM11 MPcore (ARMv6) dual-core processors. Note that SMP is not yet supported, as well as many peripheral devices. Support for these features will be added later. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
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