summaryrefslogtreecommitdiff
path: root/arch/arm/mach-at91
AgeCommit message (Collapse)AuthorFilesLines
2022-07-12ARM: at91: pm: use proper compatibles for sam9x60's rtc and rttClaudiu Beznea1-2/+2
[ Upstream commit 641522665dbb25ce117c78746df1aad8b58c80e5 ] Use proper compatible strings for SAM9X60's RTC and RTT IPs. These are necessary for configuring wakeup sources for ULP1 PM mode. Fixes: eaedc0d379da ("ARM: at91: pm: add ULP1 support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220523092421.317345-3-claudiu.beznea@microchip.com Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-07-12ARM: at91: pm: use proper compatible for sama5d2's rtcClaudiu Beznea1-1/+1
[ Upstream commit ddc980da8043779119acaca106c6d9b445c9b65b ] Use proper compatible strings for SAMA5D2's RTC IPs. This is necessary for configuring wakeup sources for ULP1 PM mode. Fixes: d7484f5c6b3b ("ARM: at91: pm: configure wakeup sources for ULP1 mode") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220523092421.317345-2-claudiu.beznea@microchip.com Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-10-13ARM: at91: pm: do not panic if ram controllers are not enabledClaudiu Beznea1-11/+47
[ Upstream commit 1605de1b3ca66e3eddbca4b3c353c13c26476fe2 ] In case PM is enabled but there is no RAM controller information in DT the code will panic. Avoid such scenarios by not initializing platform specific PM code in case RAM controller is not provided via DT. Reported-by: Eugen Hristev <eugen.hristev@microchip.com> Fixes: 827de1f123ba0 ("ARM: at91: remove at91_dt_initialize and machine init_early()") Fixes: 892e1f4a3ae58 ("ARM: at91: pm: add sama7g5 ddr phy controller") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210823131915.23857-2-claudiu.beznea@microchip.com Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-03-04ARM: at91: use proper asm syntax in pm_suspendArnd Bergmann1-1/+1
[ Upstream commit d30337da8677cd73cb19444436b311c13e57356f ] Compiling with the clang integrated assembler warns about a recently added instruction: <instantiation>:14:13: error: unknown token in expression ldr tmp1, =#0x00020010UL arch/arm/mach-at91/pm_suspend.S:542:2: note: while in macro instantiation at91_plla_enable Remove the extra '#' character that is not used for the 'ldr' instruction when doing an indirect load of a constant. Fixes: 4fd36e458392 ("ARM: at91: pm: add plla disable/enable support for sam9x60") Tested-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210204160129.2249394-1-arnd@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-17ARM: at91: pm: remove unnecessary at91sam9x60_idleAlexandre Belloni1-6/+1
cpu_do_idle() is already the default action for arm_pm_idle, there is no need to open code it. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20200804115622.63232-1-alexandre.belloni@bootlin.com
2020-08-17ARM: at91: pm: of_node_put() after its usageClaudiu Beznea1-0/+1
Put node after it has been used. Fixes: 13f16017d3e3f ("ARM: at91: pm: Tie the USB clock mask to the pmc") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1596616610-15460-4-git-send-email-claudiu.beznea@microchip.com
2020-08-17ARM: at91: pm: add per soc validation of pm modesClaudiu Beznea1-1/+79
Not all SoCs supports all the PM mode. User may end up settings, e.g. backup mode, on a non SAMA5D2 device, but the mode to not be valid. If backup mode is used on a devices not supporting it there will be no way of resuming other than rebooting. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1596616610-15460-3-git-send-email-claudiu.beznea@microchip.com
2020-08-17ARM: at91: pm: add support for ULP0 fast wakeupClaudiu Beznea3-10/+45
ULP0 fast improves suspend/resume time with few milliseconds the drawback being the power consumption. The mean values measured for suspend/resume time are as follows (measured on SAMA5D2 Xplained board), ULP0 compared with fast ULP0: - ulp0 fast: suspend time: 169 ms, resume time: 216 ms - ulp0 : suspend time: 197 ms, resume time: 258 ms Current consumption while suspended (measured on SAMA5D2 Xplained board): - ulp0 fast: 730uA - ulp0 : 270uA Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1596616610-15460-2-git-send-email-claudiu.beznea@microchip.com
2020-07-18ARM: at91: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200713065859.31770-1-grandmaster@al2klimov.de
2020-07-18ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()yu kuai1-3/+8
if of_find_device_by_node() succeed, at91_pm_sram_init() doesn't have a corresponding put_device(). Thus add a jump target to fix the exception handling for this function implementation. Fixes: d2e467905596 ("ARM: at91: pm: use the mmio-sram pool to access SRAM") Signed-off-by: yu kuai <yukuai3@huawei.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200604123301.3905837-1-yukuai3@huawei.com
2020-04-04Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds5-21/+210
Pull ARM SoC updates from Arnd Bergmann: "The code changes are mostly for 32-bit platforms and include: - Lots of updates for the Nvidia Tegra platform, including cpuidle, pmc, and dt-binding changes - Microchip at91 power management updates for the recently added sam9x60 SoC - Treewide setup_irq deprecation by afzal mohammed - STMicroelectronics stm32 gains earlycon support - Renesas platforms with Cortex-A9 can now use the global timer - Some TI OMAP2+ platforms gain cpuidle support - Various cleanups for the i.MX6 and Orion platforms, as well as Kconfig files across all platforms" * tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits) ARM: qcom: Add support for IPQ40xx ARM: mmp: replace setup_irq() by request_irq() ARM: cns3xxx: replace setup_irq() by request_irq() ARM: spear: replace setup_irq() by request_irq() ARM: ep93xx: Replace setup_irq() by request_irq() ARM: iop32x: replace setup_irq() by request_irq() arm: mach-dove: Mark dove_io_desc as __maybe_unused ARM: orion: replace setup_irq() by request_irq() ARM: debug: stm32: add UART early console support for STM32MP1 ARM: debug: stm32: add UART early console support for STM32H7 ARM: debug: stm32: add UART early console configuration for STM32F7 ARM: debug: stm32: add UART early console configuration for STM32F4 cpuidle: tegra: Disable CC6 state if LP2 unavailable cpuidle: tegra: Squash Tegra114 driver into the common driver cpuidle: tegra: Squash Tegra30 driver into the common driver cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle ARM: tegra: cpuidle: Remove unnecessary memory barrier ARM: tegra: cpuidle: Make abort_flag atomic ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2 ARM: tegra: Make outer_disable() open-coded ...
2020-03-25.gitignore: add SPDX License IdentifierMasahiro Yamada1-0/+1
Add SPDX License Identifier to all .gitignore files. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-02-18ARM: at91: pm: add quirk for sam9x60's ulp1Claudiu Beznea1-0/+4
On SAM9X60 2 nop operations has to be introduced after setting WAITMODE bit in CKGR_MOR. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-9-git-send-email-claudiu.beznea@microchip.com
2020-02-18ARM: at91: pm: add plla disable/enable support for sam9x60Claudiu Beznea1-4/+113
Add PLLA enable/disable support for SAM9X60. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-8-git-send-email-claudiu.beznea@microchip.com
2020-02-18ARM: at91: pm: s/sfr/sfrbu in pm_suspend.SClaudiu Beznea1-3/+3
s/sfr/sfrbu in pm_suspend.S. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-6-git-send-email-claudiu.beznea@microchip.com
2020-02-18ARM: at91: pm: add pmc_version member to at91_pm_dataClaudiu Beznea4-0/+14
This will be used to differentiate b/w different PLLs settings to be applied in the final/first steps of the suspend/resume process by doing PLL specific configurations. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-5-git-send-email-claudiu.beznea@microchip.com
2020-02-18ARM: at91: pm: add macros for plla disable/enableClaudiu Beznea1-27/+30
Add macros for PLLA disable and enable (in disable macro the PLLA state will also be saved). This prepares the field for PLLA disable/enable for suspend/resume on SAM9X60. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-4-git-send-email-claudiu.beznea@microchip.com
2020-02-18ARM: at91: pm: revert do not disable/enable PLLA for ULP modesClaudiu Beznea1-0/+31
This reverts commit 2725d70aa5138284ba2cebf0ef51dd23e0c9ea21 ("ARM: at91: pm: do not disable/enable PLLA for ULP modes"). This is because PLLA is the clock source for CPU, PLLA should be disabled/enabled in the final/first phase of suspend/resume so that the power consumption in suspend/resume to be minimal and suspend/resume time to be minimized. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-3-git-send-email-claudiu.beznea@microchip.com
2020-02-18ARM: at91: pm: use proper master clock register offsetClaudiu Beznea4-17/+46
SAM9X60's PMC has different master clock register offset than the other SoCs' PMC. Due to this, specify master clock register offset based on PMC compatible and pass it to pm_suspend.S since it is also needed in there. When PM part for SAM9X60 was published the SAM9X60's PMC (commit f6deae46039c ("clk: at91: add sam9x60 pmc driver")) wasn't integrated. Fixes: 01c7031cfa73 ("ARM: at91: pm: initial PM support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-2-git-send-email-claudiu.beznea@microchip.com
2020-02-10ARM: at91: Drop unneeded select of COMMON_CLKGeert Uytterhoeven1-1/+0
Support for AT91/Microchip SoCs depends on ARCH_MULTIPLATFORM or ARM_SINGLE_ARMV7M, which both select COMMON_CLK. Hence there is no need for COMMON_CLK_AT91 to select COMMON_CLK. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20200121103722.1781-5-geert+renesas@glider.be Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-11ARM: at91: pm: use of_device_id array to find the proper shdwc nodeClaudiu Beznea1-1/+7
Use of_device_id array to find the proper shdwc compatibile node. SAM9X60's shdwc changes were not integrated when commit eaedc0d379da ("ARM: at91: pm: add ULP1 support for SAM9X60") was integrated. Fixes: eaedc0d379da ("ARM: at91: pm: add ULP1 support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1576062248-18514-3-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-11ARM: at91: pm: use SAM9X60 PMC's compatibleClaudiu Beznea1-0/+1
SAM9X60 PMC's has a different PMC. It was not integrated at the moment commit 01c7031cfa73 ("ARM: at91: pm: initial PM support for SAM9X60") was published. Fixes: 01c7031cfa73 ("ARM: at91: pm: initial PM support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1576062248-18514-2-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10ARM: at91: pm: move SAM9X60's PM under its own SoC config flagClaudiu Beznea4-19/+36
Move SAM9X60's PM part under SoC config flag. This allows the building of SAM9X60 platform withouth depending on CONFIG_SOC_AT91SAM9 flag, allowing us to select only necessary config flags for SAM9X60. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1575035505-6310-4-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10ARM: at91: Kconfig: add config flag for SAM9X60 SoCClaudiu Beznea1-2/+19
Add config flag for SAM9X60 SoC. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/1575035505-6310-3-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10ARM: at91: Kconfig: add sam9x60 pll config flagClaudiu Beznea1-0/+3
Add SAM9X60's pll config flag. It was first used in commit a436c2a447e5 ("clk: at91: add sam9x60 PLL driver"). Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1575035505-6310-2-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-08-23ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91Masahiro Yamada3-3/+5
<generated/at91_pm_data-offsets.h> is only generated and included by arch/arm/mach-at91/, so it does not need to reside in the globally visible include/generated/. I renamed it to arch/arm/mach-at91/pm_data-offsets.h since the prefix 'at91_' is just redundant in mach-at91/. My main motivation of this change is to avoid the race condition for the parallel build (-j) when CONFIG_IKHEADERS is enabled. When it is enabled, all the headers under include/ are archived into kernel/kheaders_data.tar.xz and exposed in the sysfs. In the parallel build, we have no idea in which order files are built. - If at91_pm_data-offsets.h is built before kheaders_data.tar.xz, the header will be included in the archive. Probably nobody will use it, but it is harmless except that it will increase the archive size needlessly. - If kheaders_data.tar.xz is built before at91_pm_data-offsets.h, the header will not be included in the archive. However, in the next build, the archive will be re-generated to include the newly-found at91_pm_data-offsets.h. This is not nice from the build system point of view. - If at91_pm_data-offsets.h and kheaders_data.tar.xz are built at the same time, the corrupted header might be included in the archive, which does not look nice either. This commit fixes the race. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Link: https://lore.kernel.org/r/20190823024346.591-1-yamada.masahiro@socionext.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-07-20Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+1
Pull ARM SoC platform updates from Olof Johansson: "SoC platform changes. Main theme this merge window: - The Netx platform (Netx 100/500) platform is removed by Linus Walleij-- the SoC doesn't have active maintainers with hardware, and in discussions with the vendor the agreement was that it's OK to remove. - Russell King has a series of patches that cleans up and refactors SA1101 and RiscPC support" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) ARM: stm32: use "depends on" instead of "if" after prompt ARM: sa1100: convert to common clock framework ARM: exynos: Cleanup cppcheck shifting warning ARM: pxa/lubbock: remove lubbock_set_misc_wr() from global view ARM: exynos: Only build MCPM support if used arm: add missing include platform-data/atmel.h ARM: davinci: Use GPIO lookup table for DA850 LEDs ARM: OMAP2: drop explicit assembler architecture ARM: use arch_extension directive instead of arch argument ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB ARM: riscpc: enable chained scatterlist support ARM: riscpc: reduce IRQ handling code ARM: riscpc: move RiscPC assembly files from arch/arm/lib to mach-rpc ARM: riscpc: parse video information from tagged list ARM: riscpc: add ecard quirk for Atomwide 3port serial card MAINTAINERS: mvebu: Add git entry soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in self-refresh ARM: OMAP2+: Make some variables static ...
2019-06-25Merge tag 'at91-5.3-soc' of ↵Olof Johansson1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc AT91 SoC for 5.3 - fix a pm.c warning with W=1 * tag 'at91-5.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: arm: add missing include platform-data/atmel.h Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-20arm: add missing include platform-data/atmel.hPhilippe Mazenauer1-0/+1
Include corresponding headerfile <linux/platform-data/atmel.h> for function at91_suspend_entering_slow_clock(). ../arch/arm/mach-at91/pm.c:279:5: warning: no previous prototype for ‘at91_suspend_entering_slow_clock’ [-Wmissing-prototypes] int at91_suspend_entering_slow_clock(void) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Philippe Mazenauer <philippe.mazenauer@outlook.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2-9/+2
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2-10/+2
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 4Thomas Gleixner4-8/+4
Based on 1 normalized pattern(s): licensed under gplv2 or later extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 118 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.961286471@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2-0/+2
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-19Merge branch 'timers-urgent-for-linus' of ↵Linus Torvalds1-0/+23
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull clocksource updates from Ingo Molnar: "Misc clocksource/clockevent driver updates that came in a bit late but are ready for v5.2" * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: misc: atmel_tclib: Do not probe already used TCBs clocksource/drivers/timer-atmel-tcb: Convert tc_clksrc_suspend|resume() to static clocksource/drivers/tcb_clksrc: Rename the file for consistency clocksource/drivers/timer-atmel-pit: Rework Kconfig option clocksource/drivers/tcb_clksrc: Move Kconfig option ARM: at91: Implement clocksource selection clocksource/drivers/tcb_clksrc: Use tcb as sched_clock clocksource/drivers/tcb_clksrc: Stop depending on atmel_tclib ARM: at91: move SoC specific definitions to SoC folder clocksource/drivers/timer-milbeaut: Cleanup common register accesses clocksource/drivers/timer-milbeaut: Add shutdown function clocksource/drivers/timer-milbeaut: Fix to enable one-shot timer clocksource/drivers/tegra: Rework for compensation of suspend time clocksource/drivers/sp804: Add COMPILE_TEST to CONFIG_ARM_TIMER_SP804 clocksource/drivers/sun4i: Add a compatible for suniv dt-bindings: timer: Add Allwinner suniv timer
2019-05-16Merge tag 'at91-5.2-soc' of ↵Olof Johansson4-94/+230
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late AT91 SoC for 5.2 - PM changes for SAM9X60 * tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: do not disable/enable PLLA for ULP modes ARM: at91: pm: disable RC oscillator in ULP0 ARM: at91: pm: add ULP1 support for SAM9X60 ARM: at91: pm: add support for per SoC wakeup source configuration ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCs ARM: at91: pm: initial PM support for SAM9X60 dt-bindings: arm: atmel: add binding for SAM9X60 SoC ARM: at91: pm: introduce at91_soc_pm structure Signed-off-by: Olof Johansson <olof@lixom.net>
2019-05-16Merge tag 'at91-5.2-defconfig' of ↵Olof Johansson1-3/+0
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late AT91 defconfig for 5.2 - ov2640 driver as module - selecting HAVE_FB_ATMEL for SAMA5 SoCs is useless * tag 'at91-5.2-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: sama5: make ov2640 as a module ARM: at91: remove HAVE_FB_ATMEL for sama5 SoC as they use DRM Signed-off-by: Olof Johansson <olof@lixom.net>
2019-05-02ARM: at91: Implement clocksource selectionAlexandre Belloni1-0/+23
Allow selecting and unselecting the PIT clocksource driver so it doesn't have to be compiled when unused. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2019-04-04arm/mach-at91/pm : fix possible object reference leakPeng Hao1-2/+4
of_find_device_by_node() takes a reference to the struct device when it finds a match via get_device. When returning error we should call put_device. Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-04-04ARM: at91: remove HAVE_FB_ATMEL for sama5 SoC as they use DRMNicolas Ferre1-3/+0
SAMA5 devices use the newer DRM driver for LCD. They don't need the older FB driver: remove the Kconfig option for them. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: do not disable/enable PLLA for ULP modesClaudiu Beznea1-31/+0
There is no need to disable/enable PLLA when switching to one of the ULP modes. The PLLA consumers should take care of this. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: disable RC oscillator in ULP0Claudiu Beznea1-2/+37
Disable RC oscillator in ULP0 as datasheet specifies. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: add ULP1 support for SAM9X60Claudiu Beznea2-1/+64
Add ULP1 support for SAM9X60. In pm_suspend.S enable RC oscillator in PMC if it is not enabled. At resume the state before suspend is restored. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: add support for per SoC wakeup source configurationClaudiu Beznea1-8/+34
Add support for per SoC wakeup source configuration. In this way we could have per SoC wakeup sources, shutdown controller and power management controller configurations for ULP1 power management mode. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCsClaudiu Beznea1-0/+3
In at91_pm_backup_init() return if it is not about SAMA5D2 SoCs. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: initial PM support for SAM9X60Claudiu Beznea3-0/+34
Add initial PM support for SAM9X60. This include idle, WFI and ULP0. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: introduce at91_soc_pm structureClaudiu Beznea1-56/+62
To have per SoC PM information add a new structure which embed a member of type struct at91_pm_data. This will allow easy addition of new information without contaminate struct at91_pm_data that is passed to the last phase suspend function (at91_suspend_sram_fn). Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2018-12-23treewide: add intermediate .s files to targetsMasahiro Yamada1-0/+2
Avoid unneeded recreation of these in the incremental build. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-12-23treewide: remove explicit rules for *offsets.sMasahiro Yamada1-3/+0
These explicit rules are unneeded because scripts/Makefile.build provides a pattern rule to create %.s from %.c Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-10-30Merge tag 'armsoc-soc' of ↵Linus Torvalds1-6/+3
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "A couple of platforms change hands in the MAINTAINERS file: - Linus Walleij lists himself for the ARM Reference platforms: versatile, vexpress, integrator and realview. He has been the main contributor for these for a while, and makes it official now. - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim Eastwood - Manivannan Sadhasivam becomes a secondary maintainer for the Actions Semi machines - Nicolas Ferre lists updates the MAINTAINER listing for the AT91 platform: Ludovic Desroches is now a co-maintainer for the platform, and several other people (Claudiu Beznea, Cristian Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual device drivers. Thanks everyone for working on this, and welcome to the new maintainers! The "virt" platform on qemy or kvm can now be used in big-endian mode without additional tricks, thanks to Jason Donenfeld. Once again, we gain support for another NXP i.MX6 variant, this time it's the i.MX 6ULZ 32-bit single-core version. On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1). These are described as microcontrollers on the manufacturer website, but appear to be rather powerful. The RZ/G2M is used on the reference board for the CIP Super Long Term Support (SLTS) Linux Kernels" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture arm64: exynos: Enable generic power domain support MAINTAINERS: remove non-exsiting email address of Baoyou MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section MAINTAINERS: Drop dt-bindings/genpd/k2g.h ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms arm64: actions: Enable PINCTRL in platforms Kconfig MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs ARM: imx: add i.mx6ulz msl support ARM: Assume maintainership of ARM reference designs ARM: support big-endian for the virt architecture MAINTAINERS: sdhci: move the Microchip entry to proper location MAINTAINERS: move former ATMEL entries to proper MICROCHIP location MAINTAINERS: remove the / ATMEL string from MICROCHIP entries MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver MAINTAINERS: pwm: add entry for Microchip pwm driver MAINTAINERS: dmaengine: add files to Microchip dma entry MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver ...
2018-09-25ARM: at91: pm: call put_device instead of of_node_put in at91_pm_config_wszhong jiang1-3/+3
of_find_device_by_node takes a reference to the struct device when it finds a match via get_device. but it fails to put_device in at91_pm_config_ws, for_each_matching_node_and_match will get and put the node properly, there is no need to call the of_put_node. Therefore, just call put_device instead of of_node_put in at91_pm_config_ws. Fixes: d7484f5c6b3b ("ARM: at91: pm: configure wakeup sources for ULP1 mode") Suggested-by: Claudiu Beznea <Claudiu.Beznea@microchip.com> Signed-off-by: zhong jiang <zhongjiang@huawei.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>