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2012-03-01ARM: at91/pio: add new PIO3 featuresNicolas Ferre4-16/+277
This patch adds the support for new PIO controller found on some at91sam SOCs. - more peripheral multiplexing - more features to configure on a PIO (pull-down, Schmitt trigger, debouncer) - support for several IRQ triggering features (type and polarity) Support for those new features are retrieved from the device tree compatibility string. Debugfs at91_gpio file is updated to monitor configuration. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01ARM: at91: add sam9_smc.o to at91sam9x5 buildNicolas Ferre1-1/+1
Add these SMC accessors to the at91sam9x5 as we will need them for NAND flash (for instance). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01ARM: at91/tc: add device tree support to atmel_tclibNicolas Ferre4-0/+44
Device tree support added to atmel_tclib: the generic Timer Counter library. This is used by the clocksource/clockevent driver tcb_clksrc. The current DT enabled platforms are also modified to use it: - .dtsi files are modified to add Timer Counter Block entries - alias are created to allow identification of each block - clkdev lookup tables are added for clocks identification. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2012-03-01ARM: at91/tclib: take iomem size from resourceNicolas Ferre2-4/+4
Requesting iomem region and ioremaping is now done using the resource size specified instead of a constant value. Each <SoC>_device.c file is modified accordingly to reflect actual user interface size. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01ARM: at91/pit: add traces in case of errorNicolas Ferre1-2/+7
Traces related to IRQ management are useful for timers in case of non-working IRQ subsystem (switch to irq_domain for instance). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01ARM: at91: pit add DT supportJean-Christophe PLAGNIOL-VILLARD2-4/+61
Retreive registers address and IRQ from device tree entry. Called from at91_dt_init_irq() so that timers are up-n-running when timers initialization will occur. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: change error path and interrupts property handling] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01ARM: at91: AIC and GPIO IRQ device tree initializationNicolas Ferre4-61/+168
Both AIC and GPIO controllers are now using the standard of_irq_init() function to initialize IRQs in case of DT use. The DT specific initialization functions are now separated from the non-DT case and are now using "linear" irq domains. The .map() irqdomain operation is responsible for positioning the IRQ handlers. In AIC case, the Linux IRQ number is directly programmed in the hardware to avoid an additional reverse mapping operation. The AIC position its irq domain as the "default" irq domain. For DT case, the priority is not yet filled in the SMR. It will be the subject of another patch. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01ARM: at91/board-dt: remove AIC irq domain from board fileNicolas Ferre1-8/+0
Adding of irqdomain in AIC code make the specification of the irq domain in board file useless. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01ARM: at91/gpio: remove the static specification of gpio_chip.baseNicolas Ferre1-7/+6
This value is determined at runtime using device tree or platform data information. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01ARM: at91/gpio: add .to_irq gpio_chip handlerNicolas Ferre2-12/+13
Replace the gpio_to_irq() macro by a plain gpiolib .to_irq() handler. This call is using the irqdomain to translate hardware to Linux IRQ numbers. The irq_to_gpio() macro is completely removed. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01ARM: at91/gpio: non-DT builds do not have gpio_chip.of_node fieldNicolas Ferre1-1/+6
Protect build failure in case of non-DT configuration: the gpio_chip structure does not have a of_node field in case of !CONFIG_OF_GPIO. Keep this in a separate patch as it can be reverted if the field is added for both DT/non-DT cases. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01ARM: at91/gpio: add irqdomain and DT supportNicolas Ferre1-46/+187
Add "legacy" type of irqdomain to preserve old-style numbering and allow smooth transition for both DT and non-DT cases. Original idea and code by Jean-Christophe Plagniol-Villard. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01ARM: at91/gpio: change comments and one variable nameNicolas Ferre1-11/+14
What was true only on at91sam9263 about the sharing of a single AIC IRQ line for several GPIO banks is now used by several Atmel SoCs. Change a variable name to allow better understanding while introducing IRQ domains in following patches. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01ARM: at91/snapper9260: move gpio_to_irq out of structure initializationNicolas Ferre1-3/+7
gpio_to_irq() implementation will be moved from a macro to a plain function: we cannot use it in a structure initialization anymore. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2012-03-01ARM: at91/aic: add irq domain and device tree supportNicolas Ferre1-13/+61
Add an irqdomain for the AIC interrupt controller. The device tree support is mapping the registers and is using the irq_domain_add_legacy() to manage hwirq translation. The documentation is describing the meaning of the two cells required for using this "interrupt-controller" in a device tree node. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-02-23ARM: at91: properly sort dtb files in Makefile.bootJean-Christophe PLAGNIOL-VILLARD1-1/+6
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91: add at91sam9g25ek.dts in Makefile.bootNicolas Ferre1-0/+1
Reported-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91/board-dt: drop default consoleJean-Christophe PLAGNIOL-VILLARD2-9/+0
This default console mechanism is not used if the console is selected by command line (console= parameter). Dropping this will simplify the compilation of multiple SoC in the same kernel image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23Atmel: move console default platform_device to serial driverJean-Christophe PLAGNIOL-VILLARD7-7/+0
This variable spread on every SoC that is using the atmel_serial.c driver can be included directly into the latter. This will allow to compile multiple soc in the same kernel. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: kernel@avr32linux.org
2012-02-23ARM: at91: merge SRAM Memory banks thanks to mirroringJean-Christophe PLAGNIOL-VILLARD2-8/+9
On at91sam9260 and at91sam9g20 the SRAM banks are mirrored. We can merge them together to be able to have bigger and continuous internal RAM. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91: finally drop at91_sys_read/writeJean-Christophe PLAGNIOL-VILLARD1-18/+0
Remove at91_sys_read/write() from io.h file. This function is not used anymore and was a stopper on the way to single zImage kernel for AT91. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91/rtc-at91sam9: pass the GPBR to use via resourcesJean-Christophe PLAGNIOL-VILLARD10-27/+95
The GPBR registers are used for storing RTC values. The GPBR registers to use are now provided using standard resource entry. The array is filled in SoC specific code. rtc-at91sam9 RTT as RTC driver is modified to retrieve this information. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: rework resources assignment] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2012-02-23ARM: at91/rtc-at91sam9: each SoC can select the RTT device to useJean-Christophe PLAGNIOL-VILLARD5-0/+66
For the RTT as RTC driver rtc-at91sam9, the platform_device structure is filled during SoC initialization. This will allow to convert this RTC driver as a standard platform driver. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91/PMC: make register base soc independentJean-Christophe PLAGNIOL-VILLARD13-92/+101
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2012-02-23ARM: at91/PMC: move assignment out of printfNicolas Ferre1-5/+10
We move the assignment of values of register out of the seq_printf() calls: It is obviously more readable. Reported-by: Ryan Mallon <rmallon@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91/pm_slowclock: add runtime detection of memory contollerJean-Christophe PLAGNIOL-VILLARD3-22/+68
This will allow to have all SoC in one kernel image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91: make sdram/ddr register base soc independentJean-Christophe PLAGNIOL-VILLARD33-87/+111
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.hJean-Christophe PLAGNIOL-VILLARD5-49/+70
This cleanup is done to allow to have multiple SoC in the same image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91/pm_slowclock: function slow_clock() accepts parametersJean-Christophe PLAGNIOL-VILLARD2-35/+26
Change slow_clock()/at91_slow_clock() prototype to accept the PMC base address and one or two RAM controller addresses by parameters. The r0, r1 and r2 registers are used differently and preserved during function call. Those values are defined in pm.c and slow_clock() function is called from there with its new parameters. This will allow to have a soc independent pm_slowclock. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Ached-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91/pm_slowclock: rename register to named defineJean-Christophe PLAGNIOL-VILLARD1-86/+91
This patch will give a name to ARM registers in the assembly source code. It is done to simplify the code reading and the passing of parameters to functions. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-23ARM: at91/ST: remove not needed castsNicolas Ferre1-3/+3
Remove the unnecessary (void) cast on at91_st_read() return value. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Ryan Mallon <rmallon@gmail.com>
2012-02-23ARM: at91: make ST (System Timer) soc independentJean-Christophe PLAGNIOL-VILLARD5-27/+50
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2012-02-23ARM: at91: make matrix register base soc independentJean-Christophe PLAGNIOL-VILLARD25-150/+194
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com> Cc: linux-usb@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-02-17ARM: at91/at91x40: remove use of at91_sys_read/writeJean-Christophe PLAGNIOL-VILLARD3-21/+27
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-17ARM: at91: factorise duplicated at91sam9 idleJean-Christophe PLAGNIOL-VILLARD7-35/+16
Remove duplicated at91sam9xxxx_idle() functions introduced by commit c9dfafb "ARM: mach-at91: move special idle code out of line". Replace by a generic at91sam9_idle() function in setup.c common location. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-11Merge remote-tracking branch 'armsoc/at91/9x5' into at91-3.4-base2Nicolas Ferre9-31/+631
2012-02-11Merge remote-tracking branch 'armsoc/at91/device-board' into at91-3.4-base2Nicolas Ferre6-23/+209
2012-02-03ARM: at91/at91sam9x5: SoC basic supportDan Liang3-0/+376
Add at91sam9x5.c SoC file: Define clock resources and some initialization code. Signed-off-by: Dan Liang <dan.liang@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-02-03ARM: at91/at91sam9x5: Configuration and MakefileNicolas Ferre2-0/+10
Kconfig and Makefile entries for SAM9x5 family. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03ARM: at91/at91sam9x5: clock management for at91sam9x5 chip familyNicolas Ferre1-19/+64
Several changes to PMC have to be managed for adding this support: - alternate prescaler location for both MCKR and PCKR - alternate CSS length for PCKR - added cpu_is_at91sam9x5() to functional switches - manage UTMI bias like sam9g45 chip family Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-02-03ARM: at91/at91sam9x5: PMC header fileNicolas Ferre1-12/+48
Add at91sam9x5 chips family support in PMC header file: Alternate prescaler location and CSS lenght for PCKR is added. The new Peripheral Control Register management is added. Protection mode register is modified to complete its management. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-02-03ARM: at91/at91sam9x5: overall definitionDan Liang2-0/+133
Add the definitions of peripheral and system registers for sam9x5 chips family. Signed-off-by: Dan Liang <dan.liang@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-02-03ARM: at91: Add external RTC for Flexibity boardMaxim Osipov1-1/+11
This patch enables external RTC support on AT91 Flexibity board. Signed-off-by: Maxim Osipov <maxim.osipov@gmail.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03ARM: at91: add Atmel ISI and ov2640 support on sam9m10g45 boardJosh Wu2-2/+172
This patch adds: - ov2640 sensor in at91sam9m10g45ek board - support to use PCK as ISI_MCK. PCK's parent is managed at SoC level, e.g. at91sam9g45_devices.c Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-03ARM: at91: add clock selection parameter for at91_add_device_isi()Josh Wu2-4/+13
Add parameter and change existing call in at91sam9263_devices.c. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-03ARM: at91: Update struct atmel_nand_data to support PMECCHong Xu1-0/+2
User will use the newly added field 'correction_cap' and 'sector_size' to pass PMECC parameters to driver. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03ARM: at91/dma: DMA controller registering with DT supportNicolas Ferre1-1/+9
Device tree support on at91sam9g45 family SoC. Only call platform_device_register() if no dma-controller node is found in device tree. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2012-02-03ARM: at91/dma: remove platform data from DMA controllerNicolas Ferre2-15/+2
DMA controller can deduce its configuration data from the platform. Remove the platform data and match device types with the compatible ones. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2012-02-03ARM: at91: implement the standby function for pm/cpuidleDaniel Lezcano3-42/+34
This patch groups the self-refresh on/cpu_do_idle/self-refresh off into a single 'standby' function. The standby routine for rm9200 has been turned into an asm routine to have a better control of the self refresh and to prevent a memory access when running this code. Draining the write buffer is done automatically when switching for the self refresh on sam9, so the instruction is added to the rm9200 only. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03ARM: at91: remove wait_for_interrupt definitionDaniel Lezcano2-10/+1
All the "wait_for_interrupt" definition are aliases to cpu_do_idle. Only the rm9200 has an asm routine to switch to wfi. But the cpu_do_idle for this platform has exactly the same asm routine. arch/arm/mm/proc-arm920.S .. ENTRY(cpu_arm920_do_idle) mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt .. Then it is safe to invoke cpu_do_idle for this platform. As all the wait_for_interrupts are definition for cpu_do_idle, let's remove it and replace its invokation by cpu_do_idle. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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