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path: root/arch/arm/mach-at91/setup.c
AgeCommit message (Expand)AuthorFilesLines
2012-03-15ARM: at91: add Shutdown Controller (SHDWC) DT supportJean-Christophe PLAGNIOL-VILLARD1-0/+77
2012-03-15ARM: at91: add ram controller DT supportJean-Christophe PLAGNIOL-VILLARD1-3/+37
2012-03-15ARM: at91: add RSTC (Reset Controller) dt supportJean-Christophe PLAGNIOL-VILLARD1-0/+30
2012-03-15ARM: at91: add pmc DT supportJean-Christophe PLAGNIOL-VILLARD1-2/+1
2012-03-15ARM: at91/dt: add specific DT soc initJean-Christophe PLAGNIOL-VILLARD1-0/+18
2012-02-23ARM: at91: make matrix register base soc independentJean-Christophe PLAGNIOL-VILLARD1-0/+9
2012-02-03ARM: at91: code removal of CAP9 SoCJean-Christophe PLAGNIOL-VILLARD1-17/+0
2012-01-20ARM: at91: make rstc soc independentJean-Christophe PLAGNIOL-VILLARD1-0/+9
2012-01-20ARM: at91: fix at91rm9200 soc subtype handlingNicolas Ferre1-2/+5
2011-12-20Merge branch 'picoxcell/cleanup' into next/cleanupOlof Johansson1-18/+0
2011-11-28ARM: at91: make DBGU soc independentJean-Christophe PLAGNIOL-VILLARD1-5/+2
2011-11-28ARM: at91: make shutdown controler soc independentJean-Christophe PLAGNIOL-VILLARD1-0/+17
2011-11-28ARM: at91: add ioremap_registers entry point to soc setupJean-Christophe PLAGNIOL-VILLARD1-0/+2
2011-11-16ARM: mach-at91: remove arch specific special handling for ioremapNicolas Pitre1-18/+0
2011-07-28at91: add arch specific ioremap supportJean-Christophe PLAGNIOL-VILLARD1-0/+19
2011-07-28at91: factorize sram initJean-Christophe PLAGNIOL-VILLARD1-0/+20
2011-07-28at91: move register clocks to soc generic initJean-Christophe PLAGNIOL-VILLARD1-0/+3
2011-07-28at91: move clock subsystem init to soc generic initJean-Christophe PLAGNIOL-VILLARD1-1/+4
2011-07-28at91: use structure to store the current socJean-Christophe PLAGNIOL-VILLARD1-17/+192
2011-07-28at91: factorize at91 interrupts init to socJean-Christophe PLAGNIOL-VILLARD1-0/+14
2011-07-28at91: introduce commom AT91_BASE_SYSJean-Christophe PLAGNIOL-VILLARD1-0/+63
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