summaryrefslogtreecommitdiff
path: root/arch/arm/mach-at91/at91sam9g45.c
AgeCommit message (Collapse)AuthorFilesLines
2011-11-29ARM: at91: switch gpio clock to clkdevJean-Christophe PLAGNIOL-VILLARD1-5/+5
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-29Merge branch 'drivers/macb-gem-cleanup' into at91/gpioArnd Bergmann1-1/+3
2011-11-28ARM: at91: make shutdown controler soc independentJean-Christophe PLAGNIOL-VILLARD1-9/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make smc register base soc independentJean-Christophe PLAGNIOL-VILLARD1-0/+2
now sam9_smc_configure will take as first parameter is the SMC id Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make pit register base soc independentJean-Christophe PLAGNIOL-VILLARD1-0/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: add ioremap_registers entry point to soc setupJean-Christophe PLAGNIOL-VILLARD1-0/+5
this will allow to ioremap the register of the PIT, PMC and others and make the code soc independent Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-11-28ARM: at91: make gpio register base soc independantJean-Christophe PLAGNIOL-VILLARD1-5/+5
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
2011-11-22at91: provide macb clks with "pclk" and "hclk" nameJamie Iles1-1/+3
The macb driver expects clocks with the names "pclk" and "hclk". We currently provide "macb_clk" but to fit in line with other architectures (namely AVR32), provide "pclk" and a fake "hclk". Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Jamie Iles <jamie@jamieiles.com> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2011-11-02Merge branch 'next/dt' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds1-0/+6
* 'next/dt' of git://git.linaro.org/people/arnd/arm-soc: ARM: gic: use module.h instead of export.h ARM: gic: fix irq_alloc_descs handling for sparse irq ARM: gic: add OF based initialization ARM: gic: add irq_domain support irq: support domains with non-zero hwirq base of/irq: introduce of_irq_init ARM: at91: add at91sam9g20 and Calao USB A9G20 DT support ARM: at91: dt: at91sam9g45 family and board device tree files arm/mx5: add device tree support for imx51 babbage arm/mx5: add device tree support for imx53 boards ARM: msm: Add devicetree support for msm8660-surf msm_serial: Add devicetree support msm_serial: Use relative resources for iomem Fix up conflicts in arch/arm/mach-at91/{at91sam9260.c,at91sam9g45.c}
2011-11-02Merge branch 'next/devel' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds1-0/+2
* 'next/devel' of git://git.linaro.org/people/arnd/arm-soc: (50 commits) ARM: tegra: update defconfig arm/tegra: Harmony: Configure PMC for low-level interrupts arm/tegra: device tree support for ventana board arm/tegra: add support for ventana pinmuxing arm/tegra: prepare Seaboard pinmux code for derived boards arm/tegra: pinmux: ioremap registers gpio/tegra: Convert to a platform device arm/tegra: Convert pinmux driver to a platform device arm/dt: Tegra: Add pinmux node to tegra20.dtsi arm/tegra: Prep boards for gpio/pinmux conversion to pdevs ARM: mx5: fix clock usage for suspend ARM i.MX entry-macro.S: remove now unused code ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLER ARM i.MX tzic: add handle_irq function ARM i.MX avic: add handle_irq function ARM: mx25: Add the missing IIM base definition ARM i.MX avic: convert to use generic irq chip mx31moboard: Add poweroff support ARM: mach-qong: Add watchdog support ARM: davinci: AM18x: Add wl1271/wlan support ... Fix up conflicts in: arch/arm/mach-at91/at91sam9g45.c arch/arm/mach-mx5/devices-imx53.h arch/arm/plat-mxc/include/mach/memory.h
2011-11-02Merge branch 'next/driver' of git://git.linaro.org/people/arnd/arm-socLinus Torvalds1-0/+7
* 'next/driver' of git://git.linaro.org/people/arnd/arm-soc: hw_random: add driver for atmel true hardware random number generator ARM: at91: at91sam9g45: add trng clock and platform device MX53 Enable the AHCI SATA on MX53 SMD board MX53 Enable the AHCI SATA on MX53 LOCO board MX53 Enable the AHCI SATA on MX53 ARD board AHCI Add the AHCI SATA feature on the MX53 platforms Fix pata imx resource ARM: imx: Define functions for registering PATA ARM: imx: Add PATA clock support ARM: imx: Add PATA resources for other i.MX processors imx: efika: Enable pata. imx51: add pata clock imx51: add pata device Fix up trivial conflict (new selects next to each other from separate branches for EFIKA_COMMON) in arch/arm/mach-mx5/Kconfig
2011-10-31Merge branch 'dt/gic' into next/dtArnd Bergmann1-0/+2
Conflicts: arch/arm/include/asm/localtimer.h arch/arm/mach-msm/board-msm8x60.c arch/arm/mach-omap2/board-generic.c
2011-10-25ARM: at91: dt: at91sam9g45 family and board device tree filesNicolas Ferre1-0/+6
Create a new device tree source file for Atmel at91sam9g45 SoC family. The Evaluation Kit at91sam9m10g45ek includes it. This first basic support will be populated as drivers and boards will be converted to device tree. Contains serial, dma and interrupt controllers. The generic board file still takes advantage of platform data for early serial init. As we need a storage media and the NAND flash driver is not converted to DT yet, we keep old initialization for it. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Rob Herring <rob.herring@calxeda.com>
2011-10-10ARM: at91: at91sam9g45: add trng clock and platform devicePeter Korsgaard1-0/+7
For the new hw_random driver. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-09-11at91: ohci-at91: always provide all the clocksJean-Christophe PLAGNIOL-VILLARD1-0/+2
Remove the cpu_is_at91xxxx() macros in the ohci-at91 driver. SoCs at91sam9261 and at91sam9g10 expect one additional clock: hck0. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-08-22ARM: mach-at91: Setup consistent dma size at boot timeJon Medhurst1-0/+2
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Ferre<nicolas.ferre@atmel.com>
2011-07-28at91: factorize sram initJean-Christophe PLAGNIOL-VILLARD1-10/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: move register clocks to soc generic initJean-Christophe PLAGNIOL-VILLARD1-3/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: move clock subsystem init to soc generic initJean-Christophe PLAGNIOL-VILLARD1-4/+1
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: use structure to store the current socJean-Christophe PLAGNIOL-VILLARD1-1/+1
instead of reading the registers everytime the current implementation respect the following constrain: - allow 1 to n soc to be enabled - allow to have a virtual cpu type and subtype - always detect the cpu type and subtype and report it - detect if the soc support is enabled - prepare for sysfs export support - drop soc specific code via compiler when the soc not enabled (via cpu_is_xxx) Today if we read the exid we will have the same value for 9g35 and 9m11 and we will need to check the cidr too with the new implementation we just need to check the soc subtype this will also allow to have specific virtual subtype for rm9200 which the board will have to specify via at91rm9200_set_type(int) as we have no way to detect it. this implementation is inspired by the SH cpu detection support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: factorize at91 interrupts init to socJean-Christophe PLAGNIOL-VILLARD1-12/+1
they are the same except the default priority Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-07-28at91: introduce commom AT91_BASE_SYSJean-Christophe PLAGNIOL-VILLARD1-10/+10
On all at91 except rm9200 and x40 have the System Controller starts at address 0xffffc000 and has a size of 16KiB. On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting at 0xfffff000 This patch removes the individual definitions of AT91_BASE_SYS and replaces them with a common version at base 0xfffffc000 and size 16KiB and map the same memory space Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-06-25at91: fix udc, ehci and mmc clock device name for cap9/9g45/9rlJean-Christophe PLAGNIOL-VILLARD1-5/+5
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2011-05-25at91: switch to CLKDEV_LOOKUPJean-Christophe PLAGNIOL-VILLARD1-18/+41
we do not change the clock naming convention so does not need to switch the AVR32 yet Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-05-25at91: fix map_io init usageJean-Christophe PLAGNIOL-VILLARD1-1/+4
switch early init to init_early and introduce soc map_io with this Patch we will not do any more early device setup during the map io tks to Russell to point the new call back Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Andrew Victor <linux@maxim.org.za>
2010-09-09AT91: SAM9G45 - add a separate clock entry for every single TC blockFabian Godehardt1-3/+12
Without this patch you will not be able to register the first block because of the second association call on at91_add_device_tc(). Signed-off-by: Fabian Godehardt <fg@emlix.com> [nicolas.ferre@atmel.com: change tcb1_clk to fake child clock of tcb0_clk] Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2010-06-17ARM: 6169/1: AT91: add new at91 chips in at91sam9g45 familyNicolas Ferre1-0/+11
This is the basic support for at91sam9g46, at91sam9m10 and at91sam9m11. Those are just very basic cpu macros and clock definition. Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-06-27[ARM] 5572/1: at91: Support for at91sam9g45 series: core chip & board supportNicolas Ferre1-0/+360
Here are the at91 specific files dedicated to the at91sam9g45 series. They mimic the traditional at91 way of managing chips & boards. The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES. In the future, the main board for this 9g45 series will be the AT91SAM9M10G45-EK (I choose this last name for the board file). Simple drivers are enabled in _devices and board- files. Newer peripheral support will be added in future patches. Incuded peripherals support (for now): - USART - SPI - Ethernet - NAND flash - LCD - gpio/joystick/buttons - leds and pwm Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-15 12:52:56 +0300