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path: root/arch/arm/include/asm/pmu.h
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2012-11-09ARM: perf: consistently use arm_pmu->name for PMU nameWill Deacon1-1/+1
Perf has three ways to name a PMU: either by passing an explicit char *, reading arm_pmu->name or accessing arm_pmu->pmu.name. Just use arm_pmu->name consistently in the ARM backend. Signed-off-by: Will Deacon <will.deacon@arm.com>
2012-11-09ARM: perf: consistently use struct perf_event in arm_pmu functionsSudeep KarkadaNagesha1-15/+11
The arm_pmu functions have wildly varied parameters which can often be derived from struct perf_event. This patch changes the arm_pmu function prototypes so that struct perf_event pointers are passed in preference to fields that can be derived from the event. Signed-off-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2012-08-23ARM: perf: move irq registration into pmu implementationSudeep KarkadaNagesha1-0/+2
This patch moves the CPU-specific IRQ registration and parsing code into the CPU PMU backend. This is required because a PMU may have more than one interrupt, which in turn can be either PPI (per-cpu) or SPI (requiring strict affinity setting at the interrupt distributor). Signed-off-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com> [will: cosmetic edits and reworked interrupt dispatching] Signed-off-by: Will Deacon <will.deacon@arm.com>
2012-08-23ARM: perf: prepare for moving CPU PMU code into separate fileWill Deacon1-1/+10
The CPU PMU code is tightly coupled with generic ARM PMU handling code. This makes it cumbersome when trying to add support for other ARM PMUs (e.g. interconnect, L2 cache controller, bus) as the generic parts of the code are not readily reusable. This patch cleans up perf_event.c so that reusable code is exposed via header files to other potential PMU drivers. The CPU code is consistently named to identify it as such and also to prepare for moving it into a separate file. Signed-off-by: Will Deacon <will.deacon@arm.com>
2012-08-23ARM: pmu: remove arm_pmu_type enumerationSudeep KarkadaNagesha1-10/+0
The arm_pmu_type enumeration was initially introduced to identify different PMU types in the system, the usual one being that on the CPU (ARM_PMU_DEVICE_CPU). With the removal of the PMU reservation code and the introduction of devicetree bindings for the CPU PMU, the enumeration is no longer required. This patch removes the enumeration and updates the various CPU PMU platform devices so that they no longer pass an .id field referring to identify the PMU type. Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Olof Johansson <olof@lixom.net> Cc: Pawel Moll <pawel.moll@arm.com> Acked-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com> [will: cosmetic edits and actual removal of the enum type] Signed-off-by: Will Deacon <will.deacon@arm.com>
2012-08-23ARM: pmu: remove unused reservation mechanismWill Deacon1-34/+0
The PMU reservation mechanism was originally intended to allow OProfile and perf-events to co-ordinate over access to the CPU PMU. Since then, OProfile for ARM has moved to using perf as its backend, so the reservation code is no longer used. This patch removes the reservation code for the CPU PMU on ARM. Signed-off-by: Will Deacon <will.deacon@arm.com>
2012-08-23ARM: PMU: Add runtime PM SupportJon Hunter1-8/+12
Add runtime PM support to the ARM PMU driver so that devices such as OMAP supporting dynamic PM can use the platform->runtime_* hooks to initialise hardware at runtime. Without having these runtime PM hooks in place any configuration of the PMU hardware would be lost when low power states are entered and hence would prevent PMU from working. This change also replaces the PMU platform functions enable_irq and disable_irq added by Ming Lei with runtime_resume and runtime_suspend funtions. Ming had added the enable_irq and disable_irq functions as a method to configure the cross trigger interface on OMAP4 for routing the PMU interrupts. By adding runtime PM support, we can move the code called by enable_irq and disable_irq into the runtime PM callbacks runtime_resume and runtime_suspend. Cc: Ming Lei <ming.lei@canonical.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2012-07-09ARM: 7448/1: perf: remove arm_perf_pmu_ids global enumerationWill Deacon1-2/+1
In order to provide PMU name strings compatible with the OProfile user ABI, an enumeration of all PMUs is currently used by perf to identify each PMU uniquely. Unfortunately, this does not scale well in the presence of multiple PMUs and creates a single, global namespace across all PMUs in the system. This patch removes the enumeration and instead uses the name string for the PMU to map onto the OProfile variant. perf_pmu_name is implemented for CPU PMUs, which is all that OProfile cares about anyway. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-03-07ARM: 7354/1: perf: limit sample_period to half max_period in non-sampling modeWill Deacon1-1/+1
On ARM, the PMU does not stop counting after an overflow and therefore IRQ latency affects the new counter value read by the kernel. This is significant for non-sampling runs where it is possible for the new value to overtake the previous one, causing the delta to be out by up to max_period events. Commit a737823d ("ARM: 6835/1: perf: ensure overflows aren't missed due to IRQ latency") attempted to fix this problem by allowing interrupt handlers to pass an overflow flag to the event update function, causing the overflow calculation to assume that the counter passed through zero when going from prev to new. Unfortunately, this doesn't work when overflow occurs on the perf_task_tick path because we have the flag cleared and end up computing a large negative delta. This patch removes the overflow flag from armpmu_event_update and instead limits the sample_period to half of the max_period for non-sampling profiling runs. Cc: <stable@vger.kernel.org> Signed-off-by: Ming Lei <ming.lei@canonical.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-12-02arm: pmu: allow platform specific irq enable/disable handlingMing Lei1-3/+12
This patch introduces .enable_irq and .disable_irq into struct arm_pmu_platdata, so platform specific irq enablement can be handled after request_irq, and platform specific irq disablement can be handled before free_irq. This patch is for support of pmu irq routed from CTI on omap4. Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Ming Lei <ming.lei@canonical.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-11-16ARM: PMU: remove pmu_init declarationWill Deacon1-10/+0
pmu_init no longer exists, so don't declare it in asm/pmu.h. Reported-by: Pawel Moll <Pawel.Moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-31ARM: perf: move arm_pmu into <asm/pmu.h>Mark Rutland1-0/+64
Currently, struct arm_pmu and related functions are only visible to {,arch/arm/}/kernel/perf_event.c. This prevents new drivers from using the framework. This patch moves declarations to asm/pmu.h, allowing new PMU drivers to use the framework. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Ashwin Chaugule <ashwinc@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-31ARM: PMU: move CPU PMU platform device handling and init into perfWill Deacon1-19/+10
Once upon a time, OProfile and Perf fought hard over who could play with the PMU. To stop all hell from breaking loose, pmu.c offered an internal reserve/release API and took care of parsing PMU platform data passed in from board support code. Now that Perf has ingested OProfile, let's move the platform device handling into the Perf driver and out of the PMU locking code. Unfortunately, the lock has to remain to prevent Perf being bitten by out-of-tree modules such as LTTng, which still claim a right to the PMU when Perf isn't looking. Acked-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12ARM: perf: make name of arm_pmu_type consistentMark Rutland1-5/+5
Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed {release,reserve}_pmu to take an enum arm_pmu_type as a parameter, but inconsistently named the parameter `type' or `device'. It would be nice if these were consistent. This patch makes use of enum arm_pmu_type consistent, always using `type'. Related printks are updated, explicitly mentioning `type' also. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12ARM: perf: fix prototype of release_pmuMark Rutland1-1/+1
Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed the prototype of release_pmu, but missed the stub for when CONFIG_CPU_HAS_PMU is not selected by the platform. This patch changes the prototype of the stub, preventing possible build failures when CONFIG_CPU_HAS_PMU is not selected. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-06-29ARM: 6974/1: pmu: refactor reservationMark Rutland1-1/+1
Currently, PMU platform_device reservation relies on some minor abuse of the platform_device::id field for determining the type of PMU. This is problematic for device tree based probing, where the ID cannot be controlled. This patch removes reliance on the id field, and depends on each PMU's platform driver to figure out which type it is. As all PMUs handled by the current platform_driver name "arm-pmu" are CPU PMUs, this convention is hardcoded. New PMU types can be supported through the use of {of,platform}_device_id tables Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-02-17ARM: perf_event: allow platform-specific interrupt handlerRabin Vincent1-0/+14
Allow a platform-specific IRQ handler to be specified via platform data. This will be used to implement the single-irq workaround for the DB8500. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2010-05-17ARM: 6064/1: pmu: register IRQs at runtimeWill Deacon1-15/+12
The current PMU infrastructure for ARM requires that the IRQs for the PMU device are fixed at compile time and are selected based on the ARCH_ or MACH_ flags. This has the disadvantage of tying the Kernel down to a particular board as far as profiling is concerned. This patch replaces the compile-time IRQ registration with a runtime mechanism which allows the IRQs to be registered with the framework as a platform_device. A further advantage of this change is that there is scope for registering different types of performance counters in the future by changing the id of the platform_device and attaching different resources to it. Acked-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-04-29ARM: 6063/1: pmu: add enum describing PMU typesWill Deacon1-0/+5
This patch adds an enum describing the potential PMU device types in preparation for PMU device registration via platform devices. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-12ARM: 5899/2: arm: provide a mechanism to reserve performance countersJamie Iles1-0/+75
To add support for perf events and to allow the hardware counters to be shared with oprofile, we need a way to reserve access to the pmu (performance monitor unit). Platforms with PMU interrupts should register the interrupts in arch/arm/kernel/pmu.c Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>